cpumask: make irq_set_affinity() take a const struct cpumask
Impact: change existing irq_chip API Not much point with gentle transition here: the struct irq_chip's setaffinity method signature needs to change. Fortunately, not widely used code, but hits a few architectures. Note: In irq_select_affinity() I save a temporary in by mangling irq_desc[irq].affinity directly. Ingo, does this break anything? (Folded in fix from KOSAKI Motohiro) Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Acked-by: Ingo Molnar <mingo@redhat.com> Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: jeremy@xensource.com Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
This commit is contained in:
parent
29c0177e6a
commit
0de26520c7
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@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq)
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last_cpu = cpu;
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irq_desc[irq].affinity = cpumask_of_cpu(cpu);
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irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
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irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
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return 0;
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}
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#endif /* CONFIG_SMP */
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@ -177,19 +177,19 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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static void
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dp264_set_affinity(unsigned int irq, cpumask_t affinity)
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dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq, affinity);
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cpu_set_irq_affinity(irq, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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}
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static void
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clipper_set_affinity(unsigned int irq, cpumask_t affinity)
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clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&dp264_irq_lock);
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cpu_set_irq_affinity(irq - 16, affinity);
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cpu_set_irq_affinity(irq - 16, *affinity);
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tsunami_update_irq_hw(cached_irq_mask);
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spin_unlock(&dp264_irq_lock);
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}
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@ -158,10 +158,10 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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}
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static void
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titan_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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spin_lock(&titan_irq_lock);
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titan_cpu_set_irq_affinity(irq - 16, affinity);
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titan_cpu_set_irq_affinity(irq - 16, *affinity);
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titan_update_irq_hw(titan_cached_irq_mask);
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spin_unlock(&titan_irq_lock);
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}
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@ -109,11 +109,11 @@ static void gic_unmask_irq(unsigned int irq)
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}
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#ifdef CONFIG_SMP
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static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
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static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
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{
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void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
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unsigned int shift = (irq % 4) * 8;
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unsigned int cpu = first_cpu(mask_val);
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unsigned int cpu = cpumask_first(mask_val);
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u32 val;
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spin_lock(&irq_controller_lock);
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@ -174,7 +174,7 @@ static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
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pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu);
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spin_lock_irq(&desc->lock);
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desc->chip->set_affinity(irq, cpumask_of_cpu(cpu));
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desc->chip->set_affinity(irq, cpumask_of(cpu));
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spin_unlock_irq(&desc->lock);
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}
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@ -260,10 +260,10 @@ static void em_stop(void)
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static void em_route_irq(int irq, unsigned int cpu)
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{
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struct irq_desc *desc = irq_desc + irq;
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cpumask_t mask = cpumask_of_cpu(cpu);
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const struct cpumask *mask = cpumask_of(cpu);
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spin_lock_irq(&desc->lock);
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desc->affinity = mask;
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desc->affinity = *mask;
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desc->chip->set_affinity(irq, mask);
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spin_unlock_irq(&desc->lock);
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}
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@ -325,11 +325,11 @@ static void end_crisv32_irq(unsigned int irq)
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{
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}
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void set_affinity_crisv32_irq(unsigned int irq, cpumask_t dest)
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void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
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{
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unsigned long flags;
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spin_lock_irqsave(&irq_lock, flags);
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irq_allocations[irq - FIRST_IRQ].mask = dest;
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irq_allocations[irq - FIRST_IRQ].mask = *dest;
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spin_unlock_irqrestore(&irq_lock, flags);
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}
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@ -22,7 +22,7 @@ hpsim_irq_noop (unsigned int irq)
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}
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static void
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hpsim_set_affinity_noop (unsigned int a, cpumask_t b)
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hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
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{
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}
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@ -330,25 +330,25 @@ unmask_irq (unsigned int irq)
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static void
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iosapic_set_affinity (unsigned int irq, cpumask_t mask)
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iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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#ifdef CONFIG_SMP
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u32 high32, low32;
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int dest, rte_index;
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int cpu, dest, rte_index;
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int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
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struct iosapic_rte_info *rte;
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struct iosapic *iosapic;
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irq &= (~IA64_IRQ_REDIRECTED);
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cpus_and(mask, mask, cpu_online_map);
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if (cpus_empty(mask))
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cpu = cpumask_first_and(cpu_online_mask, mask);
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if (cpu >= nr_cpu_ids)
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return;
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if (irq_prepare_move(irq, first_cpu(mask)))
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if (irq_prepare_move(irq, cpu))
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return;
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dest = cpu_physical_id(first_cpu(mask));
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dest = cpu_physical_id(cpu);
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if (!iosapic_intr_info[irq].count)
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return; /* not an IOSAPIC interrupt */
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@ -133,7 +133,6 @@ unsigned int vectors_in_migration[NR_IRQS];
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*/
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static void migrate_irqs(void)
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{
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cpumask_t mask;
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irq_desc_t *desc;
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int irq, new_cpu;
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@ -152,15 +151,14 @@ static void migrate_irqs(void)
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if (desc->status == IRQ_PER_CPU)
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continue;
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cpus_and(mask, irq_desc[irq].affinity, cpu_online_map);
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if (any_online_cpu(mask) == NR_CPUS) {
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if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask)
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>= nr_cpu_ids) {
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/*
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* Save it for phase 2 processing
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*/
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vectors_in_migration[irq] = irq;
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new_cpu = any_online_cpu(cpu_online_map);
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mask = cpumask_of_cpu(new_cpu);
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/*
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* Al three are essential, currently WARN_ON.. maybe panic?
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@ -168,7 +166,8 @@ static void migrate_irqs(void)
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if (desc->chip && desc->chip->disable &&
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desc->chip->enable && desc->chip->set_affinity) {
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desc->chip->disable(irq);
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desc->chip->set_affinity(irq, mask);
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desc->chip->set_affinity(irq,
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cpumask_of(new_cpu));
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desc->chip->enable(irq);
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} else {
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WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
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@ -49,11 +49,12 @@
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static struct irq_chip ia64_msi_chip;
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#ifdef CONFIG_SMP
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static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
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static void ia64_set_msi_irq_affinity(unsigned int irq,
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const cpumask_t *cpu_mask)
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{
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struct msi_msg msg;
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u32 addr, data;
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int cpu = first_cpu(cpu_mask);
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int cpu = first_cpu(*cpu_mask);
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if (!cpu_online(cpu))
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return;
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@ -166,12 +167,11 @@ void arch_teardown_msi_irq(unsigned int irq)
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_SMP
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static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
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static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct msi_msg msg;
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int cpu = first_cpu(mask);
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int cpu = cpumask_first(mask);
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if (!cpu_online(cpu))
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return;
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@ -187,7 +187,7 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
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msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
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dmar_msi_write(irq, &msg);
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irq_desc[irq].affinity = mask;
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irq_desc[irq].affinity = *mask;
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}
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#endif /* CONFIG_SMP */
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@ -682,7 +682,7 @@ int migrate_platform_irqs(unsigned int cpu)
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{
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int new_cpei_cpu;
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irq_desc_t *desc = NULL;
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cpumask_t mask;
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const struct cpumask *mask;
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int retval = 0;
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/*
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* Now re-target the CPEI to a different processor
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*/
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new_cpei_cpu = any_online_cpu(cpu_online_map);
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mask = cpumask_of_cpu(new_cpei_cpu);
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mask = cpumask_of(new_cpei_cpu);
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set_cpei_target_cpu(new_cpei_cpu);
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desc = irq_desc + ia64_cpe_irq;
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/*
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@ -227,14 +227,14 @@ finish_up:
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return new_irq_info;
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}
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static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
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static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
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{
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struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
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nasid_t nasid;
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int slice;
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nasid = cpuid_to_nasid(first_cpu(mask));
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slice = cpuid_to_slice(first_cpu(mask));
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nasid = cpuid_to_nasid(cpumask_first(mask));
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slice = cpuid_to_slice(cpumask_first(mask));
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list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
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sn_irq_lh[irq], list)
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@ -151,7 +151,8 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry)
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}
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#ifdef CONFIG_SMP
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static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
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static void sn_set_msi_irq_affinity(unsigned int irq,
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const struct cpumask *cpu_mask)
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{
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struct msi_msg msg;
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int slice;
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struct sn_pcibus_provider *provider;
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unsigned int cpu;
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cpu = first_cpu(cpu_mask);
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cpu = cpumask_first(cpu_mask);
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sn_irq_info = sn_msi_info[irq].sn_irq_info;
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if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
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return;
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msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
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write_msi_msg(irq, &msg);
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irq_desc[irq].affinity = cpu_mask;
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irq_desc[irq].affinity = *cpu_mask;
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}
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#endif /* CONFIG_SMP */
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@ -49,7 +49,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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#include <linux/cpumask.h>
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extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity);
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extern void plat_set_irq_affinity(unsigned int irq,
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const struct cpumask *affinity);
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extern void smtc_forward_irq(unsigned int irq);
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/*
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@ -148,6 +148,6 @@ void __cpuinit sb1480_clockevent_init(void)
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action->name = name;
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action->dev_id = cd;
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irq_set_affinity(irq, cpumask_of_cpu(cpu));
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irq_set_affinity(irq, cpumask_of(cpu));
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setup_irq(irq, action);
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}
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@ -147,6 +147,6 @@ void __cpuinit sb1250_clockevent_init(void)
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action->name = name;
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action->dev_id = cd;
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irq_set_affinity(irq, cpumask_of_cpu(cpu));
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irq_set_affinity(irq, cpumask_of(cpu));
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setup_irq(irq, action);
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}
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static DEFINE_SPINLOCK(gic_lock);
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static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
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static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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{
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cpumask_t tmp = CPU_MASK_NONE;
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unsigned long flags;
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pr_debug(KERN_DEBUG "%s called\n", __func__);
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irq -= _irqbase;
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cpus_and(tmp, cpumask, cpu_online_map);
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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if (cpus_empty(tmp))
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return;
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set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
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}
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irq_desc[irq].affinity = cpumask;
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irq_desc[irq].affinity = *cpumask;
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spin_unlock_irqrestore(&gic_lock, flags);
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}
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@ -114,9 +114,9 @@ struct plat_smp_ops msmtc_smp_ops = {
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*/
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void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
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void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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{
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cpumask_t tmask = affinity;
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cpumask_t tmask = *affinity;
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int cpu = 0;
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void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
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* be made to forward to an offline "CPU".
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*/
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for_each_cpu_mask(cpu, affinity) {
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for_each_cpu(cpu, affinity) {
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if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
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cpu_clear(cpu, tmask);
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}
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@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq);
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static void disable_bcm1480_irq(unsigned int irq);
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static void ack_bcm1480_irq(unsigned int irq);
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#ifdef CONFIG_SMP
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static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask);
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static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
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#endif
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#ifdef CONFIG_PCI
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@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
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}
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#ifdef CONFIG_SMP
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static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
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static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
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{
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int i = 0, old_cpu, cpu, int_on, k;
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u64 cur_ints;
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unsigned long flags;
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unsigned int irq_dirty;
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if (cpus_weight(mask) != 1) {
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if (cpumask_weight(mask) != 1) {
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printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
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return;
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}
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i = first_cpu(mask);
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i = cpumask_first(mask);
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/* Convert logical CPU to physical CPU */
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cpu = cpu_logical_map(i);
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@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq);
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static void disable_sb1250_irq(unsigned int irq);
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static void ack_sb1250_irq(unsigned int irq);
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#ifdef CONFIG_SMP
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static void sb1250_set_affinity(unsigned int irq, cpumask_t mask);
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static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
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#endif
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#ifdef CONFIG_SIBYTE_HAS_LDT
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@ -103,16 +103,16 @@ void sb1250_unmask_irq(int cpu, int irq)
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}
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#ifdef CONFIG_SMP
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static void sb1250_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
int i = 0, old_cpu, cpu, int_on;
|
||||
u64 cur_ints;
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
unsigned long flags;
|
||||
|
||||
i = first_cpu(mask);
|
||||
i = cpumask_first(mask);
|
||||
|
||||
if (cpus_weight(mask) > 1) {
|
||||
if (cpumask_weight(mask) > 1) {
|
||||
printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -131,12 +131,12 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
|
||||
static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
|
||||
{
|
||||
if (cpu_check_affinity(irq, &dest))
|
||||
if (cpu_check_affinity(irq, dest))
|
||||
return;
|
||||
|
||||
irq_desc[irq].affinity = dest;
|
||||
irq_desc[irq].affinity = *dest;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -237,7 +237,7 @@ void fixup_irqs(cpumask_t map)
|
|||
mask = map;
|
||||
}
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq, mask);
|
||||
irq_desc[irq].chip->set_affinity(irq, &mask);
|
||||
else if (irq_desc[irq].action && !(warned++))
|
||||
printk("Cannot set affinity for irq %i\n", irq);
|
||||
}
|
||||
|
|
|
@ -332,7 +332,7 @@ static void xics_eoi_lpar(unsigned int virq)
|
|||
lpar_xirr_info_set((0xff << 24) | irq);
|
||||
}
|
||||
|
||||
static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
|
||||
static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
|
||||
{
|
||||
unsigned int irq;
|
||||
int status;
|
||||
|
@ -358,7 +358,7 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
|
|||
irq_server = get_irq_server(virq, 1);
|
||||
if (irq_server == -1) {
|
||||
char cpulist[128];
|
||||
cpumask_scnprintf(cpulist, sizeof(cpulist), &cpumask);
|
||||
cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
|
||||
printk(KERN_WARNING
|
||||
"%s: No online cpus in the mask %s for irq %d\n",
|
||||
__func__, cpulist, virq);
|
||||
|
@ -845,7 +845,7 @@ void xics_migrate_irqs_away(void)
|
|||
|
||||
/* Reset affinity to all cpus */
|
||||
irq_desc[virq].affinity = CPU_MASK_ALL;
|
||||
desc->chip->set_affinity(virq, CPU_MASK_ALL);
|
||||
desc->chip->set_affinity(virq, cpu_all_mask);
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
}
|
||||
|
|
|
@ -817,7 +817,7 @@ static void mpic_end_ipi(unsigned int irq)
|
|||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
{
|
||||
struct mpic *mpic = mpic_from_irq(irq);
|
||||
unsigned int src = mpic_irq_to_hw(irq);
|
||||
|
@ -829,7 +829,7 @@ void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
|
|||
} else {
|
||||
cpumask_t tmp;
|
||||
|
||||
cpus_and(tmp, cpumask, cpu_online_map);
|
||||
cpumask_and(&tmp, cpumask, cpu_online_mask);
|
||||
|
||||
mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
|
||||
mpic_physmask(cpus_addr(tmp)[0]));
|
||||
|
|
|
@ -36,6 +36,6 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
|
|||
|
||||
extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
|
||||
extern void mpic_set_vector(unsigned int virq, unsigned int vector);
|
||||
extern void mpic_set_affinity(unsigned int irq, cpumask_t cpumask);
|
||||
extern void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
|
||||
|
||||
#endif /* _POWERPC_SYSDEV_MPIC_H */
|
||||
|
|
|
@ -312,7 +312,8 @@ static void sun4u_irq_enable(unsigned int virt_irq)
|
|||
}
|
||||
}
|
||||
|
||||
static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4u_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
sun4u_irq_enable(virt_irq);
|
||||
}
|
||||
|
@ -362,7 +363,8 @@ static void sun4v_irq_enable(unsigned int virt_irq)
|
|||
ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4v_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq);
|
||||
|
@ -429,7 +431,8 @@ static void sun4v_virq_enable(unsigned int virt_irq)
|
|||
dev_handle, dev_ino, err);
|
||||
}
|
||||
|
||||
static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
|
||||
static void sun4v_virt_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned long cpuid, dev_handle, dev_ino;
|
||||
int err;
|
||||
|
@ -788,7 +791,7 @@ void fixup_irqs(void)
|
|||
!(irq_desc[irq].status & IRQ_PER_CPU)) {
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq,
|
||||
irq_desc[irq].affinity);
|
||||
&irq_desc[irq].affinity);
|
||||
}
|
||||
spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
|
||||
}
|
||||
|
|
|
@ -780,7 +780,7 @@ out:
|
|||
if (nid != -1) {
|
||||
cpumask_t numa_mask = node_to_cpumask(nid);
|
||||
|
||||
irq_set_affinity(irq, numa_mask);
|
||||
irq_set_affinity(irq, &numa_mask);
|
||||
}
|
||||
|
||||
return irq;
|
||||
|
|
|
@ -288,7 +288,7 @@ static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
|
|||
if (nid != -1) {
|
||||
cpumask_t numa_mask = node_to_cpumask(nid);
|
||||
|
||||
irq_set_affinity(irq, numa_mask);
|
||||
irq_set_affinity(irq, &numa_mask);
|
||||
}
|
||||
err = request_irq(irq, sparc64_msiq_interrupt, 0,
|
||||
"MSIQ",
|
||||
|
|
|
@ -301,7 +301,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
|
|||
struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
|
||||
hpet_setup_msi_irq(hdev->irq);
|
||||
disable_irq(hdev->irq);
|
||||
irq_set_affinity(hdev->irq, cpumask_of_cpu(hdev->cpu));
|
||||
irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
|
||||
enable_irq(hdev->irq);
|
||||
}
|
||||
break;
|
||||
|
@ -449,7 +449,7 @@ static int hpet_setup_irq(struct hpet_dev *dev)
|
|||
return -1;
|
||||
|
||||
disable_irq(dev->irq);
|
||||
irq_set_affinity(dev->irq, cpumask_of_cpu(dev->cpu));
|
||||
irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
|
||||
enable_irq(dev->irq);
|
||||
|
||||
printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
|
||||
|
|
|
@ -361,7 +361,8 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
|
|||
|
||||
static int assign_irq_vector(int irq, cpumask_t mask);
|
||||
|
||||
static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
|
||||
static void set_ioapic_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
unsigned long flags;
|
||||
|
@ -369,15 +370,14 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
|
|||
cpumask_t tmp;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
/*
|
||||
* Only the high 8 bits are valid.
|
||||
|
@ -387,7 +387,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
|
|||
desc = irq_to_desc(irq);
|
||||
spin_lock_irqsave(&ioapic_lock, flags);
|
||||
__target_IO_APIC_irq(irq, dest, cfg->vector);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
@ -2189,7 +2189,7 @@ static void ir_irq_migration(struct work_struct *work)
|
|||
continue;
|
||||
}
|
||||
|
||||
desc->chip->set_affinity(irq, desc->pending_mask);
|
||||
desc->chip->set_affinity(irq, &desc->pending_mask);
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
}
|
||||
}
|
||||
|
@ -2198,18 +2198,19 @@ static void ir_irq_migration(struct work_struct *work)
|
|||
/*
|
||||
* Migrates the IRQ destination in the process context.
|
||||
*/
|
||||
static void set_ir_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
|
||||
static void set_ir_ioapic_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
if (desc->status & IRQ_LEVEL) {
|
||||
desc->status |= IRQ_MOVE_PENDING;
|
||||
desc->pending_mask = mask;
|
||||
cpumask_copy(&desc->pending_mask, mask);
|
||||
migrate_irq_remapped_level(irq);
|
||||
return;
|
||||
}
|
||||
|
||||
migrate_ioapic_irq(irq, mask);
|
||||
migrate_ioapic_irq(irq, *mask);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -3027,7 +3028,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
struct msi_msg msg;
|
||||
|
@ -3035,15 +3036,14 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
|||
cpumask_t tmp;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
read_msi_msg(irq, &msg);
|
||||
|
@ -3055,7 +3055,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
|||
|
||||
write_msi_msg(irq, &msg);
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_INTR_REMAP
|
||||
|
@ -3063,7 +3063,8 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
|||
* Migrate the MSI irq to another cpumask. This migration is
|
||||
* done in the process context using interrupt-remapping hardware.
|
||||
*/
|
||||
static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void ir_set_msi_irq_affinity(unsigned int irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
unsigned int dest;
|
||||
|
@ -3071,18 +3072,17 @@ static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
|||
struct irte irte;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
if (get_irte(irq, &irte))
|
||||
return;
|
||||
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
irte.vector = cfg->vector;
|
||||
|
@ -3106,7 +3106,7 @@ static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
|
|||
}
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_SMP */
|
||||
|
@ -3308,7 +3308,7 @@ void arch_teardown_msi_irq(unsigned int irq)
|
|||
|
||||
#ifdef CONFIG_DMAR
|
||||
#ifdef CONFIG_SMP
|
||||
static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
struct msi_msg msg;
|
||||
|
@ -3316,15 +3316,14 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
|||
cpumask_t tmp;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
dmar_msi_read(irq, &msg);
|
||||
|
@ -3336,7 +3335,7 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
|||
|
||||
dmar_msi_write(irq, &msg);
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
@ -3369,7 +3368,7 @@ int arch_setup_dmar_msi(unsigned int irq)
|
|||
#ifdef CONFIG_HPET_TIMER
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
struct irq_desc *desc;
|
||||
|
@ -3377,15 +3376,14 @@ static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
|||
unsigned int dest;
|
||||
cpumask_t tmp;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
hpet_msi_read(irq, &msg);
|
||||
|
@ -3397,7 +3395,7 @@ static void hpet_msi_set_affinity(unsigned int irq, cpumask_t mask)
|
|||
|
||||
hpet_msi_write(irq, &msg);
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
|
@ -3451,27 +3449,26 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector)
|
|||
write_ht_irq_msg(irq, &msg);
|
||||
}
|
||||
|
||||
static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
|
||||
static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
|
||||
{
|
||||
struct irq_cfg *cfg;
|
||||
unsigned int dest;
|
||||
cpumask_t tmp;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
if (!cpumask_intersects(mask, cpu_online_mask))
|
||||
return;
|
||||
|
||||
if (assign_irq_vector(irq, mask))
|
||||
if (assign_irq_vector(irq, *mask))
|
||||
return;
|
||||
|
||||
cfg = irq_cfg(irq);
|
||||
cpus_and(tmp, cfg->domain, mask);
|
||||
cpumask_and(&tmp, &cfg->domain, mask);
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
target_ht_irq(irq, dest, cfg->vector);
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
cpumask_copy(&desc->affinity, mask);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -3794,10 +3791,10 @@ void __init setup_ioapic_dest(void)
|
|||
|
||||
#ifdef CONFIG_INTR_REMAP
|
||||
if (intr_remapping_enabled)
|
||||
set_ir_ioapic_affinity_irq(irq, mask);
|
||||
set_ir_ioapic_affinity_irq(irq, &mask);
|
||||
else
|
||||
#endif
|
||||
set_ioapic_affinity_irq(irq, mask);
|
||||
set_ioapic_affinity_irq(irq, &mask);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -251,7 +251,7 @@ void fixup_irqs(cpumask_t map)
|
|||
mask = map;
|
||||
}
|
||||
if (desc->chip->set_affinity)
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
desc->chip->set_affinity(irq, &mask);
|
||||
else if (desc->action && !(warned++))
|
||||
printk("Cannot set affinity for irq %i\n", irq);
|
||||
}
|
||||
|
|
|
@ -116,7 +116,7 @@ void fixup_irqs(cpumask_t map)
|
|||
desc->chip->mask(irq);
|
||||
|
||||
if (desc->chip->set_affinity)
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
desc->chip->set_affinity(irq, &mask);
|
||||
else if (!(warned++))
|
||||
set_affinity = 0;
|
||||
|
||||
|
|
|
@ -704,16 +704,17 @@ static unsigned int iosapic_startup_irq(unsigned int irq)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void iosapic_set_affinity_irq(unsigned int irq, cpumask_t dest)
|
||||
static void iosapic_set_affinity_irq(unsigned int irq,
|
||||
const struct cpumask *dest)
|
||||
{
|
||||
struct vector_info *vi = iosapic_get_vector(irq);
|
||||
u32 d0, d1, dummy_d0;
|
||||
unsigned long flags;
|
||||
|
||||
if (cpu_check_affinity(irq, &dest))
|
||||
if (cpu_check_affinity(irq, dest))
|
||||
return;
|
||||
|
||||
vi->txn_addr = txn_affinity_addr(irq, first_cpu(dest));
|
||||
vi->txn_addr = txn_affinity_addr(irq, cpumask_first(dest));
|
||||
|
||||
spin_lock_irqsave(&iosapic_lock, flags);
|
||||
/* d1 contains the destination CPU, so only want to set that
|
||||
|
|
|
@ -579,7 +579,7 @@ void rebind_evtchn_irq(int evtchn, int irq)
|
|||
spin_unlock(&irq_mapping_update_lock);
|
||||
|
||||
/* new event channels are always bound to cpu 0 */
|
||||
irq_set_affinity(irq, cpumask_of_cpu(0));
|
||||
irq_set_affinity(irq, cpumask_of(0));
|
||||
|
||||
/* Unmask the event channel. */
|
||||
enable_irq(irq);
|
||||
|
@ -608,9 +608,9 @@ static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
|
|||
}
|
||||
|
||||
|
||||
static void set_affinity_irq(unsigned irq, cpumask_t dest)
|
||||
static void set_affinity_irq(unsigned irq, const struct cpumask *dest)
|
||||
{
|
||||
unsigned tcpu = first_cpu(dest);
|
||||
unsigned tcpu = cpumask_first(dest);
|
||||
rebind_irq_to_cpu(irq, tcpu);
|
||||
}
|
||||
|
||||
|
|
|
@ -109,13 +109,13 @@ extern void enable_irq(unsigned int irq);
|
|||
|
||||
extern cpumask_t irq_default_affinity;
|
||||
|
||||
extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
|
||||
extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask);
|
||||
extern int irq_can_set_affinity(unsigned int irq);
|
||||
extern int irq_select_affinity(unsigned int irq);
|
||||
|
||||
#else /* CONFIG_SMP */
|
||||
|
||||
static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
|
@ -113,7 +113,8 @@ struct irq_chip {
|
|||
void (*eoi)(unsigned int irq);
|
||||
|
||||
void (*end)(unsigned int irq);
|
||||
void (*set_affinity)(unsigned int irq, cpumask_t dest);
|
||||
void (*set_affinity)(unsigned int irq,
|
||||
const struct cpumask *dest);
|
||||
int (*retrigger)(unsigned int irq);
|
||||
int (*set_type)(unsigned int irq, unsigned int flow_type);
|
||||
int (*set_wake)(unsigned int irq, unsigned int on);
|
||||
|
|
|
@ -45,7 +45,7 @@ void dynamic_irq_init(unsigned int irq)
|
|||
desc->irq_count = 0;
|
||||
desc->irqs_unhandled = 0;
|
||||
#ifdef CONFIG_SMP
|
||||
cpus_setall(desc->affinity);
|
||||
cpumask_setall(&desc->affinity);
|
||||
#endif
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
}
|
||||
|
|
|
@ -79,7 +79,7 @@ int irq_can_set_affinity(unsigned int irq)
|
|||
* @cpumask: cpumask
|
||||
*
|
||||
*/
|
||||
int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
|
||||
int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
unsigned long flags;
|
||||
|
@ -91,14 +91,14 @@ int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
|
|||
|
||||
#ifdef CONFIG_GENERIC_PENDING_IRQ
|
||||
if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) {
|
||||
desc->affinity = cpumask;
|
||||
cpumask_copy(&desc->affinity, cpumask);
|
||||
desc->chip->set_affinity(irq, cpumask);
|
||||
} else {
|
||||
desc->status |= IRQ_MOVE_PENDING;
|
||||
desc->pending_mask = cpumask;
|
||||
cpumask_copy(&desc->pending_mask, cpumask);
|
||||
}
|
||||
#else
|
||||
desc->affinity = cpumask;
|
||||
cpumask_copy(&desc->affinity, cpumask);
|
||||
desc->chip->set_affinity(irq, cpumask);
|
||||
#endif
|
||||
desc->status |= IRQ_AFFINITY_SET;
|
||||
|
@ -112,26 +112,24 @@ int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
|
|||
*/
|
||||
int do_irq_select_affinity(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
cpumask_t mask;
|
||||
|
||||
if (!irq_can_set_affinity(irq))
|
||||
return 0;
|
||||
|
||||
cpus_and(mask, cpu_online_map, irq_default_affinity);
|
||||
|
||||
/*
|
||||
* Preserve an userspace affinity setup, but make sure that
|
||||
* one of the targets is online.
|
||||
*/
|
||||
if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) {
|
||||
if (cpus_intersects(desc->affinity, cpu_online_map))
|
||||
mask = desc->affinity;
|
||||
if (cpumask_any_and(&desc->affinity, cpu_online_mask)
|
||||
< nr_cpu_ids)
|
||||
goto set_affinity;
|
||||
else
|
||||
desc->status &= ~IRQ_AFFINITY_SET;
|
||||
}
|
||||
|
||||
desc->affinity = mask;
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
cpumask_and(&desc->affinity, cpu_online_mask, &irq_default_affinity);
|
||||
set_affinity:
|
||||
desc->chip->set_affinity(irq, &desc->affinity);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -4,7 +4,6 @@
|
|||
void move_masked_irq(int irq)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
cpumask_t tmp;
|
||||
|
||||
if (likely(!(desc->status & IRQ_MOVE_PENDING)))
|
||||
return;
|
||||
|
@ -19,7 +18,7 @@ void move_masked_irq(int irq)
|
|||
|
||||
desc->status &= ~IRQ_MOVE_PENDING;
|
||||
|
||||
if (unlikely(cpus_empty(desc->pending_mask)))
|
||||
if (unlikely(cpumask_empty(&desc->pending_mask)))
|
||||
return;
|
||||
|
||||
if (!desc->chip->set_affinity)
|
||||
|
@ -27,8 +26,6 @@ void move_masked_irq(int irq)
|
|||
|
||||
assert_spin_locked(&desc->lock);
|
||||
|
||||
cpus_and(tmp, desc->pending_mask, cpu_online_map);
|
||||
|
||||
/*
|
||||
* If there was a valid mask to work with, please
|
||||
* do the disable, re-program, enable sequence.
|
||||
|
@ -41,10 +38,13 @@ void move_masked_irq(int irq)
|
|||
* For correct operation this depends on the caller
|
||||
* masking the irqs.
|
||||
*/
|
||||
if (likely(!cpus_empty(tmp))) {
|
||||
desc->chip->set_affinity(irq,tmp);
|
||||
if (likely(cpumask_any_and(&desc->pending_mask, cpu_online_mask)
|
||||
< nr_cpu_ids)) {
|
||||
cpumask_and(&desc->affinity,
|
||||
&desc->pending_mask, cpu_online_mask);
|
||||
desc->chip->set_affinity(irq, &desc->affinity);
|
||||
}
|
||||
cpus_clear(desc->pending_mask);
|
||||
cpumask_clear(&desc->pending_mask);
|
||||
}
|
||||
|
||||
void move_native_irq(int irq)
|
||||
|
|
|
@ -40,33 +40,42 @@ static ssize_t irq_affinity_proc_write(struct file *file,
|
|||
const char __user *buffer, size_t count, loff_t *pos)
|
||||
{
|
||||
unsigned int irq = (int)(long)PDE(file->f_path.dentry->d_inode)->data;
|
||||
cpumask_t new_value;
|
||||
cpumask_var_t new_value;
|
||||
int err;
|
||||
|
||||
if (!irq_to_desc(irq)->chip->set_affinity || no_irq_affinity ||
|
||||
irq_balancing_disabled(irq))
|
||||
return -EIO;
|
||||
|
||||
err = cpumask_parse_user(buffer, count, &new_value);
|
||||
if (err)
|
||||
return err;
|
||||
if (!alloc_cpumask_var(&new_value, GFP_KERNEL))
|
||||
return -ENOMEM;
|
||||
|
||||
if (!is_affinity_mask_valid(new_value))
|
||||
return -EINVAL;
|
||||
err = cpumask_parse_user(buffer, count, new_value);
|
||||
if (err)
|
||||
goto free_cpumask;
|
||||
|
||||
if (!is_affinity_mask_valid(*new_value)) {
|
||||
err = -EINVAL;
|
||||
goto free_cpumask;
|
||||
}
|
||||
|
||||
/*
|
||||
* Do not allow disabling IRQs completely - it's a too easy
|
||||
* way to make the system unusable accidentally :-) At least
|
||||
* one online CPU still has to be targeted.
|
||||
*/
|
||||
if (!cpus_intersects(new_value, cpu_online_map))
|
||||
if (!cpumask_intersects(new_value, cpu_online_mask)) {
|
||||
/* Special case for empty set - allow the architecture
|
||||
code to set default SMP affinity. */
|
||||
return irq_select_affinity_usr(irq) ? -EINVAL : count;
|
||||
|
||||
err = irq_select_affinity_usr(irq) ? -EINVAL : count;
|
||||
} else {
|
||||
irq_set_affinity(irq, new_value);
|
||||
err = count;
|
||||
}
|
||||
|
||||
return count;
|
||||
free_cpumask:
|
||||
free_cpumask_var(new_value);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int irq_affinity_proc_open(struct inode *inode, struct file *file)
|
||||
|
|
|
@ -136,7 +136,7 @@ void tick_setup_periodic(struct clock_event_device *dev, int broadcast)
|
|||
*/
|
||||
static void tick_setup_device(struct tick_device *td,
|
||||
struct clock_event_device *newdev, int cpu,
|
||||
const cpumask_t *cpumask)
|
||||
const struct cpumask *cpumask)
|
||||
{
|
||||
ktime_t next_event;
|
||||
void (*handler)(struct clock_event_device *) = NULL;
|
||||
|
@ -171,8 +171,8 @@ static void tick_setup_device(struct tick_device *td,
|
|||
* When the device is not per cpu, pin the interrupt to the
|
||||
* current cpu:
|
||||
*/
|
||||
if (!cpus_equal(newdev->cpumask, *cpumask))
|
||||
irq_set_affinity(newdev->irq, *cpumask);
|
||||
if (!cpumask_equal(&newdev->cpumask, cpumask))
|
||||
irq_set_affinity(newdev->irq, cpumask);
|
||||
|
||||
/*
|
||||
* When global broadcasting is active, check if the current
|
||||
|
|
Loading…
Reference in New Issue