media: mtk-vcodec: venc: support SCP firmware
Support the new extended firmware used by MT8183's encoder. [acourbot: refactor, cleanup and split] [hverkuil: fixed some checkpatch alignment warnings] Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com> Co-developed-by: Alexandre Courbot <acourbot@chromium.org> Signed-off-by: Alexandre Courbot <acourbot@chromium.org> Acked-by: Tiffany Lin <tiffany.lin@mediatek.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
parent
c7244811b1
commit
0dc4b32861
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@ -300,6 +300,19 @@ struct mtk_vcodec_ctx {
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};
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/**
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* struct mtk_vcodec_enc_pdata - compatible data for each IC
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*
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* @uses_ext: whether the encoder uses the extended firmware messaging format
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* @has_lt_irq: whether the encoder uses the LT irq
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*/
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struct mtk_vcodec_enc_pdata {
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bool uses_ext;
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bool has_lt_irq;
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};
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#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext)
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/**
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* struct mtk_vcodec_dev - driver data
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* @v4l2_dev: V4L2 device to register video devices for.
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@ -348,6 +361,7 @@ struct mtk_vcodec_dev {
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spinlock_t irqlock;
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struct mtk_vcodec_ctx *curr_ctx;
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void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
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const struct mtk_vcodec_enc_pdata *venc_pdata;
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struct mtk_vcodec_fw *fw_handler;
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@ -221,7 +221,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
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struct resource *res;
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phandle rproc_phandle;
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enum mtk_vcodec_fw_type fw_type;
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int i, j, ret;
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int ret;
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev)
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@ -253,21 +253,20 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
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if (IS_ERR(dev->fw_handler))
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return PTR_ERR(dev->fw_handler);
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dev->venc_pdata = of_device_get_match_data(&pdev->dev);
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ret = mtk_vcodec_init_enc_pm(dev);
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if (ret < 0) {
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dev_err(&pdev->dev, "Failed to get mt vcodec clock source!");
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goto err_enc_pm;
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}
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for (i = VENC_SYS, j = 0; i < NUM_MAX_VCODEC_REG_BASE; i++, j++) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, j);
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dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR((__force void *)dev->reg_base[i])) {
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ret = PTR_ERR((__force void *)dev->reg_base[i]);
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goto err_res;
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}
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mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[i]);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dev->reg_base[VENC_SYS] = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR((__force void *)dev->reg_base[VENC_SYS])) {
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ret = PTR_ERR((__force void *)dev->reg_base[VENC_SYS]);
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goto err_res;
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}
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mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_SYS]);
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (res == NULL) {
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@ -287,21 +286,32 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
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ret = -EINVAL;
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goto err_res;
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}
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disable_irq(dev->enc_irq);
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dev->enc_lt_irq = platform_get_irq(pdev, 1);
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ret = devm_request_irq(&pdev->dev,
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dev->enc_lt_irq, mtk_vcodec_enc_lt_irq_handler,
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0, pdev->name, dev);
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if (ret) {
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dev_err(&pdev->dev,
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"Failed to install dev->enc_lt_irq %d (%d)",
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dev->enc_lt_irq, ret);
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ret = -EINVAL;
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goto err_res;
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if (dev->venc_pdata->has_lt_irq) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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dev->reg_base[VENC_LT_SYS] = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR((__force void *)dev->reg_base[VENC_LT_SYS])) {
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ret = PTR_ERR((__force void *)dev->reg_base[VENC_LT_SYS]);
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goto err_res;
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}
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mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_LT_SYS]);
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dev->enc_lt_irq = platform_get_irq(pdev, 1);
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ret = devm_request_irq(&pdev->dev,
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dev->enc_lt_irq,
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mtk_vcodec_enc_lt_irq_handler,
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0, pdev->name, dev);
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if (ret) {
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dev_err(&pdev->dev,
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"Failed to install dev->enc_lt_irq %d (%d)",
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dev->enc_lt_irq, ret);
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ret = -EINVAL;
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goto err_res;
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}
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disable_irq(dev->enc_lt_irq); /* VENC_LT */
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}
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disable_irq(dev->enc_irq);
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disable_irq(dev->enc_lt_irq); /* VENC_LT */
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mutex_init(&dev->enc_mutex);
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mutex_init(&dev->dev_mutex);
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spin_lock_init(&dev->irqlock);
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@ -382,8 +392,12 @@ err_enc_pm:
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return ret;
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}
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static const struct mtk_vcodec_enc_pdata mt8173_pdata = {
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.has_lt_irq = true,
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};
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static const struct of_device_id mtk_vcodec_enc_match[] = {
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{.compatible = "mediatek,mt8173-vcodec-enc",},
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{.compatible = "mediatek,mt8173-vcodec-enc", .data = &mt8173_pdata},
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match);
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@ -24,6 +24,16 @@ static const char h264_filler_marker[] = {0x0, 0x0, 0x0, 0x1, 0xc};
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#define H264_FILLER_MARKER_SIZE ARRAY_SIZE(h264_filler_marker)
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#define VENC_PIC_BITSTREAM_BYTE_CNT 0x0098
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/*
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* enum venc_h264_frame_type - h264 encoder output bitstream frame type
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*/
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enum venc_h264_frame_type {
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VENC_H264_IDR_FRM,
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VENC_H264_I_FRM,
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VENC_H264_P_FRM,
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VENC_H264_B_FRM,
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};
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/*
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* enum venc_h264_vpu_work_buf - h264 encoder buffer index
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*/
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@ -138,6 +148,7 @@ struct venc_h264_inst {
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struct mtk_vcodec_mem pps_buf;
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bool work_buf_allocated;
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unsigned int frm_cnt;
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unsigned int skip_frm_cnt;
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unsigned int prepend_hdr;
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struct venc_vpu_inst vpu_inst;
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struct venc_h264_vsi *vsi;
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@ -327,6 +338,22 @@ static unsigned int h264_enc_wait_venc_done(struct venc_h264_inst *inst)
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return irq_status;
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}
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static int h264_frame_type(struct venc_h264_inst *inst)
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{
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if ((inst->vsi->config.gop_size != 0 &&
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(inst->frm_cnt % inst->vsi->config.gop_size) == 0) ||
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(inst->frm_cnt == 0 && inst->vsi->config.gop_size == 0)) {
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/* IDR frame */
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return VENC_H264_IDR_FRM;
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} else if ((inst->vsi->config.intra_period != 0 &&
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(inst->frm_cnt % inst->vsi->config.intra_period) == 0) ||
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(inst->frm_cnt == 0 && inst->vsi->config.intra_period == 0)) {
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/* I frame */
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return VENC_H264_I_FRM;
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} else {
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return VENC_H264_P_FRM; /* Note: B frames are not supported */
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}
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}
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static int h264_encode_sps(struct venc_h264_inst *inst,
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struct mtk_vcodec_mem *bs_buf,
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unsigned int *bs_size)
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@ -337,7 +364,7 @@ static int h264_encode_sps(struct venc_h264_inst *inst,
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mtk_vcodec_debug_enter(inst);
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ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_SPS, NULL,
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bs_buf, bs_size);
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bs_buf, bs_size, NULL);
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if (ret)
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return ret;
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@ -364,7 +391,7 @@ static int h264_encode_pps(struct venc_h264_inst *inst,
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mtk_vcodec_debug_enter(inst);
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ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_PPS, NULL,
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bs_buf, bs_size);
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bs_buf, bs_size, NULL);
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if (ret)
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return ret;
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@ -410,11 +437,18 @@ static int h264_encode_frame(struct venc_h264_inst *inst,
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{
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int ret = 0;
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unsigned int irq_status;
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struct venc_frame_info frame_info;
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mtk_vcodec_debug_enter(inst);
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mtk_vcodec_debug(inst, "frm_cnt = %d\n ", inst->frm_cnt);
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frame_info.frm_count = inst->frm_cnt;
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frame_info.skip_frm_count = inst->skip_frm_cnt;
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frame_info.frm_type = h264_frame_type(inst);
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mtk_vcodec_debug(inst, "frm_count = %d,skip_frm_count =%d,frm_type=%d.\n",
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frame_info.frm_count, frame_info.skip_frm_count,
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frame_info.frm_type);
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ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_FRAME, frm_buf,
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bs_buf, bs_size);
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bs_buf, bs_size, &frame_info);
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if (ret)
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return ret;
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@ -428,6 +462,7 @@ static int h264_encode_frame(struct venc_h264_inst *inst,
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inst->work_bufs[VENC_H264_VPU_WORK_BUF_SKIP_FRAME].va,
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*bs_size);
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++inst->frm_cnt;
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++inst->skip_frm_cnt;
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return ret;
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}
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@ -464,6 +499,7 @@ static void h264_encode_filler(struct venc_h264_inst *inst, void *buf,
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static int h264_enc_init(struct mtk_vcodec_ctx *ctx)
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{
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const bool is_ext = MTK_ENC_CTX_IS_EXT(ctx);
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int ret = 0;
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struct venc_h264_inst *inst;
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inst->ctx = ctx;
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inst->vpu_inst.ctx = ctx;
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inst->vpu_inst.id = IPI_VENC_H264;
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inst->vpu_inst.id = is_ext ? SCP_IPI_VENC_H264 : IPI_VENC_H264;
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inst->hw_base = mtk_vcodec_get_reg_addr(inst->ctx, VENC_SYS);
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mtk_vcodec_debug_enter(inst);
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@ -629,7 +665,12 @@ static int h264_enc_set_param(void *handle,
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inst->prepend_hdr = 1;
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mtk_vcodec_debug(inst, "set prepend header mode");
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break;
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case VENC_SET_PARAM_FORCE_INTRA:
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case VENC_SET_PARAM_GOP_SIZE:
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case VENC_SET_PARAM_INTRA_PERIOD:
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inst->frm_cnt = 0;
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inst->skip_frm_cnt = 0;
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fallthrough;
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default:
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ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
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break;
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@ -302,7 +302,8 @@ static int vp8_enc_encode_frame(struct venc_vp8_inst *inst,
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mtk_vcodec_debug(inst, "->frm_cnt=%d", inst->frm_cnt);
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ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size);
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ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size,
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NULL);
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if (ret)
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return ret;
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@ -92,6 +92,19 @@ struct venc_enc_param {
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unsigned int gop_size;
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};
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/**
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* struct venc_frame_info - per-frame information to pass to the firmware.
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*
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* @frm_count: sequential number for this frame
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* @skip_frm_count: number of frames skipped so far while decoding
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* @frm_type: type of the frame, from enum venc_h264_frame_type
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*/
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struct venc_frame_info {
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unsigned int frm_count; /* per frame update */
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unsigned int skip_frm_count; /* per frame update */
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unsigned int frm_type; /* per frame update */
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};
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/*
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* struct venc_frm_buf - frame buffer information used in venc_if_encode()
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* @fb_addr: plane frame buffer addresses
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@ -62,6 +62,11 @@ struct venc_ap_ipi_msg_set_param {
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uint32_t data[8];
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};
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struct venc_ap_ipi_msg_set_param_ext {
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struct venc_ap_ipi_msg_set_param base;
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uint32_t data_ext[24];
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};
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/**
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* struct venc_ap_ipi_msg_enc - AP to VPU enc cmd structure
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* @msg_id: message id (AP_IPIMSG_XXX_ENC_ENCODE)
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@ -82,6 +87,19 @@ struct venc_ap_ipi_msg_enc {
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uint32_t bs_size;
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};
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/**
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* struct venc_ap_ipi_msg_enc_ext - AP to SCP extended enc cmd structure
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*
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* @base: base msg structure
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* @data_item: number of items in the data array
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* @data[8]: data array to store the set parameters
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*/
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struct venc_ap_ipi_msg_enc_ext {
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struct venc_ap_ipi_msg_enc base;
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uint32_t data_item;
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uint32_t data[32];
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};
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/**
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* struct venc_ap_ipi_msg_deinit - AP to VPU deinit cmd structure
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* @msg_id: message id (AP_IPIMSG_XXX_ENC_DEINIT)
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@ -116,49 +116,81 @@ int vpu_enc_init(struct venc_vpu_inst *vpu)
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return 0;
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}
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static unsigned int venc_enc_param_crop_right(struct venc_vpu_inst *vpu,
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struct venc_enc_param *enc_prm)
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{
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unsigned int img_crop_right = enc_prm->buf_width - enc_prm->width;
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return img_crop_right % 16;
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}
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static unsigned int venc_enc_param_crop_bottom(struct venc_enc_param *enc_prm)
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{
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return round_up(enc_prm->height, 16) - enc_prm->height;
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}
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static unsigned int venc_enc_param_num_mb(struct venc_enc_param *enc_prm)
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{
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return DIV_ROUND_UP(enc_prm->width, 16) *
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DIV_ROUND_UP(enc_prm->height, 16);
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}
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int vpu_enc_set_param(struct venc_vpu_inst *vpu,
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enum venc_set_param_type id,
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struct venc_enc_param *enc_param)
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{
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struct venc_ap_ipi_msg_set_param out;
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const bool is_ext = MTK_ENC_CTX_IS_EXT(vpu->ctx);
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size_t msg_size = is_ext ?
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sizeof(struct venc_ap_ipi_msg_set_param_ext) :
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sizeof(struct venc_ap_ipi_msg_set_param);
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struct venc_ap_ipi_msg_set_param_ext out;
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mtk_vcodec_debug(vpu, "id %d ->", id);
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memset(&out, 0, sizeof(out));
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out.msg_id = AP_IPIMSG_ENC_SET_PARAM;
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out.vpu_inst_addr = vpu->inst_addr;
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out.param_id = id;
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out.base.msg_id = AP_IPIMSG_ENC_SET_PARAM;
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out.base.vpu_inst_addr = vpu->inst_addr;
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out.base.param_id = id;
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switch (id) {
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case VENC_SET_PARAM_ENC:
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out.data_item = 0;
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if (is_ext) {
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out.base.data_item = 3;
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out.base.data[0] =
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venc_enc_param_crop_right(vpu, enc_param);
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out.base.data[1] =
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venc_enc_param_crop_bottom(enc_param);
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out.base.data[2] = venc_enc_param_num_mb(enc_param);
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} else {
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out.base.data_item = 0;
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}
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break;
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case VENC_SET_PARAM_FORCE_INTRA:
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out.data_item = 0;
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out.base.data_item = 0;
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break;
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case VENC_SET_PARAM_ADJUST_BITRATE:
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out.data_item = 1;
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out.data[0] = enc_param->bitrate;
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out.base.data_item = 1;
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out.base.data[0] = enc_param->bitrate;
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break;
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case VENC_SET_PARAM_ADJUST_FRAMERATE:
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out.data_item = 1;
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out.data[0] = enc_param->frm_rate;
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out.base.data_item = 1;
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out.base.data[0] = enc_param->frm_rate;
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break;
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case VENC_SET_PARAM_GOP_SIZE:
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out.data_item = 1;
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out.data[0] = enc_param->gop_size;
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out.base.data_item = 1;
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out.base.data[0] = enc_param->gop_size;
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break;
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case VENC_SET_PARAM_INTRA_PERIOD:
|
||||
out.data_item = 1;
|
||||
out.data[0] = enc_param->intra_period;
|
||||
out.base.data_item = 1;
|
||||
out.base.data[0] = enc_param->intra_period;
|
||||
break;
|
||||
case VENC_SET_PARAM_SKIP_FRAME:
|
||||
out.data_item = 0;
|
||||
out.base.data_item = 0;
|
||||
break;
|
||||
default:
|
||||
mtk_vcodec_err(vpu, "id %d not supported", id);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (vpu_enc_send_msg(vpu, &out, sizeof(out))) {
|
||||
if (vpu_enc_send_msg(vpu, &out, msg_size)) {
|
||||
mtk_vcodec_err(vpu,
|
||||
"AP_IPIMSG_ENC_SET_PARAM %d fail", id);
|
||||
return -EINVAL;
|
||||
|
@ -172,33 +204,44 @@ int vpu_enc_set_param(struct venc_vpu_inst *vpu,
|
|||
int vpu_enc_encode(struct venc_vpu_inst *vpu, unsigned int bs_mode,
|
||||
struct venc_frm_buf *frm_buf,
|
||||
struct mtk_vcodec_mem *bs_buf,
|
||||
unsigned int *bs_size)
|
||||
unsigned int *bs_size,
|
||||
struct venc_frame_info *frame_info)
|
||||
{
|
||||
struct venc_ap_ipi_msg_enc out;
|
||||
const bool is_ext = MTK_ENC_CTX_IS_EXT(vpu->ctx);
|
||||
size_t msg_size = is_ext ?
|
||||
sizeof(struct venc_ap_ipi_msg_enc_ext) :
|
||||
sizeof(struct venc_ap_ipi_msg_enc);
|
||||
struct venc_ap_ipi_msg_enc_ext out;
|
||||
|
||||
mtk_vcodec_debug(vpu, "bs_mode %d ->", bs_mode);
|
||||
|
||||
memset(&out, 0, sizeof(out));
|
||||
out.msg_id = AP_IPIMSG_ENC_ENCODE;
|
||||
out.vpu_inst_addr = vpu->inst_addr;
|
||||
out.bs_mode = bs_mode;
|
||||
out.base.msg_id = AP_IPIMSG_ENC_ENCODE;
|
||||
out.base.vpu_inst_addr = vpu->inst_addr;
|
||||
out.base.bs_mode = bs_mode;
|
||||
if (frm_buf) {
|
||||
if ((frm_buf->fb_addr[0].dma_addr % 16 == 0) &&
|
||||
(frm_buf->fb_addr[1].dma_addr % 16 == 0) &&
|
||||
(frm_buf->fb_addr[2].dma_addr % 16 == 0)) {
|
||||
out.input_addr[0] = frm_buf->fb_addr[0].dma_addr;
|
||||
out.input_addr[1] = frm_buf->fb_addr[1].dma_addr;
|
||||
out.input_addr[2] = frm_buf->fb_addr[2].dma_addr;
|
||||
out.base.input_addr[0] = frm_buf->fb_addr[0].dma_addr;
|
||||
out.base.input_addr[1] = frm_buf->fb_addr[1].dma_addr;
|
||||
out.base.input_addr[2] = frm_buf->fb_addr[2].dma_addr;
|
||||
} else {
|
||||
mtk_vcodec_err(vpu, "dma_addr not align to 16");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
if (bs_buf) {
|
||||
out.bs_addr = bs_buf->dma_addr;
|
||||
out.bs_size = bs_buf->size;
|
||||
out.base.bs_addr = bs_buf->dma_addr;
|
||||
out.base.bs_size = bs_buf->size;
|
||||
}
|
||||
if (vpu_enc_send_msg(vpu, &out, sizeof(out))) {
|
||||
if (is_ext && frame_info) {
|
||||
out.data_item = 3;
|
||||
out.data[0] = frame_info->frm_count;
|
||||
out.data[1] = frame_info->skip_frm_count;
|
||||
out.data[2] = frame_info->frm_type;
|
||||
}
|
||||
if (vpu_enc_send_msg(vpu, &out, msg_size)) {
|
||||
mtk_vcodec_err(vpu, "AP_IPIMSG_ENC_ENCODE %d fail",
|
||||
bs_mode);
|
||||
return -EINVAL;
|
||||
|
|
|
@ -45,7 +45,8 @@ int vpu_enc_set_param(struct venc_vpu_inst *vpu,
|
|||
int vpu_enc_encode(struct venc_vpu_inst *vpu, unsigned int bs_mode,
|
||||
struct venc_frm_buf *frm_buf,
|
||||
struct mtk_vcodec_mem *bs_buf,
|
||||
unsigned int *bs_size);
|
||||
unsigned int *bs_size,
|
||||
struct venc_frame_info *frame_info);
|
||||
int vpu_enc_deinit(struct venc_vpu_inst *vpu);
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue