omap_hwmod: share identical omap_hwmod_mpu_irqs arrays
To reduce kernel source file data duplication, share struct omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Paul Walmsley
parent
212738a449
commit
0d619a8999
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@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
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obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
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# hwmod data
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obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \
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obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \
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omap_hwmod_2xxx_3xxx_ipblock_data.o \
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omap_hwmod_2xxx_interconnect_data.o \
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omap_hwmod_2xxx_3xxx_interconnect_data.o \
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omap_hwmod_2420_data.o
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obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \
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obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \
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omap_hwmod_2xxx_3xxx_ipblock_data.o \
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omap_hwmod_2xxx_interconnect_data.o \
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omap_hwmod_2xxx_3xxx_interconnect_data.o \
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omap_hwmod_2430_data.o
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obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \
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obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \
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omap_hwmod_2xxx_3xxx_interconnect_data.o \
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omap_hwmod_3xxx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
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@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = {
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/* timer1 */
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static struct omap_hwmod omap2420_timer1_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
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{ .irq = 37, },
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{ .irq = -1 }
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};
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static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
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{
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@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
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/* timer1 hwmod */
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static struct omap_hwmod omap2420_timer1_hwmod = {
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.name = "timer1",
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.mpu_irqs = omap2420_timer1_mpu_irqs,
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.mpu_irqs = omap2_timer1_mpu_irqs,
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.main_clk = "gpt1_fck",
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.prcm = {
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.omap2 = {
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@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
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/* timer2 */
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static struct omap_hwmod omap2420_timer2_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
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{ .irq = 38, },
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{ .irq = -1 }
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};
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/* l4_core -> timer2 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
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@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
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/* timer2 hwmod */
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static struct omap_hwmod omap2420_timer2_hwmod = {
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.name = "timer2",
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.mpu_irqs = omap2420_timer2_mpu_irqs,
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.mpu_irqs = omap2_timer2_mpu_irqs,
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.main_clk = "gpt2_fck",
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.prcm = {
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.omap2 = {
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@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
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/* timer3 */
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static struct omap_hwmod omap2420_timer3_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
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{ .irq = 39, },
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{ .irq = -1 }
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};
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/* l4_core -> timer3 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
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@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {
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/* timer3 hwmod */
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static struct omap_hwmod omap2420_timer3_hwmod = {
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.name = "timer3",
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.mpu_irqs = omap2420_timer3_mpu_irqs,
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.mpu_irqs = omap2_timer3_mpu_irqs,
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.main_clk = "gpt3_fck",
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.prcm = {
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.omap2 = {
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@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
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/* timer4 */
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static struct omap_hwmod omap2420_timer4_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
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{ .irq = 40, },
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{ .irq = -1 }
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};
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/* l4_core -> timer4 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
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@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {
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/* timer4 hwmod */
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static struct omap_hwmod omap2420_timer4_hwmod = {
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.name = "timer4",
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.mpu_irqs = omap2420_timer4_mpu_irqs,
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.mpu_irqs = omap2_timer4_mpu_irqs,
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.main_clk = "gpt4_fck",
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.prcm = {
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.omap2 = {
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@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
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/* timer5 */
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static struct omap_hwmod omap2420_timer5_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
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{ .irq = 41, },
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{ .irq = -1 }
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};
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/* l4_core -> timer5 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
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@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {
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/* timer5 hwmod */
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static struct omap_hwmod omap2420_timer5_hwmod = {
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.name = "timer5",
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.mpu_irqs = omap2420_timer5_mpu_irqs,
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.mpu_irqs = omap2_timer5_mpu_irqs,
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.main_clk = "gpt5_fck",
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.prcm = {
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.omap2 = {
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@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
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/* timer6 */
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static struct omap_hwmod omap2420_timer6_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
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{ .irq = 42, },
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{ .irq = -1 }
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};
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/* l4_core -> timer6 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
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@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {
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/* timer6 hwmod */
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static struct omap_hwmod omap2420_timer6_hwmod = {
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.name = "timer6",
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.mpu_irqs = omap2420_timer6_mpu_irqs,
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.mpu_irqs = omap2_timer6_mpu_irqs,
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.main_clk = "gpt6_fck",
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.prcm = {
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.omap2 = {
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@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
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/* timer7 */
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static struct omap_hwmod omap2420_timer7_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
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{ .irq = 43, },
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{ .irq = -1 }
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};
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/* l4_core -> timer7 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
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@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {
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/* timer7 hwmod */
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static struct omap_hwmod omap2420_timer7_hwmod = {
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.name = "timer7",
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.mpu_irqs = omap2420_timer7_mpu_irqs,
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.mpu_irqs = omap2_timer7_mpu_irqs,
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.main_clk = "gpt7_fck",
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.prcm = {
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.omap2 = {
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@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
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/* timer8 */
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static struct omap_hwmod omap2420_timer8_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
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{ .irq = 44, },
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{ .irq = -1 }
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};
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/* l4_core -> timer8 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
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@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {
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/* timer8 hwmod */
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static struct omap_hwmod omap2420_timer8_hwmod = {
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.name = "timer8",
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.mpu_irqs = omap2420_timer8_mpu_irqs,
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.mpu_irqs = omap2_timer8_mpu_irqs,
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.main_clk = "gpt8_fck",
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.prcm = {
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.omap2 = {
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@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
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/* timer9 */
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static struct omap_hwmod omap2420_timer9_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
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{ .irq = 45, },
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{ .irq = -1 }
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};
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/* l4_core -> timer9 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
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@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {
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/* timer9 hwmod */
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static struct omap_hwmod omap2420_timer9_hwmod = {
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.name = "timer9",
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.mpu_irqs = omap2420_timer9_mpu_irqs,
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.mpu_irqs = omap2_timer9_mpu_irqs,
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.main_clk = "gpt9_fck",
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.prcm = {
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.omap2 = {
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@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
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/* timer10 */
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static struct omap_hwmod omap2420_timer10_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
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{ .irq = 46, },
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{ .irq = -1 }
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};
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/* l4_core -> timer10 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
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@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {
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/* timer10 hwmod */
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static struct omap_hwmod omap2420_timer10_hwmod = {
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.name = "timer10",
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.mpu_irqs = omap2420_timer10_mpu_irqs,
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.mpu_irqs = omap2_timer10_mpu_irqs,
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.main_clk = "gpt10_fck",
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.prcm = {
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.omap2 = {
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@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
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/* timer11 */
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static struct omap_hwmod omap2420_timer11_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
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{ .irq = 47, },
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{ .irq = -1 }
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};
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/* l4_core -> timer11 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
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@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {
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/* timer11 hwmod */
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static struct omap_hwmod omap2420_timer11_hwmod = {
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.name = "timer11",
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.mpu_irqs = omap2420_timer11_mpu_irqs,
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.mpu_irqs = omap2_timer11_mpu_irqs,
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.main_clk = "gpt11_fck",
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.prcm = {
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.omap2 = {
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@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
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/* timer12 */
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static struct omap_hwmod omap2420_timer12_hwmod;
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static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
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{ .irq = 48, },
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{ .irq = -1 }
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};
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/* l4_core -> timer12 */
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static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
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@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {
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/* timer12 hwmod */
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static struct omap_hwmod omap2420_timer12_hwmod = {
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.name = "timer12",
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.mpu_irqs = omap2420_timer12_mpu_irqs,
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.mpu_irqs = omap2xxx_timer12_mpu_irqs,
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.main_clk = "gpt12_fck",
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.prcm = {
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.omap2 = {
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@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = {
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/* UART1 */
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static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
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{ .irq = INT_24XX_UART1_IRQ, },
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{ .irq = -1 }
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};
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static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
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{ .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
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{ .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
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@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
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static struct omap_hwmod omap2420_uart1_hwmod = {
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.name = "uart1",
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.mpu_irqs = uart1_mpu_irqs,
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.mpu_irqs = omap2_uart1_mpu_irqs,
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.sdma_reqs = uart1_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
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.main_clk = "uart1_fck",
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@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
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/* UART2 */
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static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
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{ .irq = INT_24XX_UART2_IRQ, },
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{ .irq = -1 }
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};
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static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
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{ .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
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{ .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
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@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
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static struct omap_hwmod omap2420_uart2_hwmod = {
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.name = "uart2",
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.mpu_irqs = uart2_mpu_irqs,
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.mpu_irqs = omap2_uart2_mpu_irqs,
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.sdma_reqs = uart2_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
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.main_clk = "uart2_fck",
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@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
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/* UART3 */
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static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
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{ .irq = INT_24XX_UART3_IRQ, },
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{ .irq = -1 }
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};
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static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
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{ .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
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{ .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
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@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
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static struct omap_hwmod omap2420_uart3_hwmod = {
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.name = "uart3",
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.mpu_irqs = uart3_mpu_irqs,
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.mpu_irqs = omap2_uart3_mpu_irqs,
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.sdma_reqs = uart3_sdma_reqs,
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.sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
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.main_clk = "uart3_fck",
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@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
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.sysc = &omap2420_dispc_sysc,
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};
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static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
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{ .irq = 25 },
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{ .irq = -1 }
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};
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/* l4_core -> dss_dispc */
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static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
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.master = &omap2420_l4_core_hwmod,
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@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = {
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static struct omap_hwmod omap2420_dss_dispc_hwmod = {
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.name = "dss_dispc",
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.class = &omap2420_dispc_hwmod_class,
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.mpu_irqs = omap2420_dispc_irqs,
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.mpu_irqs = omap2_dispc_irqs,
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.main_clk = "dss1_fck",
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.prcm = {
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.omap2 = {
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@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
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/* I2C1 */
|
||||
|
||||
static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
|
|
@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = i2c1_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
.sdma_reqs = i2c1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
|
||||
.main_clk = "i2c1_fck",
|
||||
|
|
@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
|
|||
|
||||
/* I2C2 */
|
||||
|
||||
static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
|
|
@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2420_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = i2c2_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
.sdma_reqs = i2c2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
|
||||
.main_clk = "i2c2_fck",
|
||||
|
|
@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
|
|||
};
|
||||
|
||||
/* gpio1 */
|
||||
static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
|
||||
{ .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
|
||||
&omap2420_l4_wkup__gpio1,
|
||||
};
|
||||
|
|
@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
|
|||
static struct omap_hwmod omap2420_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio1_irqs,
|
||||
.mpu_irqs = omap2_gpio1_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio2 */
|
||||
static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
|
||||
{ .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
|
||||
&omap2420_l4_wkup__gpio2,
|
||||
};
|
||||
|
|
@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
|
|||
static struct omap_hwmod omap2420_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio2_irqs,
|
||||
.mpu_irqs = omap2_gpio2_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio3 */
|
||||
static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
|
||||
{ .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
|
||||
&omap2420_l4_wkup__gpio3,
|
||||
};
|
||||
|
|
@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
|
|||
static struct omap_hwmod omap2420_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio3_irqs,
|
||||
.mpu_irqs = omap2_gpio3_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio4 */
|
||||
static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
|
||||
{ .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
|
||||
&omap2420_l4_wkup__gpio4,
|
||||
};
|
||||
|
|
@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
|
|||
static struct omap_hwmod omap2420_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap242x_gpio4_irqs,
|
||||
.mpu_irqs = omap2_gpio4_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
|
|||
.lch_count = 32,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
|
||||
{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
|
||||
{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
|
||||
{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* dma_system -> L3 */
|
||||
static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
|
||||
.master = &omap2420_dma_system_hwmod,
|
||||
|
|
@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = {
|
|||
static struct omap_hwmod omap2420_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap2420_dma_hwmod_class,
|
||||
.mpu_irqs = omap2420_dma_system_irqs,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ck",
|
||||
.slaves = omap2420_dma_system_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
|
||||
|
|
@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = {
|
|||
};
|
||||
|
||||
/* mcspi1 */
|
||||
static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = {
|
||||
{ .irq = 65 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
|
||||
{ .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
|
||||
|
|
@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap2420_mcspi1_hwmod = {
|
||||
.name = "mcspi1_hwmod",
|
||||
.mpu_irqs = omap2420_mcspi1_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
.sdma_reqs = omap2420_mcspi1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs),
|
||||
.main_clk = "mcspi1_fck",
|
||||
|
|
@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
|
|||
};
|
||||
|
||||
/* mcspi2 */
|
||||
static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = {
|
||||
{ .irq = 66 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
|
||||
{ .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
|
||||
|
|
@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap2420_mcspi2_hwmod = {
|
||||
.name = "mcspi2_hwmod",
|
||||
.mpu_irqs = omap2420_mcspi2_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
.sdma_reqs = omap2420_mcspi2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs),
|
||||
.main_clk = "mcspi2_fck",
|
||||
|
|
|
|||
|
|
@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = {
|
|||
|
||||
/* timer1 */
|
||||
static struct omap_hwmod omap2430_timer1_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = {
|
||||
{ .irq = 37, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
|
||||
{
|
||||
|
|
@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
|
|||
/* timer1 hwmod */
|
||||
static struct omap_hwmod omap2430_timer1_hwmod = {
|
||||
.name = "timer1",
|
||||
.mpu_irqs = omap2430_timer1_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer1_mpu_irqs,
|
||||
.main_clk = "gpt1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
|
|||
|
||||
/* timer2 */
|
||||
static struct omap_hwmod omap2430_timer2_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
|
||||
{ .irq = 38, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer2 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
|
||||
|
|
@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
|
|||
/* timer2 hwmod */
|
||||
static struct omap_hwmod omap2430_timer2_hwmod = {
|
||||
.name = "timer2",
|
||||
.mpu_irqs = omap2430_timer2_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer2_mpu_irqs,
|
||||
.main_clk = "gpt2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
|
|||
|
||||
/* timer3 */
|
||||
static struct omap_hwmod omap2430_timer3_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
|
||||
{ .irq = 39, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer3 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
|
||||
|
|
@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
|
|||
/* timer3 hwmod */
|
||||
static struct omap_hwmod omap2430_timer3_hwmod = {
|
||||
.name = "timer3",
|
||||
.mpu_irqs = omap2430_timer3_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer3_mpu_irqs,
|
||||
.main_clk = "gpt3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
|
|||
|
||||
/* timer4 */
|
||||
static struct omap_hwmod omap2430_timer4_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
|
||||
{ .irq = 40, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer4 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
|
||||
|
|
@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
|
|||
/* timer4 hwmod */
|
||||
static struct omap_hwmod omap2430_timer4_hwmod = {
|
||||
.name = "timer4",
|
||||
.mpu_irqs = omap2430_timer4_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer4_mpu_irqs,
|
||||
.main_clk = "gpt4_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
|
|||
|
||||
/* timer5 */
|
||||
static struct omap_hwmod omap2430_timer5_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
|
||||
{ .irq = 41, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer5 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
|
||||
|
|
@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
|
|||
/* timer5 hwmod */
|
||||
static struct omap_hwmod omap2430_timer5_hwmod = {
|
||||
.name = "timer5",
|
||||
.mpu_irqs = omap2430_timer5_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer5_mpu_irqs,
|
||||
.main_clk = "gpt5_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
|
|||
|
||||
/* timer6 */
|
||||
static struct omap_hwmod omap2430_timer6_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
|
||||
{ .irq = 42, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer6 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
|
||||
|
|
@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
|
|||
/* timer6 hwmod */
|
||||
static struct omap_hwmod omap2430_timer6_hwmod = {
|
||||
.name = "timer6",
|
||||
.mpu_irqs = omap2430_timer6_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer6_mpu_irqs,
|
||||
.main_clk = "gpt6_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
|
|||
|
||||
/* timer7 */
|
||||
static struct omap_hwmod omap2430_timer7_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
|
||||
{ .irq = 43, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer7 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
|
||||
|
|
@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
|
|||
/* timer7 hwmod */
|
||||
static struct omap_hwmod omap2430_timer7_hwmod = {
|
||||
.name = "timer7",
|
||||
.mpu_irqs = omap2430_timer7_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer7_mpu_irqs,
|
||||
.main_clk = "gpt7_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
|
|||
|
||||
/* timer8 */
|
||||
static struct omap_hwmod omap2430_timer8_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
|
||||
{ .irq = 44, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer8 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
|
||||
|
|
@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
|
|||
/* timer8 hwmod */
|
||||
static struct omap_hwmod omap2430_timer8_hwmod = {
|
||||
.name = "timer8",
|
||||
.mpu_irqs = omap2430_timer8_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer8_mpu_irqs,
|
||||
.main_clk = "gpt8_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
|
|||
|
||||
/* timer9 */
|
||||
static struct omap_hwmod omap2430_timer9_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
|
||||
{ .irq = 45, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer9 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
|
||||
|
|
@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
|
|||
/* timer9 hwmod */
|
||||
static struct omap_hwmod omap2430_timer9_hwmod = {
|
||||
.name = "timer9",
|
||||
.mpu_irqs = omap2430_timer9_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer9_mpu_irqs,
|
||||
.main_clk = "gpt9_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
|
|||
|
||||
/* timer10 */
|
||||
static struct omap_hwmod omap2430_timer10_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
|
||||
{ .irq = 46, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer10 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
|
||||
|
|
@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
|
|||
/* timer10 hwmod */
|
||||
static struct omap_hwmod omap2430_timer10_hwmod = {
|
||||
.name = "timer10",
|
||||
.mpu_irqs = omap2430_timer10_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer10_mpu_irqs,
|
||||
.main_clk = "gpt10_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
|
|||
|
||||
/* timer11 */
|
||||
static struct omap_hwmod omap2430_timer11_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
|
||||
{ .irq = 47, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer11 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
|
||||
|
|
@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
|
|||
/* timer11 hwmod */
|
||||
static struct omap_hwmod omap2430_timer11_hwmod = {
|
||||
.name = "timer11",
|
||||
.mpu_irqs = omap2430_timer11_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer11_mpu_irqs,
|
||||
.main_clk = "gpt11_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
|
|||
|
||||
/* timer12 */
|
||||
static struct omap_hwmod omap2430_timer12_hwmod;
|
||||
static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
|
||||
{ .irq = 48, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer12 */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
|
||||
|
|
@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
|
|||
/* timer12 hwmod */
|
||||
static struct omap_hwmod omap2430_timer12_hwmod = {
|
||||
.name = "timer12",
|
||||
.mpu_irqs = omap2430_timer12_mpu_irqs,
|
||||
.mpu_irqs = omap2xxx_timer12_mpu_irqs,
|
||||
.main_clk = "gpt12_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = {
|
|||
|
||||
/* UART1 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
|
|
@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = uart1_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
.sdma_reqs = uart1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
|
||||
.main_clk = "uart1_fck",
|
||||
|
|
@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
|
|||
|
||||
/* UART2 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
|
|
@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = uart2_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
.sdma_reqs = uart2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
|
||||
.main_clk = "uart2_fck",
|
||||
|
|
@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
|
|||
|
||||
/* UART3 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART3_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
|
|
@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = uart3_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
.sdma_reqs = uart3_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
|
||||
.main_clk = "uart3_fck",
|
||||
|
|
@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
|
|||
.sysc = &omap2430_dispc_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
|
||||
{ .irq = 25 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> dss_dispc */
|
||||
static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
|
||||
.master = &omap2430_l4_core_hwmod,
|
||||
|
|
@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
|
|||
static struct omap_hwmod omap2430_dss_dispc_hwmod = {
|
||||
.name = "dss_dispc",
|
||||
.class = &omap2430_dispc_hwmod_class,
|
||||
.mpu_irqs = omap2430_dispc_irqs,
|
||||
.mpu_irqs = omap2_dispc_irqs,
|
||||
.main_clk = "dss1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
|
|||
|
||||
/* I2C1 */
|
||||
|
||||
static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
|
|
@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = i2c1_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
.sdma_reqs = i2c1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
|
||||
.main_clk = "i2chs1_fck",
|
||||
|
|
@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
|
|||
|
||||
/* I2C2 */
|
||||
|
||||
static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
|
|
@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap2430_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = i2c2_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
.sdma_reqs = i2c2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
|
||||
.main_clk = "i2chs2_fck",
|
||||
|
|
@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
|
|||
};
|
||||
|
||||
/* gpio1 */
|
||||
static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = {
|
||||
{ .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
|
||||
&omap2430_l4_wkup__gpio1,
|
||||
};
|
||||
|
|
@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
|
|||
static struct omap_hwmod omap2430_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio1_irqs,
|
||||
.mpu_irqs = omap2_gpio1_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio2 */
|
||||
static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = {
|
||||
{ .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
|
||||
&omap2430_l4_wkup__gpio2,
|
||||
};
|
||||
|
|
@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
|
|||
static struct omap_hwmod omap2430_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio2_irqs,
|
||||
.mpu_irqs = omap2_gpio2_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio3 */
|
||||
static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = {
|
||||
{ .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
|
||||
&omap2430_l4_wkup__gpio3,
|
||||
};
|
||||
|
|
@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
|
|||
static struct omap_hwmod omap2430_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio3_irqs,
|
||||
.mpu_irqs = omap2_gpio3_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio4 */
|
||||
static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = {
|
||||
{ .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
|
||||
&omap2430_l4_wkup__gpio4,
|
||||
};
|
||||
|
|
@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
|
|||
static struct omap_hwmod omap2430_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap243x_gpio4_irqs,
|
||||
.mpu_irqs = omap2_gpio4_irqs,
|
||||
.main_clk = "gpios_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
|
|||
.lch_count = 32,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
|
||||
{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
|
||||
{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
|
||||
{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* dma_system -> L3 */
|
||||
static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
|
||||
.master = &omap2430_dma_system_hwmod,
|
||||
|
|
@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
|
|||
static struct omap_hwmod omap2430_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap2430_dma_hwmod_class,
|
||||
.mpu_irqs = omap2430_dma_system_irqs,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ck",
|
||||
.slaves = omap2430_dma_system_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
|
||||
|
|
@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = {
|
|||
};
|
||||
|
||||
/* mcspi1 */
|
||||
static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = {
|
||||
{ .irq = 65 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
|
||||
{ .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
|
||||
|
|
@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap2430_mcspi1_hwmod = {
|
||||
.name = "mcspi1_hwmod",
|
||||
.mpu_irqs = omap2430_mcspi1_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
.sdma_reqs = omap2430_mcspi1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
|
||||
.main_clk = "mcspi1_fck",
|
||||
|
|
@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
|
|||
};
|
||||
|
||||
/* mcspi2 */
|
||||
static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = {
|
||||
{ .irq = 66 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
|
||||
{ .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
|
||||
|
|
@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap2430_mcspi2_hwmod = {
|
||||
.name = "mcspi2_hwmod",
|
||||
.mpu_irqs = omap2430_mcspi2_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
.sdma_reqs = omap2430_mcspi2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
|
||||
.main_clk = "mcspi2_fck",
|
||||
|
|
|
|||
|
|
@ -0,0 +1,142 @@
|
|||
/*
|
||||
* omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3
|
||||
*
|
||||
* Copyright (C) 2011 Nokia Corporation
|
||||
* Paul Walmsley
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/serial.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
|
||||
{ .irq = 37, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = {
|
||||
{ .irq = 38, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = {
|
||||
{ .irq = 39, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = {
|
||||
{ .irq = 40, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = {
|
||||
{ .irq = 41, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = {
|
||||
{ .irq = 42, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = {
|
||||
{ .irq = 43, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = {
|
||||
{ .irq = 44, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = {
|
||||
{ .irq = 45, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = {
|
||||
{ .irq = 46, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = {
|
||||
{ .irq = 47, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART3_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
|
||||
{ .irq = 25 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_gpio1_irqs[] = {
|
||||
{ .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_gpio2_irqs[] = {
|
||||
{ .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_gpio3_irqs[] = {
|
||||
{ .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_gpio4_irqs[] = {
|
||||
{ .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
|
||||
{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
|
||||
{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
|
||||
{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = {
|
||||
{ .irq = 65 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
|
||||
{ .irq = 66 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
|
||||
*
|
||||
* Copyright (C) 2011 Nokia Corporation
|
||||
* Paul Walmsley
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <plat/omap_hwmod.h>
|
||||
#include <plat/serial.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
|
||||
{ .irq = 48, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
|
@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
|
|||
static struct omap_hwmod omap3xxx_l3_main_hwmod = {
|
||||
.name = "l3_main",
|
||||
.class = &l3_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_l3_main_irqs,
|
||||
.mpu_irqs = omap3xxx_l3_main_irqs,
|
||||
.masters = omap3xxx_l3_main_masters,
|
||||
.masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
|
||||
.slaves = omap3xxx_l3_main_slaves,
|
||||
|
|
@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
|
|||
|
||||
/* timer1 */
|
||||
static struct omap_hwmod omap3xxx_timer1_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = {
|
||||
{ .irq = 37, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
|
||||
{
|
||||
|
|
@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
|
|||
/* timer1 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer1_hwmod = {
|
||||
.name = "timer1",
|
||||
.mpu_irqs = omap3xxx_timer1_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer1_mpu_irqs,
|
||||
.main_clk = "gpt1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
|
|||
|
||||
/* timer2 */
|
||||
static struct omap_hwmod omap3xxx_timer2_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = {
|
||||
{ .irq = 38, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
|
||||
{
|
||||
|
|
@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {
|
|||
/* timer2 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer2_hwmod = {
|
||||
.name = "timer2",
|
||||
.mpu_irqs = omap3xxx_timer2_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer2_mpu_irqs,
|
||||
.main_clk = "gpt2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
|
|||
|
||||
/* timer3 */
|
||||
static struct omap_hwmod omap3xxx_timer3_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = {
|
||||
{ .irq = 39, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {
|
||||
{
|
||||
|
|
@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {
|
|||
/* timer3 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer3_hwmod = {
|
||||
.name = "timer3",
|
||||
.mpu_irqs = omap3xxx_timer3_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer3_mpu_irqs,
|
||||
.main_clk = "gpt3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
|
|||
|
||||
/* timer4 */
|
||||
static struct omap_hwmod omap3xxx_timer4_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = {
|
||||
{ .irq = 40, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {
|
||||
{
|
||||
|
|
@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {
|
|||
/* timer4 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer4_hwmod = {
|
||||
.name = "timer4",
|
||||
.mpu_irqs = omap3xxx_timer4_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer4_mpu_irqs,
|
||||
.main_clk = "gpt4_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
|
|||
|
||||
/* timer5 */
|
||||
static struct omap_hwmod omap3xxx_timer5_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = {
|
||||
{ .irq = 41, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {
|
||||
{
|
||||
|
|
@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {
|
|||
/* timer5 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer5_hwmod = {
|
||||
.name = "timer5",
|
||||
.mpu_irqs = omap3xxx_timer5_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer5_mpu_irqs,
|
||||
.main_clk = "gpt5_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
|
|||
|
||||
/* timer6 */
|
||||
static struct omap_hwmod omap3xxx_timer6_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = {
|
||||
{ .irq = 42, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {
|
||||
{
|
||||
|
|
@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {
|
|||
/* timer6 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer6_hwmod = {
|
||||
.name = "timer6",
|
||||
.mpu_irqs = omap3xxx_timer6_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer6_mpu_irqs,
|
||||
.main_clk = "gpt6_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
|
|||
|
||||
/* timer7 */
|
||||
static struct omap_hwmod omap3xxx_timer7_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = {
|
||||
{ .irq = 43, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {
|
||||
{
|
||||
|
|
@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {
|
|||
/* timer7 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer7_hwmod = {
|
||||
.name = "timer7",
|
||||
.mpu_irqs = omap3xxx_timer7_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer7_mpu_irqs,
|
||||
.main_clk = "gpt7_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
|
|||
|
||||
/* timer8 */
|
||||
static struct omap_hwmod omap3xxx_timer8_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = {
|
||||
{ .irq = 44, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {
|
||||
{
|
||||
|
|
@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {
|
|||
/* timer8 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer8_hwmod = {
|
||||
.name = "timer8",
|
||||
.mpu_irqs = omap3xxx_timer8_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer8_mpu_irqs,
|
||||
.main_clk = "gpt8_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
|
|||
|
||||
/* timer9 */
|
||||
static struct omap_hwmod omap3xxx_timer9_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = {
|
||||
{ .irq = 45, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {
|
||||
{
|
||||
|
|
@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {
|
|||
/* timer9 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer9_hwmod = {
|
||||
.name = "timer9",
|
||||
.mpu_irqs = omap3xxx_timer9_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer9_mpu_irqs,
|
||||
.main_clk = "gpt9_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
|
|||
|
||||
/* timer10 */
|
||||
static struct omap_hwmod omap3xxx_timer10_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
|
||||
{ .irq = 46, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer10 */
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = {
|
||||
|
|
@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {
|
|||
/* timer10 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer10_hwmod = {
|
||||
.name = "timer10",
|
||||
.mpu_irqs = omap3xxx_timer10_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer10_mpu_irqs,
|
||||
.main_clk = "gpt10_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
|
|||
|
||||
/* timer11 */
|
||||
static struct omap_hwmod omap3xxx_timer11_hwmod;
|
||||
static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
|
||||
{ .irq = 47, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> timer11 */
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
|
||||
|
|
@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {
|
|||
/* timer11 hwmod */
|
||||
static struct omap_hwmod omap3xxx_timer11_hwmod = {
|
||||
.name = "timer11",
|
||||
.mpu_irqs = omap3xxx_timer11_mpu_irqs,
|
||||
.mpu_irqs = omap2_timer11_mpu_irqs,
|
||||
.main_clk = "gpt11_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = {
|
|||
|
||||
/* UART1 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
|
|
@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = uart1_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart1_mpu_irqs,
|
||||
.sdma_reqs = uart1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
|
||||
.main_clk = "uart1_fck",
|
||||
|
|
@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
|
|||
|
||||
/* UART2 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
|
|
@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = uart2_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart2_mpu_irqs,
|
||||
.sdma_reqs = uart2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
|
||||
.main_clk = "uart2_fck",
|
||||
|
|
@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
|
|||
|
||||
/* UART3 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART3_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
|
|
@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = uart3_mpu_irqs,
|
||||
.mpu_irqs = omap2_uart3_mpu_irqs,
|
||||
.sdma_reqs = uart3_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
|
||||
.main_clk = "uart3_fck",
|
||||
|
|
@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
|
|||
.sysc = &omap3xxx_dispc_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
|
||||
{ .irq = 25 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
/* l4_core -> dss_dispc */
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
|
|
@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
|
||||
.name = "dss_dispc",
|
||||
.class = &omap3xxx_dispc_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_dispc_irqs,
|
||||
.mpu_irqs = omap2_dispc_irqs,
|
||||
.main_clk = "dss1_alwon_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
|
|||
.fifo_depth = 8, /* bytes */
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C1_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
|
||||
|
|
@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.mpu_irqs = i2c1_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
.sdma_reqs = i2c1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
|
||||
.main_clk = "i2c1_fck",
|
||||
|
|
@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
|
|||
.fifo_depth = 8, /* bytes */
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_I2C2_IRQ, },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
|
||||
|
|
@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.mpu_irqs = i2c2_mpu_irqs,
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
.sdma_reqs = i2c2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
|
||||
.main_clk = "i2c2_fck",
|
||||
|
|
@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
|
|||
};
|
||||
|
||||
/* gpio1 */
|
||||
static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = {
|
||||
{ .irq = 29 }, /* INT_34XX_GPIO_BANK1 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
|
||||
{ .role = "dbclk", .clk = "gpio1_dbck", },
|
||||
};
|
||||
|
|
@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_gpio1_hwmod = {
|
||||
.name = "gpio1",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio1_irqs,
|
||||
.mpu_irqs = omap2_gpio1_irqs,
|
||||
.main_clk = "gpio1_ick",
|
||||
.opt_clks = gpio1_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
|
||||
|
|
@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio2 */
|
||||
static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = {
|
||||
{ .irq = 30 }, /* INT_34XX_GPIO_BANK2 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
|
||||
{ .role = "dbclk", .clk = "gpio2_dbck", },
|
||||
};
|
||||
|
|
@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_gpio2_hwmod = {
|
||||
.name = "gpio2",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio2_irqs,
|
||||
.mpu_irqs = omap2_gpio2_irqs,
|
||||
.main_clk = "gpio2_ick",
|
||||
.opt_clks = gpio2_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
|
||||
|
|
@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio3 */
|
||||
static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = {
|
||||
{ .irq = 31 }, /* INT_34XX_GPIO_BANK3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
|
||||
{ .role = "dbclk", .clk = "gpio3_dbck", },
|
||||
};
|
||||
|
|
@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_gpio3_hwmod = {
|
||||
.name = "gpio3",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio3_irqs,
|
||||
.mpu_irqs = omap2_gpio3_irqs,
|
||||
.main_clk = "gpio3_ick",
|
||||
.opt_clks = gpio3_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
|
||||
|
|
@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
|
|||
};
|
||||
|
||||
/* gpio4 */
|
||||
static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = {
|
||||
{ .irq = 32 }, /* INT_34XX_GPIO_BANK4 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
|
||||
{ .role = "dbclk", .clk = "gpio4_dbck", },
|
||||
};
|
||||
|
|
@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_gpio4_hwmod = {
|
||||
.name = "gpio4",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.mpu_irqs = omap3xxx_gpio4_irqs,
|
||||
.mpu_irqs = omap2_gpio4_irqs,
|
||||
.main_clk = "gpio4_ick",
|
||||
.opt_clks = gpio4_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
|
||||
|
|
@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
|
|||
};
|
||||
|
||||
/* dma_system */
|
||||
static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
|
||||
{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
|
||||
{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
|
||||
{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
|
|
@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = {
|
|||
static struct omap_hwmod omap3xxx_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap3xxx_dma_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_dma_system_irqs,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ick",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
|
|
@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
|
|||
};
|
||||
|
||||
/* mcspi1 */
|
||||
static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = {
|
||||
{ .name = "irq", .irq = 65 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 35 },
|
||||
{ .name = "rx0", .dma_req = 36 },
|
||||
|
|
@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap34xx_mcspi1 = {
|
||||
.name = "mcspi1",
|
||||
.mpu_irqs = omap34xx_mcspi1_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi1_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mcspi1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs),
|
||||
.main_clk = "mcspi1_fck",
|
||||
|
|
@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
|
|||
};
|
||||
|
||||
/* mcspi2 */
|
||||
static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = {
|
||||
{ .name = "irq", .irq = 66 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
|
||||
{ .name = "tx0", .dma_req = 43 },
|
||||
{ .name = "rx0", .dma_req = 44 },
|
||||
|
|
@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
|
|||
|
||||
static struct omap_hwmod omap34xx_mcspi2 = {
|
||||
.name = "mcspi2",
|
||||
.mpu_irqs = omap34xx_mcspi2_mpu_irqs,
|
||||
.mpu_irqs = omap2_mcspi2_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mcspi2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs),
|
||||
.main_clk = "mcspi2_fck",
|
||||
|
|
|
|||
|
|
@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
|
|||
extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];
|
||||
extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
|
||||
|
||||
/* Common IP block data across OMAP2xxx */
|
||||
extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[];
|
||||
|
||||
/* Common IP block data across OMAP2/3 */
|
||||
extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_dispc_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio1_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio2_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio3_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
|
||||
|
||||
/* OMAP hwmod classes - forward declarations */
|
||||
extern struct omap_hwmod_class l3_hwmod_class;
|
||||
extern struct omap_hwmod_class l4_hwmod_class;
|
||||
|
|
|
|||
Loading…
Reference in New Issue