arm64: dts: sdm845: Add lpasscc node

This adds the low pass audio clock controller node to sdm845 based on
the example in the bindings.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
[bjorn: Disabled lpasscc node, as it's normally protected]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Taniya Das 2018-12-05 13:30:36 +05:30 committed by Andy Gross
parent 0555668194
commit 0cef5dd403
2 changed files with 12 additions and 1 deletions

View File

@ -347,7 +347,9 @@
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
&i2c10 {

View File

@ -7,6 +7,7 @@
#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
#include <dt-bindings/clock/qcom,lpass-sdm845.h>
#include <dt-bindings/clock/qcom,gpucc-sdm845.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
@ -2008,6 +2009,14 @@
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
};
lpasscc: clock-controller@17014000 {
compatible = "qcom,sdm845-lpasscc";
reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
reg-names = "cc", "qdsp6ss";
#clock-cells = <1>;
status = "disabled";
};
apss_shared: mailbox@17990000 {
compatible = "qcom,sdm845-apss-shared";
reg = <0x17990000 0x1000>;