cxgb3: Add 1G fiber support
Add support for 1G optical Vitesse PHY. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -691,6 +691,7 @@ int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
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unsigned int set);
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unsigned int set);
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int t3_phy_reset(struct cphy *phy, int mmd, int wait);
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int t3_phy_reset(struct cphy *phy, int mmd, int wait);
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int t3_phy_advertise(struct cphy *phy, unsigned int advert);
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int t3_phy_advertise(struct cphy *phy, unsigned int advert);
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int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert);
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int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
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int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
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int t3_phy_lasi_intr_enable(struct cphy *phy);
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int t3_phy_lasi_intr_enable(struct cphy *phy);
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int t3_phy_lasi_intr_disable(struct cphy *phy);
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int t3_phy_lasi_intr_disable(struct cphy *phy);
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@ -407,6 +407,29 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
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return mdio_write(phy, 0, MII_ADVERTISE, val);
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return mdio_write(phy, 0, MII_ADVERTISE, val);
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}
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}
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/**
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* t3_phy_advertise_fiber - set fiber PHY advertisement register
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* @phy: the PHY to operate on
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* @advert: bitmap of capabilities the PHY should advertise
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*
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* Sets a fiber PHY's advertisement register to advertise the
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* requested capabilities.
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*/
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int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert)
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{
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unsigned int val = 0;
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if (advert & ADVERTISED_1000baseT_Half)
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val |= ADVERTISE_1000XHALF;
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if (advert & ADVERTISED_1000baseT_Full)
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val |= ADVERTISE_1000XFULL;
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if (advert & ADVERTISED_Pause)
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val |= ADVERTISE_1000XPAUSE;
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if (advert & ADVERTISED_Asym_Pause)
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val |= ADVERTISE_1000XPSE_ASYM;
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return mdio_write(phy, 0, MII_ADVERTISE, val);
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}
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/**
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/**
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* t3_set_phy_speed_duplex - force PHY speed and duplex
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* t3_set_phy_speed_duplex - force PHY speed and duplex
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* @phy: the PHY to operate on
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* @phy: the PHY to operate on
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@ -33,9 +33,13 @@
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/* VSC8211 PHY specific registers. */
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/* VSC8211 PHY specific registers. */
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enum {
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enum {
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VSC8211_SIGDET_CTRL = 19,
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VSC8211_EXT_CTRL = 23,
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VSC8211_INTR_ENABLE = 25,
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VSC8211_INTR_ENABLE = 25,
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VSC8211_INTR_STATUS = 26,
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VSC8211_INTR_STATUS = 26,
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VSC8211_LED_CTRL = 27,
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VSC8211_AUX_CTRL_STAT = 28,
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VSC8211_AUX_CTRL_STAT = 28,
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VSC8211_EXT_PAGE_AXS = 31,
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};
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};
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enum {
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enum {
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@ -50,11 +54,19 @@ enum {
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VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */
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VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */
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VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
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VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
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VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
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VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
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VSC_INTR_DPLX_CHG = 1 << 12, /* duplex change */
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VSC_INTR_LINK_CHG = 1 << 13, /* link change */
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VSC_INTR_LINK_CHG = 1 << 13, /* link change */
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VSC_INTR_SPD_CHG = 1 << 14, /* speed change */
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VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
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VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
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};
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};
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enum {
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VSC_CTRL_CLAUSE37_VIEW = 1 << 4, /* Switch to Clause 37 view */
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VSC_CTRL_MEDIA_MODE_HI = 0xf000 /* High part of media mode select */
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};
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#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
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#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
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VSC_INTR_DPLX_CHG | VSC_INTR_SPD_CHG | \
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VSC_INTR_NEG_DONE)
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VSC_INTR_NEG_DONE)
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#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
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#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
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VSC_INTR_ENABLE)
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VSC_INTR_ENABLE)
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@ -184,6 +196,112 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
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return 0;
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return 0;
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}
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}
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static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
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int *speed, int *duplex, int *fc)
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{
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unsigned int bmcr, status, lpa, adv;
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int err, sp = -1, dplx = -1, pause = 0;
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err = mdio_read(cphy, 0, MII_BMCR, &bmcr);
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if (!err)
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err = mdio_read(cphy, 0, MII_BMSR, &status);
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if (err)
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return err;
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if (link_ok) {
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/*
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* BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
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* once more to get the current link state.
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*/
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if (!(status & BMSR_LSTATUS))
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err = mdio_read(cphy, 0, MII_BMSR, &status);
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if (err)
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return err;
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*link_ok = (status & BMSR_LSTATUS) != 0;
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}
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if (!(bmcr & BMCR_ANENABLE)) {
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dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
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if (bmcr & BMCR_SPEED1000)
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sp = SPEED_1000;
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else if (bmcr & BMCR_SPEED100)
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sp = SPEED_100;
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else
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sp = SPEED_10;
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} else if (status & BMSR_ANEGCOMPLETE) {
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err = mdio_read(cphy, 0, MII_LPA, &lpa);
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if (!err)
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err = mdio_read(cphy, 0, MII_ADVERTISE, &adv);
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if (err)
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return err;
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if (adv & lpa & ADVERTISE_1000XFULL) {
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dplx = DUPLEX_FULL;
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sp = SPEED_1000;
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} else if (adv & lpa & ADVERTISE_1000XHALF) {
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dplx = DUPLEX_HALF;
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sp = SPEED_1000;
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}
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if (fc && dplx == DUPLEX_FULL) {
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if (lpa & adv & ADVERTISE_1000XPAUSE)
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pause = PAUSE_RX | PAUSE_TX;
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else if ((lpa & ADVERTISE_1000XPAUSE) &&
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(adv & lpa & ADVERTISE_1000XPSE_ASYM))
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pause = PAUSE_TX;
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else if ((lpa & ADVERTISE_1000XPSE_ASYM) &&
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(adv & ADVERTISE_1000XPAUSE))
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pause = PAUSE_RX;
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}
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}
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if (speed)
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*speed = sp;
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if (duplex)
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*duplex = dplx;
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if (fc)
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*fc = pause;
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return 0;
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}
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/*
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* Enable/disable auto MDI/MDI-X in forced link speed mode.
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*/
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static int vsc8211_set_automdi(struct cphy *phy, int enable)
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{
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int err;
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err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5);
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if (err)
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return err;
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err = mdio_write(phy, 0, 18, 0x12);
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if (err)
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return err;
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err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003);
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if (err)
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return err;
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err = mdio_write(phy, 0, 16, 0x87fa);
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if (err)
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return err;
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err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
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if (err)
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return err;
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return 0;
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}
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int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex)
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{
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int err;
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err = t3_set_phy_speed_duplex(phy, speed, duplex);
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if (!err)
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err = vsc8211_set_automdi(phy, 1);
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return err;
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}
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static int vsc8211_power_down(struct cphy *cphy, int enable)
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static int vsc8211_power_down(struct cphy *cphy, int enable)
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{
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{
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return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
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return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
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@ -221,12 +339,66 @@ static struct cphy_ops vsc8211_ops = {
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.power_down = vsc8211_power_down,
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.power_down = vsc8211_power_down,
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};
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};
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static struct cphy_ops vsc8211_fiber_ops = {
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.reset = vsc8211_reset,
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.intr_enable = vsc8211_intr_enable,
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.intr_disable = vsc8211_intr_disable,
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.intr_clear = vsc8211_intr_clear,
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.intr_handler = vsc8211_intr_handler,
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.autoneg_enable = vsc8211_autoneg_enable,
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.autoneg_restart = vsc8211_autoneg_restart,
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.advertise = t3_phy_advertise_fiber,
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.set_speed_duplex = t3_set_phy_speed_duplex,
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.get_link_status = vsc8211_get_link_status_fiber,
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.power_down = vsc8211_power_down,
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};
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int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
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int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
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int phy_addr, const struct mdio_ops *mdio_ops)
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int phy_addr, const struct mdio_ops *mdio_ops)
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{
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{
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int err;
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unsigned int val;
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cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
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cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
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SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
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SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
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SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
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SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
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SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
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SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
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msleep(20); /* PHY needs ~10ms to start responding to MDIO */
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err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val);
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if (err)
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return err;
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if (val & VSC_CTRL_MEDIA_MODE_HI) {
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/* copper interface, just need to configure the LEDs */
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return mdio_write(phy, 0, VSC8211_LED_CTRL, 0x100);
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}
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phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
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SUPPORTED_MII | SUPPORTED_FIBRE | SUPPORTED_IRQ;
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phy->desc = "1000BASE-X";
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phy->ops = &vsc8211_fiber_ops;
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err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 1);
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if (err)
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return err;
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err = mdio_write(phy, 0, VSC8211_SIGDET_CTRL, 1);
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if (err)
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return err;
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err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
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if (err)
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return err;
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err = mdio_write(phy, 0, VSC8211_EXT_CTRL,
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val | VSC_CTRL_CLAUSE37_VIEW);
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if (err)
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return err;
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err = vsc8211_reset(phy, 0);
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if (err)
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return err;
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udelay(5); /* delay after reset before next SMI */
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return 0;
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return 0;
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}
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}
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