dma-mapping: move the arm64 noncoherent alloc/free support to common code
The arm64 codebase to implement coherent dma allocation for architectures with non-coherent DMA is a good start for a generic implementation, given that is uses the generic remap helpers, provides the atomic pool for allocations that can't sleep and still is realtively simple and well tested. Move it to kernel/dma and allow architectures to opt into it using a config symbol. Architectures just need to provide a new arch_dma_prep_coherent helper to writeback an invalidate the caches for any memory that gets remapped for uncached access. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
This commit is contained in:
Christoph Hellwig
parent
f0edfea8ef
commit
0c3b3171ce
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@ -82,7 +82,7 @@ config ARM64
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select CRC32
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select DCACHE_WORD_ACCESS
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select DMA_DIRECT_OPS
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select DMA_REMAP
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select DMA_DIRECT_REMAP
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select EDAC_SUPPORT
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select FRAME_POINTER
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select GENERIC_ALLOCATOR
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@ -33,113 +33,6 @@
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#include <asm/cacheflush.h>
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static struct gen_pool *atomic_pool __ro_after_init;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
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{
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unsigned long val;
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void *ptr = NULL;
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if (!atomic_pool) {
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WARN(1, "coherent pool not initialised!\n");
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return NULL;
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}
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val = gen_pool_alloc(atomic_pool, size);
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if (val) {
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phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
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*ret_page = phys_to_page(phys);
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ptr = (void *)val;
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memset(ptr, 0, size);
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}
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return ptr;
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}
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static bool __in_atomic_pool(void *start, size_t size)
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{
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return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}
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static int __free_from_pool(void *start, size_t size)
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{
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if (!__in_atomic_pool(start, size))
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return 0;
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gen_pool_free(atomic_pool, (unsigned long)start, size);
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return 1;
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}
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flags, unsigned long attrs)
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{
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struct page *page;
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void *ptr, *coherent_ptr;
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pgprot_t prot = pgprot_writecombine(PAGE_KERNEL);
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size = PAGE_ALIGN(size);
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if (!gfpflags_allow_blocking(flags)) {
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struct page *page = NULL;
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void *addr = __alloc_from_pool(size, &page, flags);
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if (addr)
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*dma_handle = phys_to_dma(dev, page_to_phys(page));
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return addr;
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}
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ptr = dma_direct_alloc_pages(dev, size, dma_handle, flags, attrs);
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if (!ptr)
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goto no_mem;
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/* remove any dirty cache lines on the kernel alias */
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__dma_flush_area(ptr, size);
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/* create a coherent mapping */
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page = virt_to_page(ptr);
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coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
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prot, __builtin_return_address(0));
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if (!coherent_ptr)
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goto no_map;
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return coherent_ptr;
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no_map:
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dma_direct_free_pages(dev, size, ptr, *dma_handle, attrs);
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no_mem:
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return NULL;
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}
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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if (!__free_from_pool(vaddr, PAGE_ALIGN(size))) {
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void *kaddr = phys_to_virt(dma_to_phys(dev, dma_handle));
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vunmap(vaddr);
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dma_direct_free_pages(dev, size, kaddr, dma_handle, attrs);
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}
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}
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long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
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dma_addr_t dma_addr)
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{
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return __phys_to_pfn(dma_to_phys(dev, dma_addr));
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}
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pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
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unsigned long attrs)
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{
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@ -160,6 +53,11 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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__dma_unmap_area(phys_to_virt(paddr), size, dir);
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}
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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__dma_flush_area(page_address(page), size);
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}
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#ifdef CONFIG_IOMMU_DMA
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static int __swiotlb_get_sgtable_page(struct sg_table *sgt,
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struct page *page, size_t size)
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@ -191,67 +89,6 @@ static int __swiotlb_mmap_pfn(struct vm_area_struct *vma,
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}
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#endif /* CONFIG_IOMMU_DMA */
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static int __init atomic_pool_init(void)
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{
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pgprot_t prot = __pgprot(PROT_NORMAL_NC);
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unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
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struct page *page;
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void *addr;
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unsigned int pool_size_order = get_order(atomic_pool_size);
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, nr_pages,
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pool_size_order, false);
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else
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page = alloc_pages(GFP_DMA32, pool_size_order);
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if (page) {
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int ret;
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void *page_addr = page_address(page);
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memset(page_addr, 0, atomic_pool_size);
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__dma_flush_area(page_addr, atomic_pool_size);
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atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (!atomic_pool)
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goto free_page;
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addr = dma_common_contiguous_remap(page, atomic_pool_size,
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VM_USERMAP, prot, atomic_pool_init);
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if (!addr)
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goto destroy_genpool;
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ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
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page_to_phys(page),
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atomic_pool_size, -1);
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if (ret)
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goto remove_mapping;
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gen_pool_set_algo(atomic_pool,
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gen_pool_first_fit_order_align,
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NULL);
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pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
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atomic_pool_size / 1024);
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return 0;
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}
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goto out;
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remove_mapping:
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dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
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destroy_genpool:
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gen_pool_destroy(atomic_pool);
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atomic_pool = NULL;
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free_page:
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if (!dma_release_from_contiguous(NULL, page, nr_pages))
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__free_pages(page, pool_size_order);
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out:
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pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
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atomic_pool_size / 1024);
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return -ENOMEM;
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}
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/********************************************
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* The following APIs are for dummy DMA ops *
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********************************************/
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@ -350,8 +187,7 @@ static int __init arm64_dma_init(void)
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TAINT_CPU_OUT_OF_SPEC,
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"ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
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ARCH_DMA_MINALIGN, cache_line_size());
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return atomic_pool_init();
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return dma_atomic_pool_init(GFP_DMA32, __pgprot(PROT_NORMAL_NC));
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}
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arch_initcall(arm64_dma_init);
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@ -397,7 +233,7 @@ static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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page = alloc_pages(gfp, get_order(size));
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addr = page ? page_address(page) : NULL;
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} else {
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addr = __alloc_from_pool(size, &page, gfp);
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addr = dma_alloc_from_pool(size, &page, gfp);
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}
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if (!addr)
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return NULL;
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@ -407,7 +243,7 @@ static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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if (coherent)
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__free_pages(page, get_order(size));
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else
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__free_from_pool(addr, size);
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dma_free_from_pool(addr, size);
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addr = NULL;
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}
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} else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
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@ -471,9 +307,9 @@ static void __iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
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* coherent devices.
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* Hence how dodgy the below logic looks...
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*/
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if (__in_atomic_pool(cpu_addr, size)) {
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if (dma_in_atomic_pool(cpu_addr, size)) {
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iommu_dma_unmap_page(dev, handle, iosize, 0, 0);
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__free_from_pool(cpu_addr, size);
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dma_free_from_pool(cpu_addr, size);
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} else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
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struct page *page = vmalloc_to_page(cpu_addr);
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@ -455,6 +455,11 @@ void *dma_common_pages_remap(struct page **pages, size_t size,
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const void *caller);
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void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
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int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot);
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bool dma_in_atomic_pool(void *start, size_t size);
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void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags);
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bool dma_free_from_pool(void *start, size_t size);
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/**
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* dma_mmap_attrs - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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@ -69,4 +69,6 @@ static inline void arch_sync_dma_for_cpu_all(struct device *dev)
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}
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#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
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void arch_dma_prep_coherent(struct page *page, size_t size);
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#endif /* _LINUX_DMA_NONCOHERENT_H */
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@ -55,3 +55,8 @@ config SWIOTLB
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config DMA_REMAP
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depends on MMU
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bool
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config DMA_DIRECT_REMAP
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bool
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depends on DMA_DIRECT_OPS
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select DMA_REMAP
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@ -1,8 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (c) 2014 The Linux Foundation
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*/
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#include <linux/dma-mapping.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-contiguous.h>
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#include <linux/init.h>
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#include <linux/genalloc.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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@ -86,3 +91,154 @@ void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags)
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unmap_kernel_range((unsigned long)cpu_addr, PAGE_ALIGN(size));
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vunmap(cpu_addr);
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}
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#ifdef CONFIG_DMA_DIRECT_REMAP
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static struct gen_pool *atomic_pool __ro_after_init;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot)
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{
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unsigned int pool_size_order = get_order(atomic_pool_size);
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unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
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struct page *page;
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void *addr;
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int ret;
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, nr_pages,
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pool_size_order, false);
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else
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page = alloc_pages(gfp, pool_size_order);
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if (!page)
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goto out;
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memset(page_address(page), 0, atomic_pool_size);
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arch_dma_prep_coherent(page, atomic_pool_size);
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atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (!atomic_pool)
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goto free_page;
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addr = dma_common_contiguous_remap(page, atomic_pool_size, VM_USERMAP,
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prot, __builtin_return_address(0));
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if (!addr)
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goto destroy_genpool;
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ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
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page_to_phys(page), atomic_pool_size, -1);
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if (ret)
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goto remove_mapping;
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gen_pool_set_algo(atomic_pool, gen_pool_first_fit_order_align, NULL);
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pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
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atomic_pool_size / 1024);
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return 0;
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remove_mapping:
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dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
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destroy_genpool:
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gen_pool_destroy(atomic_pool);
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atomic_pool = NULL;
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free_page:
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if (!dma_release_from_contiguous(NULL, page, nr_pages))
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__free_pages(page, pool_size_order);
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out:
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pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
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atomic_pool_size / 1024);
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return -ENOMEM;
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}
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bool dma_in_atomic_pool(void *start, size_t size)
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{
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return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}
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void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
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{
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unsigned long val;
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void *ptr = NULL;
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if (!atomic_pool) {
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WARN(1, "coherent pool not initialised!\n");
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return NULL;
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}
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val = gen_pool_alloc(atomic_pool, size);
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if (val) {
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phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
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*ret_page = pfn_to_page(__phys_to_pfn(phys));
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ptr = (void *)val;
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memset(ptr, 0, size);
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}
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return ptr;
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}
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bool dma_free_from_pool(void *start, size_t size)
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{
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if (!dma_in_atomic_pool(start, size))
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return false;
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gen_pool_free(atomic_pool, (unsigned long)start, size);
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return true;
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}
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flags, unsigned long attrs)
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{
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struct page *page = NULL;
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void *ret, *kaddr;
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size = PAGE_ALIGN(size);
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if (!gfpflags_allow_blocking(flags)) {
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ret = dma_alloc_from_pool(size, &page, flags);
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if (!ret)
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return NULL;
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*dma_handle = phys_to_dma(dev, page_to_phys(page));
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return ret;
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}
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kaddr = dma_direct_alloc_pages(dev, size, dma_handle, flags, attrs);
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if (!kaddr)
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return NULL;
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page = virt_to_page(kaddr);
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/* remove any dirty cache lines on the kernel alias */
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arch_dma_prep_coherent(page, size);
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/* create a coherent mapping */
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ret = dma_common_contiguous_remap(page, size, VM_USERMAP,
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arch_dma_mmap_pgprot(dev, PAGE_KERNEL, attrs),
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__builtin_return_address(0));
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if (!ret)
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dma_direct_free_pages(dev, size, kaddr, *dma_handle, attrs);
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return ret;
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}
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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if (!dma_free_from_pool(vaddr, PAGE_ALIGN(size))) {
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void *kaddr = phys_to_virt(dma_to_phys(dev, dma_handle));
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vunmap(vaddr);
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dma_direct_free_pages(dev, size, kaddr, dma_handle, attrs);
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}
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}
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long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
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dma_addr_t dma_addr)
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{
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return __phys_to_pfn(dma_to_phys(dev, dma_addr));
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}
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#endif /* CONFIG_DMA_DIRECT_REMAP */
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