Blackfin arch: Move all the silicon rev handling to one place
Move all the silicon rev handling to one place (Kconfig) and make sure we warn if you are running on silicon that has not been tested on Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -166,6 +166,19 @@ config BF561
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endchoice
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config BF_REV_MIN
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int
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default 0 if (BF52x || BF54x)
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default 2 if (BF537 || BF536 || BF534)
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default 3 if (BF561 ||BF533 || BF532 || BF531)
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config BF_REV_MAX
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int
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default 2 if (BF52x || BF54x)
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default 3 if (BF537 || BF536 || BF534)
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default 5 if (BF561)
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default 6 if (BF533 || BF532 || BF531)
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choice
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prompt "Silicon Rev"
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default BF_REV_0_1 if (BF52x || BF54x)
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@ -821,9 +821,10 @@ void __init setup_arch(char **cmdline_p)
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printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
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bfin_compiled_revid(), bfin_revid());
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}
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if (bfin_revid() < SUPPORTED_REVID)
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if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
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printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
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CPU, bfin_revid());
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printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
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printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
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@ -30,8 +30,6 @@
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#ifndef __MACH_BF527_H__
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#define __MACH_BF527_H__
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#define SUPPORTED_REVID 2
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#define OFFSET_(x) ((x) & 0x0000FFFF)
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/*some misc defines*/
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@ -30,8 +30,6 @@
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#ifndef __MACH_BF533_H__
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#define __MACH_BF533_H__
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#define SUPPORTED_REVID 2
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#define OFFSET_(x) ((x) & 0x0000FFFF)
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/*some misc defines*/
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@ -30,8 +30,6 @@
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#ifndef __MACH_BF537_H__
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#define __MACH_BF537_H__
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#define SUPPORTED_REVID 2
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/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
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#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */
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@ -30,8 +30,6 @@
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#ifndef __MACH_BF548_H__
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#define __MACH_BF548_H__
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#define SUPPORTED_REVID 0
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#define OFFSET_(x) ((x) & 0x0000FFFF)
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/*some misc defines*/
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@ -30,8 +30,6 @@
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#ifndef __MACH_BF561_H__
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#define __MACH_BF561_H__
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#define SUPPORTED_REVID 0x3
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#define OFFSET_(x) ((x) & 0x0000FFFF)
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/*some misc defines*/
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