drm/i915: workaround IGD i2c bus issue in kernel side (v2)
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c access will be wrong. v2: Disable CLOCK_GATE_DISABLE bit after bit bashing as suggested by Eric. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -526,6 +526,7 @@
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#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
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#define D_STATE 0x6104
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#define CG_2D_DIS 0x6200
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#define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24)
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#define CG_3D_DIS 0x6204
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/*
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@ -109,7 +109,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
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void intel_i2c_destroy(struct intel_i2c_chan *chan);
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int intel_ddc_get_modes(struct intel_output *intel_output);
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extern bool intel_ddc_probe(struct intel_output *intel_output);
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void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
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extern void intel_crt_init(struct drm_device *dev);
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extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
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extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
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@ -34,6 +34,21 @@
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#include "i915_drm.h"
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#include "i915_drv.h"
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void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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/* When using bit bashing for I2C, this bit needs to be set to 1 */
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if (!IS_IGD(dev))
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return;
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if (enable)
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I915_WRITE(CG_2D_DIS,
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I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
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else
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I915_WRITE(CG_2D_DIS,
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I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE));
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}
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/*
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* Intel GPIO access functions
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*/
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@ -153,8 +168,10 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
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goto out_free;
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/* JJJ: raise SCL and SDA? */
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intel_i2c_quirk_set(dev, true);
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set_data(chan, 1);
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set_clock(chan, 1);
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intel_i2c_quirk_set(dev, false);
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udelay(20);
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return chan;
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@ -27,6 +27,7 @@
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#include <linux/fb.h>
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#include "drmP.h"
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#include "intel_drv.h"
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#include "i915_drv.h"
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/**
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* intel_ddc_probe
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@ -52,7 +53,10 @@ bool intel_ddc_probe(struct intel_output *intel_output)
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}
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};
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intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
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ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2);
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intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
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if (ret == 2)
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return true;
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@ -70,8 +74,10 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
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struct edid *edid;
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int ret = 0;
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intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
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edid = drm_get_edid(&intel_output->base,
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&intel_output->ddc_bus->adapter);
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intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
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if (edid) {
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drm_mode_connector_update_edid_property(&intel_output->base,
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edid);
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