edac: move EDAC PCI definitions to drivers/edac/edac_pci.h
The edac_core.h header contain data structures and function definitions for the 3 parts of EDAC: MC, PCI and device. Let's move the PCI ones to a separate header file, as part of a header reorganization. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
fd77f6ba7b
commit
0b892c7177
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@ -35,8 +35,7 @@
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#include <linux/workqueue.h>
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#include <linux/edac.h>
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#define EDAC_DEVICE_NAME_LEN 31
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#define EDAC_ATTRIB_VALUE_LEN 15
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#include "edac_pci.h"
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#if PAGE_SHIFT < 20
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#define PAGES_TO_MiB(pages) ((pages) >> (20 - PAGE_SHIFT))
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@ -321,128 +320,6 @@ extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
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extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
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#ifdef CONFIG_PCI
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struct edac_pci_counter {
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atomic_t pe_count;
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atomic_t npe_count;
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};
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/*
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* Abstract edac_pci control info structure
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*
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*/
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struct edac_pci_ctl_info {
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/* for global list of edac_pci_ctl_info structs */
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struct list_head link;
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int pci_idx;
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struct bus_type *edac_subsys; /* pointer to subsystem */
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/* the internal state of this controller instance */
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int op_state;
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/* work struct for this instance */
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struct delayed_work work;
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/* pointer to edac polling checking routine:
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* If NOT NULL: points to polling check routine
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* If NULL: Then assumes INTERRUPT operation, where
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* MC driver will receive events
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*/
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void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
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struct device *dev; /* pointer to device structure */
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const char *mod_name; /* module name */
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const char *ctl_name; /* edac controller name */
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const char *dev_name; /* pci/platform/etc... name */
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void *pvt_info; /* pointer to 'private driver' info */
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unsigned long start_time; /* edac_pci load start time (jiffies) */
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struct completion complete;
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/* sysfs top name under 'edac' directory
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* and instance name:
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* cpu/cpu0/...
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* cpu/cpu1/...
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* cpu/cpu2/...
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* ...
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*/
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char name[EDAC_DEVICE_NAME_LEN + 1];
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/* Event counters for the this whole EDAC Device */
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struct edac_pci_counter counters;
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/* edac sysfs device control for the 'name'
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* device this structure controls
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*/
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struct kobject kobj;
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};
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#define to_edac_pci_ctl_work(w) \
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container_of(w, struct edac_pci_ctl_info,work)
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/* write all or some bits in a byte-register*/
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static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
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u8 mask)
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{
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if (mask != 0xff) {
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u8 buf;
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pci_read_config_byte(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_byte(pdev, offset, value);
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}
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/* write all or some bits in a word-register*/
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static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
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u16 value, u16 mask)
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{
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if (mask != 0xffff) {
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u16 buf;
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pci_read_config_word(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_word(pdev, offset, value);
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}
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/*
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* pci_write_bits32
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*
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* edac local routine to do pci_write_config_dword, but adds
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* a mask parameter. If mask is all ones, ignore the mask.
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* Otherwise utilize the mask to isolate specified bits
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*
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* write all or some bits in a dword-register
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*/
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static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
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u32 value, u32 mask)
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{
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if (mask != 0xffffffff) {
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u32 buf;
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pci_read_config_dword(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_dword(pdev, offset, value);
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}
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#endif /* CONFIG_PCI */
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struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
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unsigned n_layers,
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struct edac_mc_layer *layers,
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@ -485,26 +362,6 @@ extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
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extern int edac_device_alloc_index(void);
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extern const char *edac_layer_name[];
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/*
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* edac_pci APIs
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*/
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extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
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const char *edac_pci_name);
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extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
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extern int edac_pci_alloc_index(void);
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extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
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extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
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extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
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struct device *dev,
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const char *mod_name);
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extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
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extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
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extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
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/*
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* edac misc APIs
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*/
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@ -9,22 +9,19 @@
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* or implied.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/sysctl.h>
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#include <linux/highmem.h>
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#include <linux/timer.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <linux/ctype.h>
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#include <linux/workqueue.h>
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#include <asm/uaccess.h>
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#include <asm/page.h>
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#include <asm/uaccess.h>
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#include <linux/ctype.h>
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#include <linux/highmem.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/sysctl.h>
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#include <linux/timer.h>
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#include "edac_core.h"
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#include "edac_pci.h"
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#include "edac_module.h"
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static DEFINE_MUTEX(edac_pci_ctls_mutex);
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@ -0,0 +1,173 @@
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/*
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* Defines, structures, APIs for edac_pci and edac_pci_sysfs
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*
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* (C) 2007 Linux Networx (http://lnxi.com)
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* This file may be distributed under the terms of the
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* GNU General Public License.
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*
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* Written by Thayne Harbaugh
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* Based on work by Dan Hollis <goemon at anime dot net> and others.
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* http://www.anime.net/~goemon/linux-ecc/
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*
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* NMI handling support added by
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* Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
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*
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* Refactored for multi-source files:
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* Doug Thompson <norsk5@xmission.com>
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*
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* Please look at Documentation/driver-api/edac.rst for more info about
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* EDAC core structs and functions.
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*/
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#ifndef _EDAC_PCI_H_
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#define _EDAC_PCI_H_
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#include <linux/completion.h>
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#include <linux/device.h>
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#include <linux/edac.h>
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#include <linux/kobject.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/types.h>
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#include <linux/workqueue.h>
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#ifdef CONFIG_PCI
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struct edac_pci_counter {
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atomic_t pe_count;
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atomic_t npe_count;
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};
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/*
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* Abstract edac_pci control info structure
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*
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*/
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struct edac_pci_ctl_info {
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/* for global list of edac_pci_ctl_info structs */
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struct list_head link;
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int pci_idx;
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struct bus_type *edac_subsys; /* pointer to subsystem */
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/* the internal state of this controller instance */
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int op_state;
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/* work struct for this instance */
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struct delayed_work work;
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/* pointer to edac polling checking routine:
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* If NOT NULL: points to polling check routine
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* If NULL: Then assumes INTERRUPT operation, where
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* MC driver will receive events
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*/
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void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
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struct device *dev; /* pointer to device structure */
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const char *mod_name; /* module name */
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const char *ctl_name; /* edac controller name */
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const char *dev_name; /* pci/platform/etc... name */
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void *pvt_info; /* pointer to 'private driver' info */
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unsigned long start_time; /* edac_pci load start time (jiffies) */
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struct completion complete;
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/* sysfs top name under 'edac' directory
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* and instance name:
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* cpu/cpu0/...
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* cpu/cpu1/...
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* cpu/cpu2/...
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* ...
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*/
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char name[EDAC_DEVICE_NAME_LEN + 1];
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/* Event counters for the this whole EDAC Device */
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struct edac_pci_counter counters;
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/* edac sysfs device control for the 'name'
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* device this structure controls
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*/
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struct kobject kobj;
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};
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#define to_edac_pci_ctl_work(w) \
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container_of(w, struct edac_pci_ctl_info,work)
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/* write all or some bits in a byte-register*/
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static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
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u8 mask)
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{
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if (mask != 0xff) {
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u8 buf;
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pci_read_config_byte(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_byte(pdev, offset, value);
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}
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/* write all or some bits in a word-register*/
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static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
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u16 value, u16 mask)
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{
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if (mask != 0xffff) {
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u16 buf;
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pci_read_config_word(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_word(pdev, offset, value);
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}
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/*
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* pci_write_bits32
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*
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* edac local routine to do pci_write_config_dword, but adds
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* a mask parameter. If mask is all ones, ignore the mask.
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* Otherwise utilize the mask to isolate specified bits
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*
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* write all or some bits in a dword-register
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*/
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static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
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u32 value, u32 mask)
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{
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if (mask != 0xffffffff) {
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u32 buf;
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pci_read_config_dword(pdev, offset, &buf);
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value &= mask;
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buf &= ~mask;
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value |= buf;
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}
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pci_write_config_dword(pdev, offset, value);
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}
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#endif /* CONFIG_PCI */
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extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
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const char *edac_pci_name);
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extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
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extern int edac_pci_alloc_index(void);
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extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
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extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
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extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
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struct device *dev,
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const char *mod_name);
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extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
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extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
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extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
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#endif
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@ -11,7 +11,7 @@
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#include <linux/slab.h>
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#include <linux/ctype.h>
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#include "edac_core.h"
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#include "edac_pci.h"
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#include "edac_module.h"
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#define EDAC_PCI_SYMLINK "device"
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@ -18,6 +18,8 @@
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#include <linux/workqueue.h>
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#include <linux/debugfs.h>
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#define EDAC_DEVICE_NAME_LEN 31
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struct device;
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#define EDAC_OPSTATE_INVAL -1
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