rtlwifi
* fix broken VHT (802.11ac) support, reported by Linus wlcore * fix firmware initialisation regression on wl1271 iwlwifi * fix a race that users reported when we try to load the firmware and the hardware rfkill interrupt triggers at the same time * fix a very visible bug in scheduled scan: the firmware doesn't support scheduled scan with no profile configured and the supplicant sometimes requests such scheduled scans * build system fix to be able to link iwlwifi statically into kernel * firmware name update for 8265 * typo fix in return value -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJWxeC3AAoJEG4XJFUm622b7TsIAKvQbraTnmKoZvhrNH3vS5nv MHv08W7khkRtAeGN5pX6sg5+chOVm185TA7G8tRl9agBsht+ZHvXTx5wCjwRCW05 1I0+ONMxtPf6vAPuJ92K8A7vOtPSylK1X6CiahZzGqVBhry6fDqfvxCgVB1lwAot Pa4LClwjCfpwpkwQ64EKMr+ByUMrWOW9ALaBSzx7WrBVIBjihKC8Gy7/jAGSEB+H xQkaYC2e+FrNRr3Dsl/2XJ7QsvePkRoU/ta+mRIvbW/fCX6mSMe5zwbmABhGZaje M3HdQXJJ3J+oYPq+wdH7P96yZY1pvJg6HSfzdcd+mVGtPu8hDGU2MWP7o6aob7E= =7dY6 -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-for-davem-2016-02-18' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers Kalle Valo says: ==================== rtlwifi * fix broken VHT (802.11ac) support, reported by Linus wlcore * fix firmware initialisation regression on wl1271 iwlwifi * fix a race that users reported when we try to load the firmware and the hardware rfkill interrupt triggers at the same time * fix a very visible bug in scheduled scan: the firmware doesn't support scheduled scan with no profile configured and the supplicant sometimes requests such scheduled scans * build system fix to be able to link iwlwifi statically into kernel * firmware name update for 8265 * typo fix in return value ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
0b7662cf97
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@ -53,7 +53,6 @@ config IWLWIFI_LEDS
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|||
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config IWLDVM
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tristate "Intel Wireless WiFi DVM Firmware support"
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depends on m
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help
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This is the driver that supports the DVM firmware. The list
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of the devices that use this firmware is available here:
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|
|
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@ -7,6 +7,7 @@
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*
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* Copyright(c) 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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|
@ -70,12 +71,15 @@
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/* Highest firmware API version supported */
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#define IWL8000_UCODE_API_MAX 20
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#define IWL8265_UCODE_API_MAX 20
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/* Oldest version we won't warn about */
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#define IWL8000_UCODE_API_OK 13
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#define IWL8265_UCODE_API_OK 20
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/* Lowest firmware API version supported */
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#define IWL8000_UCODE_API_MIN 13
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#define IWL8265_UCODE_API_MIN 20
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/* NVM versions */
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#define IWL8000_NVM_VERSION 0x0a1d
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@ -93,6 +97,10 @@
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#define IWL8000_MODULE_FIRMWARE(api) \
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IWL8000_FW_PRE "-" __stringify(api) ".ucode"
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#define IWL8265_FW_PRE "iwlwifi-8265-"
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#define IWL8265_MODULE_FIRMWARE(api) \
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IWL8265_FW_PRE __stringify(api) ".ucode"
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#define NVM_HW_SECTION_NUM_FAMILY_8000 10
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#define DEFAULT_NVM_FILE_FAMILY_8000B "nvmData-8000B"
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#define DEFAULT_NVM_FILE_FAMILY_8000C "nvmData-8000C"
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@ -144,10 +152,7 @@ static const struct iwl_tt_params iwl8000_tt_params = {
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.support_tx_backoff = true,
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};
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#define IWL_DEVICE_8000 \
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.ucode_api_max = IWL8000_UCODE_API_MAX, \
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.ucode_api_ok = IWL8000_UCODE_API_OK, \
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.ucode_api_min = IWL8000_UCODE_API_MIN, \
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#define IWL_DEVICE_8000_COMMON \
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.device_family = IWL_DEVICE_FAMILY_8000, \
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.max_inst_size = IWL60_RTC_INST_SIZE, \
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.max_data_size = IWL60_RTC_DATA_SIZE, \
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@ -167,10 +172,28 @@ static const struct iwl_tt_params iwl8000_tt_params = {
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.thermal_params = &iwl8000_tt_params, \
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.apmg_not_supported = true
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#define IWL_DEVICE_8000 \
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IWL_DEVICE_8000_COMMON, \
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.ucode_api_max = IWL8000_UCODE_API_MAX, \
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.ucode_api_ok = IWL8000_UCODE_API_OK, \
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.ucode_api_min = IWL8000_UCODE_API_MIN \
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#define IWL_DEVICE_8260 \
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IWL_DEVICE_8000_COMMON, \
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.ucode_api_max = IWL8000_UCODE_API_MAX, \
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.ucode_api_ok = IWL8000_UCODE_API_OK, \
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.ucode_api_min = IWL8000_UCODE_API_MIN \
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#define IWL_DEVICE_8265 \
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IWL_DEVICE_8000_COMMON, \
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.ucode_api_max = IWL8265_UCODE_API_MAX, \
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.ucode_api_ok = IWL8265_UCODE_API_OK, \
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.ucode_api_min = IWL8265_UCODE_API_MIN \
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const struct iwl_cfg iwl8260_2n_cfg = {
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.name = "Intel(R) Dual Band Wireless N 8260",
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.fw_name_pre = IWL8000_FW_PRE,
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IWL_DEVICE_8000,
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IWL_DEVICE_8260,
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.ht_params = &iwl8000_ht_params,
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.nvm_ver = IWL8000_NVM_VERSION,
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.nvm_calib_ver = IWL8000_TX_POWER_VERSION,
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@ -179,7 +202,7 @@ const struct iwl_cfg iwl8260_2n_cfg = {
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const struct iwl_cfg iwl8260_2ac_cfg = {
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.name = "Intel(R) Dual Band Wireless AC 8260",
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.fw_name_pre = IWL8000_FW_PRE,
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IWL_DEVICE_8000,
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IWL_DEVICE_8260,
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.ht_params = &iwl8000_ht_params,
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.nvm_ver = IWL8000_NVM_VERSION,
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.nvm_calib_ver = IWL8000_TX_POWER_VERSION,
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@ -188,8 +211,8 @@ const struct iwl_cfg iwl8260_2ac_cfg = {
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const struct iwl_cfg iwl8265_2ac_cfg = {
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.name = "Intel(R) Dual Band Wireless AC 8265",
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.fw_name_pre = IWL8000_FW_PRE,
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IWL_DEVICE_8000,
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.fw_name_pre = IWL8265_FW_PRE,
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IWL_DEVICE_8265,
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.ht_params = &iwl8000_ht_params,
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.nvm_ver = IWL8000_NVM_VERSION,
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.nvm_calib_ver = IWL8000_TX_POWER_VERSION,
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@ -209,7 +232,7 @@ const struct iwl_cfg iwl4165_2ac_cfg = {
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const struct iwl_cfg iwl8260_2ac_sdio_cfg = {
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.name = "Intel(R) Dual Band Wireless-AC 8260",
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.fw_name_pre = IWL8000_FW_PRE,
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IWL_DEVICE_8000,
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IWL_DEVICE_8260,
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.ht_params = &iwl8000_ht_params,
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.nvm_ver = IWL8000_NVM_VERSION,
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.nvm_calib_ver = IWL8000_TX_POWER_VERSION,
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@ -236,3 +259,4 @@ const struct iwl_cfg iwl4165_2ac_sdio_cfg = {
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};
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MODULE_FIRMWARE(IWL8000_MODULE_FIRMWARE(IWL8000_UCODE_API_OK));
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MODULE_FIRMWARE(IWL8265_MODULE_FIRMWARE(IWL8265_UCODE_API_OK));
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@ -243,8 +243,10 @@ static int iwl_request_firmware(struct iwl_drv *drv, bool first)
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if (drv->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
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char rev_step = 'A' + CSR_HW_REV_STEP(drv->trans->hw_rev);
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snprintf(drv->firmware_name, sizeof(drv->firmware_name),
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"%s%c-%s.ucode", name_pre, rev_step, tag);
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if (rev_step != 'A')
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snprintf(drv->firmware_name,
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sizeof(drv->firmware_name), "%s%c-%s.ucode",
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name_pre, rev_step, tag);
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}
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IWL_DEBUG_INFO(drv, "attempting to load firmware %s'%s'\n",
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@ -1298,6 +1298,10 @@ int iwl_mvm_sched_scan_start(struct iwl_mvm *mvm,
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return -EBUSY;
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}
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/* we don't support "match all" in the firmware */
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if (!req->n_match_sets)
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return -EOPNOTSUPP;
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ret = iwl_mvm_check_running_scans(mvm, type);
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if (ret)
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return ret;
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@ -490,6 +490,15 @@ static inline void iwl_enable_interrupts(struct iwl_trans *trans)
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iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);
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}
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static inline void iwl_enable_fw_load_int(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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IWL_DEBUG_ISR(trans, "Enabling FW load interrupt\n");
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trans_pcie->inta_mask = CSR_INT_BIT_FH_TX;
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iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask);
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}
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static inline void iwl_enable_rfkill_int(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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|
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@ -1438,9 +1438,11 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id)
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inta & ~trans_pcie->inta_mask);
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}
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/* Re-enable all interrupts */
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/* only Re-enable if disabled by irq */
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if (test_bit(STATUS_INT_ENABLED, &trans->status))
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/* we are loading the firmware, enable FH_TX interrupt only */
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if (handled & CSR_INT_BIT_FH_TX)
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iwl_enable_fw_load_int(trans);
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/* only Re-enable all interrupt if disabled by irq */
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else if (test_bit(STATUS_INT_ENABLED, &trans->status))
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iwl_enable_interrupts(trans);
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/* Re-enable RF_KILL if it occurred */
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else if (handled & CSR_INT_BIT_RF_KILL)
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@ -1021,82 +1021,6 @@ static int iwl_pcie_load_given_ucode_8000(struct iwl_trans *trans,
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&first_ucode_section);
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}
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static int iwl_trans_pcie_start_fw(struct iwl_trans *trans,
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const struct fw_img *fw, bool run_in_rfkill)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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bool hw_rfkill;
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int ret;
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mutex_lock(&trans_pcie->mutex);
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/* Someone called stop_device, don't try to start_fw */
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if (trans_pcie->is_down) {
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IWL_WARN(trans,
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"Can't start_fw since the HW hasn't been started\n");
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ret = EIO;
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goto out;
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}
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/* This may fail if AMT took ownership of the device */
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if (iwl_pcie_prepare_card_hw(trans)) {
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IWL_WARN(trans, "Exit HW not ready\n");
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ret = -EIO;
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goto out;
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}
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iwl_enable_rfkill_int(trans);
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/* If platform's RF_KILL switch is NOT set to KILL */
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hw_rfkill = iwl_is_rfkill_set(trans);
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if (hw_rfkill)
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set_bit(STATUS_RFKILL, &trans->status);
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else
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clear_bit(STATUS_RFKILL, &trans->status);
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iwl_trans_pcie_rf_kill(trans, hw_rfkill);
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if (hw_rfkill && !run_in_rfkill) {
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ret = -ERFKILL;
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goto out;
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}
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iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
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|
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ret = iwl_pcie_nic_init(trans);
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if (ret) {
|
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IWL_ERR(trans, "Unable to init nic\n");
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goto out;
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}
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|
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/* make sure rfkill handshake bits are cleared */
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iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
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iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
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CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
|
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|
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/* clear (again), then enable host interrupts */
|
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iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
|
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iwl_enable_interrupts(trans);
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|
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/* really make sure rfkill handshake bits are cleared */
|
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iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
|
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iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
|
||||
|
||||
/* Load the given image to the HW */
|
||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
||||
ret = iwl_pcie_load_given_ucode_8000(trans, fw);
|
||||
else
|
||||
ret = iwl_pcie_load_given_ucode(trans, fw);
|
||||
|
||||
out:
|
||||
mutex_unlock(&trans_pcie->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void iwl_trans_pcie_fw_alive(struct iwl_trans *trans, u32 scd_addr)
|
||||
{
|
||||
iwl_pcie_reset_ict(trans);
|
||||
iwl_pcie_tx_start(trans, scd_addr);
|
||||
}
|
||||
|
||||
static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
|
@ -1127,7 +1051,8 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
|||
* already dead.
|
||||
*/
|
||||
if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
|
||||
IWL_DEBUG_INFO(trans, "DEVICE_ENABLED bit was set and is now cleared\n");
|
||||
IWL_DEBUG_INFO(trans,
|
||||
"DEVICE_ENABLED bit was set and is now cleared\n");
|
||||
iwl_pcie_tx_stop(trans);
|
||||
iwl_pcie_rx_stop(trans);
|
||||
|
||||
|
@ -1161,7 +1086,6 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
|||
iwl_disable_interrupts(trans);
|
||||
spin_unlock(&trans_pcie->irq_lock);
|
||||
|
||||
|
||||
/* clear all status bits */
|
||||
clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status);
|
||||
clear_bit(STATUS_INT_ENABLED, &trans->status);
|
||||
|
@ -1194,10 +1118,116 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
|||
if (hw_rfkill != was_hw_rfkill)
|
||||
iwl_trans_pcie_rf_kill(trans, hw_rfkill);
|
||||
|
||||
/* re-take ownership to prevent other users from stealing the deivce */
|
||||
/* re-take ownership to prevent other users from stealing the device */
|
||||
iwl_pcie_prepare_card_hw(trans);
|
||||
}
|
||||
|
||||
static int iwl_trans_pcie_start_fw(struct iwl_trans *trans,
|
||||
const struct fw_img *fw, bool run_in_rfkill)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
bool hw_rfkill;
|
||||
int ret;
|
||||
|
||||
/* This may fail if AMT took ownership of the device */
|
||||
if (iwl_pcie_prepare_card_hw(trans)) {
|
||||
IWL_WARN(trans, "Exit HW not ready\n");
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
iwl_enable_rfkill_int(trans);
|
||||
|
||||
iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
|
||||
|
||||
/*
|
||||
* We enabled the RF-Kill interrupt and the handler may very
|
||||
* well be running. Disable the interrupts to make sure no other
|
||||
* interrupt can be fired.
|
||||
*/
|
||||
iwl_disable_interrupts(trans);
|
||||
|
||||
/* Make sure it finished running */
|
||||
synchronize_irq(trans_pcie->pci_dev->irq);
|
||||
|
||||
mutex_lock(&trans_pcie->mutex);
|
||||
|
||||
/* If platform's RF_KILL switch is NOT set to KILL */
|
||||
hw_rfkill = iwl_is_rfkill_set(trans);
|
||||
if (hw_rfkill)
|
||||
set_bit(STATUS_RFKILL, &trans->status);
|
||||
else
|
||||
clear_bit(STATUS_RFKILL, &trans->status);
|
||||
iwl_trans_pcie_rf_kill(trans, hw_rfkill);
|
||||
if (hw_rfkill && !run_in_rfkill) {
|
||||
ret = -ERFKILL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Someone called stop_device, don't try to start_fw */
|
||||
if (trans_pcie->is_down) {
|
||||
IWL_WARN(trans,
|
||||
"Can't start_fw since the HW hasn't been started\n");
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* make sure rfkill handshake bits are cleared */
|
||||
iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
|
||||
iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,
|
||||
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
|
||||
|
||||
/* clear (again), then enable host interrupts */
|
||||
iwl_write32(trans, CSR_INT, 0xFFFFFFFF);
|
||||
|
||||
ret = iwl_pcie_nic_init(trans);
|
||||
if (ret) {
|
||||
IWL_ERR(trans, "Unable to init nic\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now, we load the firmware and don't want to be interrupted, even
|
||||
* by the RF-Kill interrupt (hence mask all the interrupt besides the
|
||||
* FH_TX interrupt which is needed to load the firmware). If the
|
||||
* RF-Kill switch is toggled, we will find out after having loaded
|
||||
* the firmware and return the proper value to the caller.
|
||||
*/
|
||||
iwl_enable_fw_load_int(trans);
|
||||
|
||||
/* really make sure rfkill handshake bits are cleared */
|
||||
iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
|
||||
iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
|
||||
|
||||
/* Load the given image to the HW */
|
||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
|
||||
ret = iwl_pcie_load_given_ucode_8000(trans, fw);
|
||||
else
|
||||
ret = iwl_pcie_load_given_ucode(trans, fw);
|
||||
iwl_enable_interrupts(trans);
|
||||
|
||||
/* re-check RF-Kill state since we may have missed the interrupt */
|
||||
hw_rfkill = iwl_is_rfkill_set(trans);
|
||||
if (hw_rfkill)
|
||||
set_bit(STATUS_RFKILL, &trans->status);
|
||||
else
|
||||
clear_bit(STATUS_RFKILL, &trans->status);
|
||||
|
||||
iwl_trans_pcie_rf_kill(trans, hw_rfkill);
|
||||
if (hw_rfkill && !run_in_rfkill)
|
||||
ret = -ERFKILL;
|
||||
|
||||
out:
|
||||
mutex_unlock(&trans_pcie->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void iwl_trans_pcie_fw_alive(struct iwl_trans *trans, u32 scd_addr)
|
||||
{
|
||||
iwl_pcie_reset_ict(trans);
|
||||
iwl_pcie_tx_start(trans, scd_addr);
|
||||
}
|
||||
|
||||
static void iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
|
|
|
@ -138,6 +138,11 @@ static void _rtl_rc_rate_set_series(struct rtl_priv *rtlpriv,
|
|||
((wireless_mode == WIRELESS_MODE_N_5G) ||
|
||||
(wireless_mode == WIRELESS_MODE_N_24G)))
|
||||
rate->flags |= IEEE80211_TX_RC_MCS;
|
||||
if (sta && sta->vht_cap.vht_supported &&
|
||||
(wireless_mode == WIRELESS_MODE_AC_5G ||
|
||||
wireless_mode == WIRELESS_MODE_AC_24G ||
|
||||
wireless_mode == WIRELESS_MODE_AC_ONLY))
|
||||
rate->flags |= IEEE80211_TX_RC_VHT_MCS;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -175,14 +175,14 @@ int wlcore_set_partition(struct wl1271 *wl,
|
|||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
/* We don't need the size of the last partition, as it is
|
||||
* automatically calculated based on the total memory size and
|
||||
* the sizes of the previous partitions.
|
||||
*/
|
||||
ret = wlcore_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
ret = wlcore_raw_write32(wl, HW_PART3_SIZE_ADDR, p->mem3.size);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -36,8 +36,8 @@
|
|||
#define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
|
||||
#define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
|
||||
#define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
|
||||
#define HW_PART3_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
|
||||
#define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 28)
|
||||
#define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
|
||||
|
||||
#define HW_ACCESS_REGISTER_SIZE 4
|
||||
|
||||
#define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
|
||||
|
|
Loading…
Reference in New Issue