serial: 8250: Preserve DLD[7:4] for PORT_XR17V35X
The upper four bits of the XR17V35x fractional divisor register (DLD) control general chip function (RS-485 direction pin polarity, multidrop mode, XON/XOFF parity check, and fast IR mode). Don't allow these bits to be clobbered when setting the baudrate. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2586,8 +2586,11 @@ static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
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serial_dl_write(up, quot);
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/* XR17V35x UARTs have an extra fractional divisor register (DLD) */
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if (up->port.type == PORT_XR17V35X)
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if (up->port.type == PORT_XR17V35X) {
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/* Preserve bits not related to baudrate; DLD[7:4]. */
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quot_frac |= serial_port_in(port, 0x2) & 0xf0;
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serial_port_out(port, 0x2, quot_frac);
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}
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}
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static unsigned int serial8250_get_baud_rate(struct uart_port *port,
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