Revert "arm64: virt: ensure visibility of __boot_cpu_mode"
This reverts commit 82b2f495fb
. The
__boot_cpu_mode variable is flushed in head.S after being written,
therefore the additional cache flushing is no longer required.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -22,7 +22,6 @@
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#define BOOT_CPU_MODE_EL2 (0xe12)
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#ifndef __ASSEMBLY__
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#include <asm/cacheflush.h>
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/*
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* __boot_cpu_mode records what mode CPUs were booted in.
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@ -38,20 +37,9 @@ extern u32 __boot_cpu_mode[2];
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void __hyp_set_vectors(phys_addr_t phys_vector_base);
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phys_addr_t __hyp_get_vectors(void);
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static inline void sync_boot_mode(void)
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{
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/*
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* As secondaries write to __boot_cpu_mode with caches disabled, we
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* must flush the corresponding cache entries to ensure the visibility
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* of their writes.
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*/
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__flush_dcache_area(__boot_cpu_mode, sizeof(__boot_cpu_mode));
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}
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/* Reports the availability of HYP mode */
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static inline bool is_hyp_mode_available(void)
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{
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sync_boot_mode();
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return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 &&
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__boot_cpu_mode[1] == BOOT_CPU_MODE_EL2);
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}
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@ -59,7 +47,6 @@ static inline bool is_hyp_mode_available(void)
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/* Check if the bootloader has booted CPUs in different modes */
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static inline bool is_hyp_mode_mismatched(void)
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{
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sync_boot_mode();
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return __boot_cpu_mode[0] != __boot_cpu_mode[1];
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}
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