pinctrl: sh-pfc: r8a77990: Add MSIOF pins, groups and functions
This patch adds MSIOF{0,1,2,3} pins, groups and functions to
the R8A77990 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Takeshi Kihara
Geert Uytterhoeven
parent
2ed03c835d
commit
0a7cad486f
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@ -1595,6 +1595,325 @@ static const unsigned int i2c7_b_mux[] = {
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SCL7_B_MARK, SDA7_B_MARK,
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};
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(5, 10),
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};
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static const unsigned int msiof0_clk_mux[] = {
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MSIOF0_SCK_MARK,
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};
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static const unsigned int msiof0_sync_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(5, 13),
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};
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static const unsigned int msiof0_sync_mux[] = {
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MSIOF0_SYNC_MARK,
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};
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static const unsigned int msiof0_ss1_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(5, 14),
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};
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static const unsigned int msiof0_ss1_mux[] = {
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MSIOF0_SS1_MARK,
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};
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static const unsigned int msiof0_ss2_pins[] = {
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/* SS2 */
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RCAR_GP_PIN(5, 15),
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};
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static const unsigned int msiof0_ss2_mux[] = {
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MSIOF0_SS2_MARK,
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};
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static const unsigned int msiof0_txd_pins[] = {
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/* TXD */
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RCAR_GP_PIN(5, 12),
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};
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static const unsigned int msiof0_txd_mux[] = {
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MSIOF0_TXD_MARK,
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};
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static const unsigned int msiof0_rxd_pins[] = {
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/* RXD */
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RCAR_GP_PIN(5, 11),
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};
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static const unsigned int msiof0_rxd_mux[] = {
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MSIOF0_RXD_MARK,
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};
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/* - MSIOF1 ----------------------------------------------------------------- */
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static const unsigned int msiof1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(1, 19),
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};
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static const unsigned int msiof1_clk_mux[] = {
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MSIOF1_SCK_MARK,
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};
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static const unsigned int msiof1_sync_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(1, 16),
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};
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static const unsigned int msiof1_sync_mux[] = {
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MSIOF1_SYNC_MARK,
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};
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static const unsigned int msiof1_ss1_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(1, 14),
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};
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static const unsigned int msiof1_ss1_mux[] = {
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MSIOF1_SS1_MARK,
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};
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static const unsigned int msiof1_ss2_pins[] = {
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/* SS2 */
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RCAR_GP_PIN(1, 15),
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};
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static const unsigned int msiof1_ss2_mux[] = {
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MSIOF1_SS2_MARK,
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};
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static const unsigned int msiof1_txd_pins[] = {
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/* TXD */
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RCAR_GP_PIN(1, 18),
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};
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static const unsigned int msiof1_txd_mux[] = {
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MSIOF1_TXD_MARK,
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};
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static const unsigned int msiof1_rxd_pins[] = {
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/* RXD */
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RCAR_GP_PIN(1, 17),
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};
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static const unsigned int msiof1_rxd_mux[] = {
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MSIOF1_RXD_MARK,
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};
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/* - MSIOF2 ----------------------------------------------------------------- */
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static const unsigned int msiof2_clk_a_pins[] = {
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/* SCK */
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RCAR_GP_PIN(0, 8),
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};
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static const unsigned int msiof2_clk_a_mux[] = {
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MSIOF2_SCK_A_MARK,
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};
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static const unsigned int msiof2_sync_a_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(0, 9),
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};
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static const unsigned int msiof2_sync_a_mux[] = {
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MSIOF2_SYNC_A_MARK,
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};
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static const unsigned int msiof2_ss1_a_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(0, 15),
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};
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static const unsigned int msiof2_ss1_a_mux[] = {
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MSIOF2_SS1_A_MARK,
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};
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static const unsigned int msiof2_ss2_a_pins[] = {
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/* SS2 */
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RCAR_GP_PIN(0, 14),
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};
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static const unsigned int msiof2_ss2_a_mux[] = {
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MSIOF2_SS2_A_MARK,
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};
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static const unsigned int msiof2_txd_a_pins[] = {
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/* TXD */
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RCAR_GP_PIN(0, 11),
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};
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static const unsigned int msiof2_txd_a_mux[] = {
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MSIOF2_TXD_A_MARK,
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};
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static const unsigned int msiof2_rxd_a_pins[] = {
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/* RXD */
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RCAR_GP_PIN(0, 10),
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};
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static const unsigned int msiof2_rxd_a_mux[] = {
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MSIOF2_RXD_A_MARK,
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};
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static const unsigned int msiof2_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(1, 13),
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};
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static const unsigned int msiof2_clk_b_mux[] = {
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MSIOF2_SCK_B_MARK,
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};
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static const unsigned int msiof2_sync_b_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(1, 10),
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};
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static const unsigned int msiof2_sync_b_mux[] = {
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MSIOF2_SYNC_B_MARK,
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};
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static const unsigned int msiof2_ss1_b_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(1, 16),
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};
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static const unsigned int msiof2_ss1_b_mux[] = {
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MSIOF2_SS1_B_MARK,
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};
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static const unsigned int msiof2_ss2_b_pins[] = {
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/* SS2 */
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RCAR_GP_PIN(1, 12),
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};
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static const unsigned int msiof2_ss2_b_mux[] = {
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MSIOF2_SS2_B_MARK,
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};
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static const unsigned int msiof2_txd_b_pins[] = {
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/* TXD */
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RCAR_GP_PIN(1, 15),
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};
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static const unsigned int msiof2_txd_b_mux[] = {
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MSIOF2_TXD_B_MARK,
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};
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static const unsigned int msiof2_rxd_b_pins[] = {
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/* RXD */
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RCAR_GP_PIN(1, 14),
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};
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static const unsigned int msiof2_rxd_b_mux[] = {
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MSIOF2_RXD_B_MARK,
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};
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/* - MSIOF3 ----------------------------------------------------------------- */
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static const unsigned int msiof3_clk_a_pins[] = {
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/* SCK */
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RCAR_GP_PIN(0, 0),
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};
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static const unsigned int msiof3_clk_a_mux[] = {
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MSIOF3_SCK_A_MARK,
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};
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static const unsigned int msiof3_sync_a_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(0, 1),
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};
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static const unsigned int msiof3_sync_a_mux[] = {
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MSIOF3_SYNC_A_MARK,
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};
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static const unsigned int msiof3_ss1_a_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(0, 15),
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};
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static const unsigned int msiof3_ss1_a_mux[] = {
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MSIOF3_SS1_A_MARK,
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};
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static const unsigned int msiof3_ss2_a_pins[] = {
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/* SS2 */
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RCAR_GP_PIN(0, 4),
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};
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static const unsigned int msiof3_ss2_a_mux[] = {
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MSIOF3_SS2_A_MARK,
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};
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static const unsigned int msiof3_txd_a_pins[] = {
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/* TXD */
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RCAR_GP_PIN(0, 3),
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};
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static const unsigned int msiof3_txd_a_mux[] = {
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MSIOF3_TXD_A_MARK,
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};
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static const unsigned int msiof3_rxd_a_pins[] = {
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/* RXD */
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RCAR_GP_PIN(0, 2),
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};
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static const unsigned int msiof3_rxd_a_mux[] = {
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MSIOF3_RXD_A_MARK,
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};
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static const unsigned int msiof3_clk_b_pins[] = {
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/* SCK */
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RCAR_GP_PIN(1, 5),
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};
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static const unsigned int msiof3_clk_b_mux[] = {
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MSIOF3_SCK_B_MARK,
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};
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static const unsigned int msiof3_sync_b_pins[] = {
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/* SYNC */
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RCAR_GP_PIN(1, 4),
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};
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static const unsigned int msiof3_sync_b_mux[] = {
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MSIOF3_SYNC_B_MARK,
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};
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static const unsigned int msiof3_ss1_b_pins[] = {
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/* SS1 */
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RCAR_GP_PIN(1, 0),
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};
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static const unsigned int msiof3_ss1_b_mux[] = {
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MSIOF3_SS1_B_MARK,
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};
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static const unsigned int msiof3_txd_b_pins[] = {
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/* TXD */
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RCAR_GP_PIN(1, 7),
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};
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static const unsigned int msiof3_txd_b_mux[] = {
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MSIOF3_TXD_B_MARK,
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};
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static const unsigned int msiof3_rxd_b_pins[] = {
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/* RXD */
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RCAR_GP_PIN(1, 6),
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};
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static const unsigned int msiof3_rxd_b_mux[] = {
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MSIOF3_RXD_B_MARK,
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};
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/* - PWM0 --------------------------------------------------------------------*/
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static const unsigned int pwm0_a_pins[] = {
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/* PWM */
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@ -2102,6 +2421,41 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(i2c6_b),
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SH_PFC_PIN_GROUP(i2c7_a),
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SH_PFC_PIN_GROUP(i2c7_b),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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SH_PFC_PIN_GROUP(msiof0_ss2),
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SH_PFC_PIN_GROUP(msiof0_txd),
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SH_PFC_PIN_GROUP(msiof0_rxd),
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SH_PFC_PIN_GROUP(msiof1_clk),
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SH_PFC_PIN_GROUP(msiof1_sync),
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SH_PFC_PIN_GROUP(msiof1_ss1),
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SH_PFC_PIN_GROUP(msiof1_ss2),
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SH_PFC_PIN_GROUP(msiof1_txd),
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SH_PFC_PIN_GROUP(msiof1_rxd),
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SH_PFC_PIN_GROUP(msiof2_clk_a),
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SH_PFC_PIN_GROUP(msiof2_sync_a),
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SH_PFC_PIN_GROUP(msiof2_ss1_a),
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SH_PFC_PIN_GROUP(msiof2_ss2_a),
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SH_PFC_PIN_GROUP(msiof2_txd_a),
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SH_PFC_PIN_GROUP(msiof2_rxd_a),
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SH_PFC_PIN_GROUP(msiof2_clk_b),
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SH_PFC_PIN_GROUP(msiof2_sync_b),
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SH_PFC_PIN_GROUP(msiof2_ss1_b),
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SH_PFC_PIN_GROUP(msiof2_ss2_b),
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SH_PFC_PIN_GROUP(msiof2_txd_b),
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SH_PFC_PIN_GROUP(msiof2_rxd_b),
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SH_PFC_PIN_GROUP(msiof3_clk_a),
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SH_PFC_PIN_GROUP(msiof3_sync_a),
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SH_PFC_PIN_GROUP(msiof3_ss1_a),
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SH_PFC_PIN_GROUP(msiof3_ss2_a),
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SH_PFC_PIN_GROUP(msiof3_txd_a),
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SH_PFC_PIN_GROUP(msiof3_rxd_a),
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SH_PFC_PIN_GROUP(msiof3_clk_b),
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SH_PFC_PIN_GROUP(msiof3_sync_b),
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SH_PFC_PIN_GROUP(msiof3_ss1_b),
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SH_PFC_PIN_GROUP(msiof3_txd_b),
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SH_PFC_PIN_GROUP(msiof3_rxd_b),
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SH_PFC_PIN_GROUP(pwm0_a),
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SH_PFC_PIN_GROUP(pwm0_b),
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SH_PFC_PIN_GROUP(pwm1_a),
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@ -2210,6 +2564,53 @@ static const char * const i2c7_groups[] = {
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"i2c7_b",
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};
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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"msiof0_ss1",
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"msiof0_ss2",
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"msiof0_txd",
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"msiof0_rxd",
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};
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static const char * const msiof1_groups[] = {
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"msiof1_clk",
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"msiof1_sync",
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"msiof1_ss1",
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"msiof1_ss2",
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"msiof1_txd",
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"msiof1_rxd",
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};
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static const char * const msiof2_groups[] = {
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"msiof2_clk_a",
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"msiof2_sync_a",
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"msiof2_ss1_a",
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"msiof2_ss2_a",
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"msiof2_txd_a",
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"msiof2_rxd_a",
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"msiof2_clk_b",
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"msiof2_sync_b",
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"msiof2_ss1_b",
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"msiof2_ss2_b",
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"msiof2_txd_b",
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"msiof2_rxd_b",
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};
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static const char * const msiof3_groups[] = {
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"msiof3_clk_a",
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"msiof3_sync_a",
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"msiof3_ss1_a",
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"msiof3_ss2_a",
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"msiof3_txd_a",
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"msiof3_rxd_a",
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"msiof3_clk_b",
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"msiof3_sync_b",
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"msiof3_ss1_b",
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"msiof3_txd_b",
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"msiof3_rxd_b",
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};
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static const char * const pwm0_groups[] = {
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"pwm0_a",
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"pwm0_b",
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@ -2318,6 +2719,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(i2c5),
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SH_PFC_FUNCTION(i2c6),
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SH_PFC_FUNCTION(i2c7),
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SH_PFC_FUNCTION(msiof0),
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SH_PFC_FUNCTION(msiof1),
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SH_PFC_FUNCTION(msiof2),
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SH_PFC_FUNCTION(msiof3),
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SH_PFC_FUNCTION(pwm0),
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SH_PFC_FUNCTION(pwm1),
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SH_PFC_FUNCTION(pwm2),
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