arm64: dts: lg: Fix SPI controller node names
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the name enables dtc SPI bus checks. Cc: Chanho Min <chanho.min@lge.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -168,14 +168,14 @@
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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status="disabled";
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status="disabled";
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};
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};
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spi0: ssp@fe800000 {
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spi0: spi@fe800000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x0 0xfe800000 0x1000>;
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reg = <0x0 0xfe800000 0x1000>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_bus>;
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clocks = <&clk_bus>;
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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};
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};
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spi1: ssp@fe900000 {
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spi1: spi@fe900000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x0 0xfe900000 0x1000>;
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reg = <0x0 0xfe900000 0x1000>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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@ -168,14 +168,14 @@
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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status="disabled";
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status="disabled";
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};
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};
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spi0: ssp@fe800000 {
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spi0: spi@fe800000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x0 0xfe800000 0x1000>;
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reg = <0x0 0xfe800000 0x1000>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_bus>;
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clocks = <&clk_bus>;
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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};
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};
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spi1: ssp@fe900000 {
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spi1: spi@fe900000 {
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compatible = "arm,pl022", "arm,primecell";
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x0 0xfe900000 0x1000>;
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reg = <0x0 0xfe900000 0x1000>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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