riscv: remove CONFIG_RISCV_ISA_A
This option is always enabled, and not supporting the A extensions would create a complete ABI trainwreck, so there is no point in even slightly encouraging such an idea by keeping this unselectable code around. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -27,7 +27,7 @@ config RISCV
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
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select GENERIC_ATOMIC64 if !64BIT
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_MEMBLOCK_NODE_MAP
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select HAVE_MEMBLOCK_NODE_MAP
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select HAVE_DMA_CONTIGUOUS
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select HAVE_DMA_CONTIGUOUS
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@ -35,7 +35,6 @@ config RISCV
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select HAVE_PERF_EVENTS
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select HAVE_PERF_EVENTS
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select HAVE_SYSCALL_TRACEPOINTS
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_DOMAIN
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select IRQ_DOMAIN
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select RISCV_ISA_A if SMP
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select SPARSE_IRQ
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select SPARSE_IRQ
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select SYSCTL_EXCEPTION_TRACE
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select SYSCTL_EXCEPTION_TRACE
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select HAVE_ARCH_TRACEHOOK
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select HAVE_ARCH_TRACEHOOK
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@ -197,9 +196,6 @@ config RISCV_ISA_C
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If you don't know what to do here, say Y.
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If you don't know what to do here, say Y.
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config RISCV_ISA_A
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def_bool y
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menu "supported PMU type"
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menu "supported PMU type"
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depends on PERF_EVENTS
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depends on PERF_EVENTS
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@ -39,9 +39,8 @@ endif
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KBUILD_CFLAGS += -Wall
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KBUILD_CFLAGS += -Wall
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# ISA string setting
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# ISA string setting
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riscv-march-$(CONFIG_ARCH_RV32I) := rv32im
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riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
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riscv-march-$(CONFIG_ARCH_RV64I) := rv64im
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riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
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riscv-march-$(CONFIG_RISCV_ISA_A) := $(riscv-march-y)a
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riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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@ -7,18 +7,6 @@
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#ifndef _ASM_FUTEX_H
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#ifndef _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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#ifndef CONFIG_RISCV_ISA_A
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/*
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* Use the generic interrupt disabling versions if the A extension
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* is not supported.
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*/
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#ifdef CONFIG_SMP
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#error "Can't support generic futex calls without A extension on SMP"
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#endif
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#include <asm-generic/futex.h>
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#else /* CONFIG_RISCV_ISA_A */
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#include <linux/futex.h>
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <linux/uaccess.h>
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#include <linux/errno.h>
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#include <linux/errno.h>
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@ -124,5 +112,4 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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return ret;
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return ret;
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}
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}
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#endif /* CONFIG_RISCV_ISA_A */
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#endif /* _ASM_FUTEX_H */
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#endif /* _ASM_FUTEX_H */
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