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[media] s5p-mfc: check mfc bus ctrl before reset 

during reset sequence, it is advisable to follow the below
sequence, in order to avoid unexpected behavior from MFC
. set SFR 0x7110 MFC_BUS_RESET_CTRL 0x1
  // wait for REQ_STATUS to be 1
. get SFR 0x7110 MFC_BUS_RESET_CTRL 0x3
  // reset now

Signed-off-by: Kiran AVND <avnd.kiran@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Kiran AVND 2014-10-21 08:07:00 -03:00 committed by Mauro Carvalho Chehab
parent d7dce6a3cd
commit 09accdad0d
2 changed files with 25 additions and 1 deletions
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1
drivers/media/platform/s5p-mfc/regs-mfc-v6.h
View File

@ -71,6 +71,7 @@
#define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16 #define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16
#define S5P_FIMV_R2H_CMD_ERR_RET_V6 32 #define S5P_FIMV_R2H_CMD_ERR_RET_V6 32
#define S5P_FIMV_MFC_BUS_RESET_CTRL 0x7110
#define S5P_FIMV_FW_VERSION_V6 0xf000 #define S5P_FIMV_FW_VERSION_V6 0xf000
#define S5P_FIMV_INSTANCE_ID_V6 0xf008 #define S5P_FIMV_INSTANCE_ID_V6 0xf008

25
drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
View File

@ -129,6 +129,25 @@ int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev)
return 0; return 0;
} }
int s5p_mfc_bus_reset(struct s5p_mfc_dev *dev)
{
unsigned int status;
unsigned long timeout;
/* Reset */
mfc_write(dev, 0x1, S5P_FIMV_MFC_BUS_RESET_CTRL);
timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
/* Check bus status */
do {
if (time_after(jiffies, timeout)) {
mfc_err("Timeout while resetting MFC.\n");
return -EIO;
}
status = mfc_read(dev, S5P_FIMV_MFC_BUS_RESET_CTRL);
} while ((status & 0x2) == 0);
return 0;
}
/* Reset the device */ /* Reset the device */
int s5p_mfc_reset(struct s5p_mfc_dev *dev) int s5p_mfc_reset(struct s5p_mfc_dev *dev)
{ {
@ -147,11 +166,15 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev)
for (i = 0; i < S5P_FIMV_REG_CLEAR_COUNT_V6; i++) for (i = 0; i < S5P_FIMV_REG_CLEAR_COUNT_V6; i++)
mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4)); mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4));
/* check bus reset control before reset */
if (dev->risc_on)
if (s5p_mfc_bus_reset(dev))
return -EIO;
/* Reset /* Reset
* set RISC_ON to 0 during power_on & wake_up. * set RISC_ON to 0 during power_on & wake_up.
* V6 needs RISC_ON set to 0 during reset also. * V6 needs RISC_ON set to 0 during reset also.
*/ */
if ((!dev->risc_on) || (!IS_MFCV7(dev))) if ((!dev->risc_on) || (!IS_MFCV7_PLUS(dev)))
mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6); mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6);
mfc_write(dev, 0x1FFF, S5P_FIMV_MFC_RESET_V6); mfc_write(dev, 0x1FFF, S5P_FIMV_MFC_RESET_V6);