[media] s5p-mfc: check mfc bus ctrl before reset
during reset sequence, it is advisable to follow the below sequence, in order to avoid unexpected behavior from MFC . set SFR 0x7110 MFC_BUS_RESET_CTRL 0x1 // wait for REQ_STATUS to be 1 . get SFR 0x7110 MFC_BUS_RESET_CTRL 0x3 // reset now Signed-off-by: Kiran AVND <avnd.kiran@samsung.com> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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@ -71,6 +71,7 @@
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#define S5P_FIMV_R2H_CMD_ENC_BUFFER_FUL_RET_V6 16
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#define S5P_FIMV_R2H_CMD_ERR_RET_V6 32
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#define S5P_FIMV_MFC_BUS_RESET_CTRL 0x7110
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#define S5P_FIMV_FW_VERSION_V6 0xf000
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#define S5P_FIMV_INSTANCE_ID_V6 0xf008
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@ -129,6 +129,25 @@ int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev)
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return 0;
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}
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int s5p_mfc_bus_reset(struct s5p_mfc_dev *dev)
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{
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unsigned int status;
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unsigned long timeout;
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/* Reset */
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mfc_write(dev, 0x1, S5P_FIMV_MFC_BUS_RESET_CTRL);
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timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
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/* Check bus status */
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do {
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if (time_after(jiffies, timeout)) {
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mfc_err("Timeout while resetting MFC.\n");
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return -EIO;
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}
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status = mfc_read(dev, S5P_FIMV_MFC_BUS_RESET_CTRL);
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} while ((status & 0x2) == 0);
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return 0;
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}
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/* Reset the device */
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int s5p_mfc_reset(struct s5p_mfc_dev *dev)
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{
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@ -147,11 +166,15 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev)
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for (i = 0; i < S5P_FIMV_REG_CLEAR_COUNT_V6; i++)
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mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4));
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/* check bus reset control before reset */
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if (dev->risc_on)
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if (s5p_mfc_bus_reset(dev))
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return -EIO;
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/* Reset
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* set RISC_ON to 0 during power_on & wake_up.
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* V6 needs RISC_ON set to 0 during reset also.
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*/
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if ((!dev->risc_on) || (!IS_MFCV7(dev)))
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if ((!dev->risc_on) || (!IS_MFCV7_PLUS(dev)))
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mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6);
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mfc_write(dev, 0x1FFF, S5P_FIMV_MFC_RESET_V6);
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