nvmem: sprd: Add Spreadtrum SoCs eFuse support
The Spreadtrum eFuse controller is widely used to dump chip ID, configuration setting, function select and so on, as well as supporting one-time programming. Signed-off-by: Freeman Liu <freeman.liu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Freeman Liu
Greg Kroah-Hartman
parent
95d25206eb
commit
096030e7f4
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@ -230,4 +230,15 @@ config NVMEM_ZYNQMP
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If sure, say yes. If unsure, say no.
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config SPRD_EFUSE
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tristate "Spreadtrum SoC eFuse Support"
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depends on ARCH_SPRD || COMPILE_TEST
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depends on HAS_IOMEM
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help
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This is a simple driver to dump specified values of Spreadtrum
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SoCs from eFuse.
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This driver can also be built as a module. If so, the module
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will be called nvmem-sprd-efuse.
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endif
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@ -50,3 +50,5 @@ obj-$(CONFIG_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o
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nvmem-sc27xx-efuse-y := sc27xx-efuse.o
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obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynqmp_nvmem.o
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nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o
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obj-$(CONFIG_SPRD_EFUSE) += nvmem_sprd_efuse.o
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nvmem_sprd_efuse-y := sprd-efuse.o
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@ -0,0 +1,424 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2019 Spreadtrum Communications Inc.
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/hwspinlock.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define SPRD_EFUSE_ENABLE 0x20
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#define SPRD_EFUSE_ERR_FLAG 0x24
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#define SPRD_EFUSE_ERR_CLR 0x28
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#define SPRD_EFUSE_MAGIC_NUM 0x2c
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#define SPRD_EFUSE_FW_CFG 0x50
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#define SPRD_EFUSE_PW_SWT 0x54
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#define SPRD_EFUSE_MEM(val) (0x1000 + ((val) << 2))
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#define SPRD_EFUSE_VDD_EN BIT(0)
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#define SPRD_EFUSE_AUTO_CHECK_EN BIT(1)
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#define SPRD_EFUSE_DOUBLE_EN BIT(2)
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#define SPRD_EFUSE_MARGIN_RD_EN BIT(3)
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#define SPRD_EFUSE_LOCK_WR_EN BIT(4)
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#define SPRD_EFUSE_ERR_CLR_MASK GENMASK(13, 0)
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#define SPRD_EFUSE_ENK1_ON BIT(0)
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#define SPRD_EFUSE_ENK2_ON BIT(1)
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#define SPRD_EFUSE_PROG_EN BIT(2)
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#define SPRD_EFUSE_MAGIC_NUMBER 0x8810
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/* Block width (bytes) definitions */
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#define SPRD_EFUSE_BLOCK_WIDTH 4
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/*
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* The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
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* and we can only access the normal efuse in kernel. So define the normal
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* block offset index and normal block numbers.
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*/
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#define SPRD_EFUSE_NORMAL_BLOCK_NUMS 24
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#define SPRD_EFUSE_NORMAL_BLOCK_OFFSET 72
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/* Timeout (ms) for the trylock of hardware spinlocks */
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#define SPRD_EFUSE_HWLOCK_TIMEOUT 5000
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/*
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* Since different Spreadtrum SoC chip can have different normal block numbers
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* and offset. And some SoC can support block double feature, which means
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* when reading or writing data to efuse memory, the controller can save double
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* data in case one data become incorrect after a long period.
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*
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* Thus we should save them in the device data structure.
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*/
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struct sprd_efuse_variant_data {
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u32 blk_nums;
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u32 blk_offset;
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bool blk_double;
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};
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struct sprd_efuse {
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struct device *dev;
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struct clk *clk;
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struct hwspinlock *hwlock;
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struct mutex mutex;
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void __iomem *base;
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const struct sprd_efuse_variant_data *data;
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};
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static const struct sprd_efuse_variant_data ums312_data = {
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.blk_nums = SPRD_EFUSE_NORMAL_BLOCK_NUMS,
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.blk_offset = SPRD_EFUSE_NORMAL_BLOCK_OFFSET,
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.blk_double = false,
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};
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/*
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* On Spreadtrum platform, we have multi-subsystems will access the unique
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* efuse controller, so we need one hardware spinlock to synchronize between
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* the multiple subsystems.
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*/
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static int sprd_efuse_lock(struct sprd_efuse *efuse)
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{
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int ret;
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mutex_lock(&efuse->mutex);
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ret = hwspin_lock_timeout_raw(efuse->hwlock,
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SPRD_EFUSE_HWLOCK_TIMEOUT);
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if (ret) {
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dev_err(efuse->dev, "timeout get the hwspinlock\n");
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mutex_unlock(&efuse->mutex);
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return ret;
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}
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return 0;
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}
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static void sprd_efuse_unlock(struct sprd_efuse *efuse)
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{
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hwspin_unlock_raw(efuse->hwlock);
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mutex_unlock(&efuse->mutex);
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}
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static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
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if (en)
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val &= ~SPRD_EFUSE_ENK2_ON;
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else
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val &= ~SPRD_EFUSE_ENK1_ON;
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writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
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/* Open or close efuse power need wait 1000us to make power stable. */
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usleep_range(1000, 1200);
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if (en)
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val |= SPRD_EFUSE_ENK1_ON;
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else
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val |= SPRD_EFUSE_ENK2_ON;
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writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
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/* Open or close efuse power need wait 1000us to make power stable. */
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usleep_range(1000, 1200);
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}
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static void sprd_efuse_set_read_power(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
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if (en)
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val |= SPRD_EFUSE_VDD_EN;
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else
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val &= ~SPRD_EFUSE_VDD_EN;
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writel(val, efuse->base + SPRD_EFUSE_ENABLE);
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/* Open or close efuse power need wait 1000us to make power stable. */
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usleep_range(1000, 1200);
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}
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static void sprd_efuse_set_prog_lock(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
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if (en)
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val |= SPRD_EFUSE_LOCK_WR_EN;
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else
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val &= ~SPRD_EFUSE_LOCK_WR_EN;
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writel(val, efuse->base + SPRD_EFUSE_ENABLE);
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}
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static void sprd_efuse_set_auto_check(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
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if (en)
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val |= SPRD_EFUSE_AUTO_CHECK_EN;
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else
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val &= ~SPRD_EFUSE_AUTO_CHECK_EN;
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writel(val, efuse->base + SPRD_EFUSE_ENABLE);
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}
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static void sprd_efuse_set_data_double(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
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if (en)
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val |= SPRD_EFUSE_DOUBLE_EN;
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else
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val &= ~SPRD_EFUSE_DOUBLE_EN;
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writel(val, efuse->base + SPRD_EFUSE_ENABLE);
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}
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static void sprd_efuse_set_prog_en(struct sprd_efuse *efuse, bool en)
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{
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u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
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if (en)
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val |= SPRD_EFUSE_PROG_EN;
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else
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val &= ~SPRD_EFUSE_PROG_EN;
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writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
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}
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static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
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bool lock, u32 *data)
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{
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u32 status;
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int ret = 0;
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/*
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* We need set the correct magic number before writing the efuse to
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* allow programming, and block other programming until we clear the
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* magic number.
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*/
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writel(SPRD_EFUSE_MAGIC_NUMBER,
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efuse->base + SPRD_EFUSE_MAGIC_NUM);
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/*
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* Power on the efuse, enable programme and enable double data
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* if asked.
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*/
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sprd_efuse_set_prog_power(efuse, true);
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sprd_efuse_set_prog_en(efuse, true);
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sprd_efuse_set_data_double(efuse, doub);
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/*
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* Enable the auto-check function to validate if the programming is
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* successful.
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*/
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sprd_efuse_set_auto_check(efuse, true);
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writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
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/* Disable auto-check and data double after programming */
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sprd_efuse_set_auto_check(efuse, false);
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sprd_efuse_set_data_double(efuse, false);
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/*
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* Check the efuse error status, if the programming is successful,
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* we should lock this efuse block to avoid programming again.
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*/
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status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
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if (status) {
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dev_err(efuse->dev,
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"write error status %d of block %d\n", ret, blk);
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writel(SPRD_EFUSE_ERR_CLR_MASK,
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efuse->base + SPRD_EFUSE_ERR_CLR);
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ret = -EBUSY;
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} else {
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sprd_efuse_set_prog_lock(efuse, lock);
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writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
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sprd_efuse_set_prog_lock(efuse, false);
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}
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sprd_efuse_set_prog_power(efuse, false);
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writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);
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return ret;
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}
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static int sprd_efuse_raw_read(struct sprd_efuse *efuse, int blk, u32 *val,
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bool doub)
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{
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u32 status;
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/*
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* Need power on the efuse before reading data from efuse, and will
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* power off the efuse after reading process.
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*/
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sprd_efuse_set_read_power(efuse, true);
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/* Enable double data if asked */
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sprd_efuse_set_data_double(efuse, doub);
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/* Start to read data from efuse block */
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*val = readl(efuse->base + SPRD_EFUSE_MEM(blk));
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/* Disable double data */
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sprd_efuse_set_data_double(efuse, false);
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/* Power off the efuse */
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sprd_efuse_set_read_power(efuse, false);
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/*
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* Check the efuse error status and clear them if there are some
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* errors occurred.
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*/
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status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
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if (status) {
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dev_err(efuse->dev,
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"read error status %d of block %d\n", status, blk);
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writel(SPRD_EFUSE_ERR_CLR_MASK,
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efuse->base + SPRD_EFUSE_ERR_CLR);
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return -EBUSY;
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}
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return 0;
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}
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static int sprd_efuse_read(void *context, u32 offset, void *val, size_t bytes)
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{
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struct sprd_efuse *efuse = context;
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bool blk_double = efuse->data->blk_double;
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u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
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u32 blk_offset = (offset % SPRD_EFUSE_BLOCK_WIDTH) * BITS_PER_BYTE;
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u32 data;
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int ret;
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ret = sprd_efuse_lock(efuse);
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if (ret)
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return ret;
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ret = clk_prepare_enable(efuse->clk);
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if (ret)
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goto unlock;
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ret = sprd_efuse_raw_read(efuse, index, &data, blk_double);
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if (!ret) {
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data >>= blk_offset;
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memcpy(val, &data, bytes);
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}
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clk_disable_unprepare(efuse->clk);
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unlock:
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sprd_efuse_unlock(efuse);
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return ret;
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}
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static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
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{
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struct sprd_efuse *efuse = context;
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int ret;
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ret = sprd_efuse_lock(efuse);
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if (ret)
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return ret;
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ret = clk_prepare_enable(efuse->clk);
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if (ret)
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goto unlock;
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ret = sprd_efuse_raw_prog(efuse, offset, false, false, val);
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clk_disable_unprepare(efuse->clk);
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unlock:
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sprd_efuse_unlock(efuse);
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return ret;
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}
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static int sprd_efuse_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct nvmem_device *nvmem;
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struct nvmem_config econfig = { };
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struct sprd_efuse *efuse;
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const struct sprd_efuse_variant_data *pdata;
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int ret;
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pdata = of_device_get_match_data(&pdev->dev);
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if (!pdata) {
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dev_err(&pdev->dev, "No matching driver data found\n");
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return -EINVAL;
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}
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efuse = devm_kzalloc(&pdev->dev, sizeof(*efuse), GFP_KERNEL);
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if (!efuse)
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return -ENOMEM;
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efuse->base = devm_platform_ioremap_resource(pdev, 0);
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if (!efuse->base)
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return -ENOMEM;
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ret = of_hwspin_lock_get_id(np, 0);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to get hwlock id\n");
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return ret;
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}
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efuse->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);
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if (!efuse->hwlock) {
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dev_err(&pdev->dev, "failed to request hwlock\n");
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return -ENXIO;
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}
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efuse->clk = devm_clk_get(&pdev->dev, "enable");
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if (IS_ERR(efuse->clk)) {
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dev_err(&pdev->dev, "failed to get enable clock\n");
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return PTR_ERR(efuse->clk);
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}
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mutex_init(&efuse->mutex);
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efuse->dev = &pdev->dev;
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efuse->data = pdata;
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econfig.stride = 1;
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econfig.word_size = 1;
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econfig.read_only = false;
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econfig.name = "sprd-efuse";
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econfig.size = efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH;
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econfig.reg_read = sprd_efuse_read;
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econfig.reg_write = sprd_efuse_write;
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econfig.priv = efuse;
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econfig.dev = &pdev->dev;
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nvmem = devm_nvmem_register(&pdev->dev, &econfig);
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if (IS_ERR(nvmem)) {
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dev_err(&pdev->dev, "failed to register nvmem\n");
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return PTR_ERR(nvmem);
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}
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return 0;
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}
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static const struct of_device_id sprd_efuse_of_match[] = {
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{ .compatible = "sprd,ums312-efuse", .data = &ums312_data },
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{ }
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};
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static struct platform_driver sprd_efuse_driver = {
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.probe = sprd_efuse_probe,
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.driver = {
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.name = "sprd-efuse",
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.of_match_table = sprd_efuse_of_match,
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},
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};
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module_platform_driver(sprd_efuse_driver);
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MODULE_AUTHOR("Freeman Liu <freeman.liu@spreadtrum.com>");
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MODULE_DESCRIPTION("Spreadtrum AP efuse driver");
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MODULE_LICENSE("GPL v2");
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