[ARM] S3C: Add UDIVSLOT support for newer UARTS
Add support for the UDIVSLOT register on the newer UART blocks which gives the capability of 1/16ths adjustment to the baud rate. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks
parent
5ef316fbe7
commit
090f848da0
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@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c6400_uart_inf = {
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.name = "Samsung S3C6400 UART",
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.type = PORT_S3C6400,
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.fifosize = 64,
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.has_divslot = 1,
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.rx_fifomask = S3C2440_UFSTAT_RXMASK,
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.rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
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.rx_fifofull = S3C2440_UFSTAT_RXFULL,
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@ -508,6 +508,7 @@ s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
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struct baud_calc {
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struct s3c24xx_uart_clksrc *clksrc;
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unsigned int calc;
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unsigned int divslot;
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unsigned int quot;
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struct clk *src;
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};
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@ -517,6 +518,7 @@ static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
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struct s3c24xx_uart_clksrc *clksrc,
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unsigned int baud)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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unsigned long rate;
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calc->src = clk_get(port->dev, clksrc->name);
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@ -527,8 +529,24 @@ static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
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rate /= clksrc->divisor;
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calc->clksrc = clksrc;
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calc->quot = (rate + (8 * baud)) / (16 * baud);
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calc->calc = (rate / (calc->quot * 16));
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if (ourport->info->has_divslot) {
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unsigned long div = rate / baud;
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/* The UDIVSLOT register on the newer UARTs allows us to
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* get a divisor adjustment of 1/16th on the baud clock.
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*
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* We don't keep the UDIVSLOT value (the 16ths we calculated
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* by not multiplying the baud by 16) as it is easy enough
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* to recalculate.
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*/
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calc->quot = div / 16;
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calc->calc = rate / div;
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} else {
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calc->quot = (rate + (8 * baud)) / (16 * baud);
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calc->calc = (rate / (calc->quot * 16));
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}
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calc->quot--;
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return 1;
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@ -611,6 +629,30 @@ static unsigned int s3c24xx_serial_getclk(struct uart_port *port,
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return best->quot;
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}
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/* udivslot_table[]
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*
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* This table takes the fractional value of the baud divisor and gives
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* the recommended setting for the UDIVSLOT register.
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*/
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static u16 udivslot_table[16] = {
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[0] = 0x0000,
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[1] = 0x0080,
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[2] = 0x0808,
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[3] = 0x0888,
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[4] = 0x2222,
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[5] = 0x4924,
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[6] = 0x4A52,
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[7] = 0x54AA,
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[8] = 0x5555,
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[9] = 0xD555,
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[10] = 0xD5D5,
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[11] = 0xDDD5,
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[12] = 0xDDDD,
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[13] = 0xDFDD,
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[14] = 0xDFDF,
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[15] = 0xFFDF,
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};
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static void s3c24xx_serial_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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@ -623,6 +665,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
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unsigned int baud, quot;
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unsigned int ulcon;
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unsigned int umcon;
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unsigned int udivslot = 0;
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/*
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* We don't support modem control lines.
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@ -644,6 +687,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
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/* check to see if we need to change clock source */
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if (ourport->clksrc != clksrc || ourport->baudclk != clk) {
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dbg("selecting clock %p\n", clk);
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s3c24xx_serial_setsource(port, clksrc);
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if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
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@ -658,6 +702,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
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ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
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}
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if (ourport->info->has_divslot) {
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unsigned int div = ourport->baudclk_rate / baud;
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udivslot = udivslot_table[div & 15];
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dbg("udivslot = %04x (div %d)\n", udivslot, div & 15);
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}
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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dbg("config: 5bits/char\n");
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@ -697,12 +748,16 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
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spin_lock_irqsave(&port->lock, flags);
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dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot);
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dbg("setting ulcon to %08x, brddiv to %d, udivslot %08x\n",
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ulcon, quot, udivslot);
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wr_regl(port, S3C2410_ULCON, ulcon);
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wr_regl(port, S3C2410_UBRDIV, quot);
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wr_regl(port, S3C2410_UMCON, umcon);
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if (ourport->info->has_divslot)
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wr_regl(port, S3C2443_DIVSLOT, udivslot);
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dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
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rd_regl(port, S3C2410_ULCON),
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rd_regl(port, S3C2410_UCON),
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@ -21,6 +21,10 @@ struct s3c24xx_uart_info {
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unsigned long tx_fifoshift;
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unsigned long tx_fifofull;
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/* uart port features */
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unsigned int has_divslot:1;
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/* clock source control */
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int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
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