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drm/radeon: enable mgcg on SI 

Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-08-14 18:53:56 -04:00
parent 4cb0add259
commit 090f4b6ad3
1 changed files with 5 additions and 5 deletions
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10
drivers/gpu/drm/radeon/radeon_asic.c
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@ -2338,7 +2338,7 @@ int radeon_asic_init(struct radeon_device *rdev)
switch (rdev->family) {
case CHIP_TAHITI:
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2355,7 +2355,7 @@ int radeon_asic_init(struct radeon_device *rdev)
break;
case CHIP_PITCAIRN:
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2374,7 +2374,7 @@ int radeon_asic_init(struct radeon_device *rdev)
break;
case CHIP_VERDE:
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2395,7 +2395,7 @@ int radeon_asic_init(struct radeon_device *rdev)
break;
case CHIP_OLAND:
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |
@ -2413,7 +2413,7 @@ int radeon_asic_init(struct radeon_device *rdev)
break;
case CHIP_HAINAN:
rdev->cg_flags =
/*RADEON_CG_SUPPORT_GFX_MGCG |*/
RADEON_CG_SUPPORT_GFX_MGCG |
RADEON_CG_SUPPORT_GFX_MGLS |
/*RADEON_CG_SUPPORT_GFX_CGCG |*/
RADEON_CG_SUPPORT_GFX_CGLS |