smccc: Use separate variables for args and results
Using the same register-bound variable for both arguments and results means these values share a type. That type must allow the arguments to be assigned to it and must also be assignable to the unsigned long fields of struct arm_smccc_res. This restriction on types causes compiler warnings when the argument cannot be implicitly assigned to an unsigned long, for example the pointers that are used in the KVM hyp interface. By separating the arguments and results into their own variables, the type constraint is lifted allowing the arguments to avoid the need for any type conversion. Signed-off-by: Andrew Scull <ascull@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20200915104643.2543892-17-ascull@google.com
This commit is contained in:
Andrew Scull
Marc Zyngier
parent
cf65016890
commit
0794a974d7
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@ -228,87 +228,67 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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#define __count_args(...) \
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___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
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#define __constraint_write_0 \
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"+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
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#define __constraint_write_1 \
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"+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
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#define __constraint_write_2 \
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"+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
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#define __constraint_write_3 \
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"+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
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#define __constraint_write_4 __constraint_write_3
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#define __constraint_write_5 __constraint_write_4
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#define __constraint_write_6 __constraint_write_5
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#define __constraint_write_7 __constraint_write_6
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#define __constraint_read_0
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#define __constraint_read_1
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#define __constraint_read_2
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#define __constraint_read_3
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#define __constraint_read_4 "r" (r4)
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#define __constraint_read_5 __constraint_read_4, "r" (r5)
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#define __constraint_read_6 __constraint_read_5, "r" (r6)
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#define __constraint_read_7 __constraint_read_6, "r" (r7)
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#define __constraint_read_0 "r" (arg0)
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#define __constraint_read_1 __constraint_read_0, "r" (arg1)
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#define __constraint_read_2 __constraint_read_1, "r" (arg2)
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#define __constraint_read_3 __constraint_read_2, "r" (arg3)
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#define __constraint_read_4 __constraint_read_3, "r" (arg4)
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#define __constraint_read_5 __constraint_read_4, "r" (arg5)
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#define __constraint_read_6 __constraint_read_5, "r" (arg6)
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#define __constraint_read_7 __constraint_read_6, "r" (arg7)
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#define __declare_arg_0(a0, res) \
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struct arm_smccc_res *___res = res; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1"); \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3")
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register unsigned long arg0 asm("r0") = (u32)a0
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#define __declare_arg_1(a0, a1, res) \
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typeof(a1) __a1 = a1; \
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struct arm_smccc_res *___res = res; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3")
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register unsigned long arg0 asm("r0") = (u32)a0; \
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register typeof(a1) arg1 asm("r1") = __a1
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#define __declare_arg_2(a0, a1, a2, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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struct arm_smccc_res *___res = res; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2") = __a2; \
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register unsigned long r3 asm("r3")
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register unsigned long arg0 asm("r0") = (u32)a0; \
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register typeof(a1) arg1 asm("r1") = __a1; \
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register typeof(a2) arg2 asm("r2") = __a2
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#define __declare_arg_3(a0, a1, a2, a3, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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typeof(a3) __a3 = a3; \
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struct arm_smccc_res *___res = res; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2") = __a2; \
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register unsigned long r3 asm("r3") = __a3
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register unsigned long arg0 asm("r0") = (u32)a0; \
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register typeof(a1) arg1 asm("r1") = __a1; \
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register typeof(a2) arg2 asm("r2") = __a2; \
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register typeof(a3) arg3 asm("r3") = __a3
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#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
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typeof(a4) __a4 = a4; \
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__declare_arg_3(a0, a1, a2, a3, res); \
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register unsigned long r4 asm("r4") = __a4
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register typeof(a4) arg4 asm("r4") = __a4
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#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
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typeof(a5) __a5 = a5; \
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__declare_arg_4(a0, a1, a2, a3, a4, res); \
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register unsigned long r5 asm("r5") = __a5
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register typeof(a5) arg5 asm("r5") = __a5
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#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
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typeof(a6) __a6 = a6; \
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__declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
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register unsigned long r6 asm("r6") = __a6
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register typeof(a6) arg6 asm("r6") = __a6
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#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
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typeof(a7) __a7 = a7; \
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__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
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register unsigned long r7 asm("r7") = __a7
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register typeof(a7) arg7 asm("r7") = __a7
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#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
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#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
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#define ___constraints(count) \
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: __constraint_write_ ## count \
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: __constraint_read_ ## count \
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: "memory"
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#define __constraints(count) ___constraints(count)
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@ -320,8 +300,13 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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*/
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#define __arm_smccc_1_1(inst, ...) \
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do { \
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register unsigned long r0 asm("r0"); \
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register unsigned long r1 asm("r1"); \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3"); \
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__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
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asm volatile(inst "\n" \
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asm volatile(inst "\n" : \
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"=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
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__constraints(__count_args(__VA_ARGS__))); \
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if (___res) \
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*___res = (typeof(*___res)){r0, r1, r2, r3}; \
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@ -367,7 +352,7 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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#define __fail_smccc_1_1(...) \
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do { \
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__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
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asm ("" __constraints(__count_args(__VA_ARGS__))); \
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asm ("" : __constraints(__count_args(__VA_ARGS__))); \
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if (___res) \
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___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
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} while (0)
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