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net: hns3: move some reset information from hnae3_handle into hclge_dev/hclgevf_dev 

Saving reset related information in the hclge_dev/hclgevf_dev
structure is more suitable than the hnae3_handle, since hardware
related information is kept in these two structure.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Huazhong Tan 2018-11-07 12:06:14 +08:00 committed by David S. Miller
parent 7cea834d94
commit 0742ed7c24
7 changed files with 28 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/net/ethernet/hisilicon/hns3/hnae3.h
View File

@ -534,9 +534,6 @@ struct hnae3_handle {
struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
u64 flags; /* Indicate the capabilities for this handle*/
unsigned long last_reset_time;
enum hnae3_reset_type reset_level;
union {
struct net_device *netdev; /* first member */
struct hnae3_knic_private_info kinfo;

16
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
View File

@ -379,7 +379,6 @@ out_start_err:
static int hns3_nic_net_open(struct net_device *netdev)
{
struct hns3_nic_priv *priv = netdev_priv(netdev);
struct hnae3_handle *h = hns3_get_handle(netdev);
struct hnae3_knic_private_info *kinfo;
int i, ret;
@ -406,7 +405,6 @@ static int hns3_nic_net_open(struct net_device *netdev)
kinfo->prio_tc[i]);
}
priv->ae_handle->last_reset_time = jiffies;
return 0;
}
@ -1648,10 +1646,9 @@ static void hns3_nic_net_timeout(struct net_device *ndev)
priv->tx_timeout_count++;
if (time_before(jiffies, (h->last_reset_time + ndev->watchdog_timeo)))
return;
/* request the reset */
/* request the reset, and let the hclge to determine
* which reset level should be done
*/
if (h->ae_algo->ops->reset_event)
h->ae_algo->ops->reset_event(h->pdev, h);
}
@ -3370,7 +3367,6 @@ static int hns3_client_init(struct hnae3_handle *handle)
priv->dev = &pdev->dev;
priv->netdev = netdev;
priv->ae_handle = handle;
priv->ae_handle->last_reset_time = jiffies;
priv->tx_timeout_count = 0;
handle->kinfo.netdev = netdev;
@ -3390,11 +3386,6 @@ static int hns3_client_init(struct hnae3_handle *handle)
/* Carrier off reporting is important to ethtool even BEFORE open */
netif_carrier_off(netdev);
if (handle->flags & HNAE3_SUPPORT_VF)
handle->reset_level = HNAE3_VF_RESET;
else
handle->reset_level = HNAE3_FUNC_RESET;
ret = hns3_get_ring_config(priv);
if (ret) {
ret = -ENOMEM;
@ -3785,7 +3776,6 @@ static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
"hns net up fail, ret=%d!\n", ret);
return ret;
}
handle->last_reset_time = jiffies;
}
clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);

23
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
View File

@ -2465,15 +2465,14 @@ static void hclge_clear_reset_cause(struct hclge_dev *hdev)
static void hclge_reset(struct hclge_dev *hdev)
{
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
struct hnae3_handle *handle;
/* Initialize ae_dev reset status as well, in case enet layer wants to
* know if device is undergoing reset
*/
ae_dev->reset_type = hdev->reset_type;
hdev->reset_count++;
hdev->last_reset_time = jiffies;
/* perform reset of the stack & ae device for a client */
handle = &hdev->vport[0].nic;
rtnl_lock();
hclge_notify_client(hdev, HNAE3_DOWN_CLIENT);
rtnl_unlock();
@ -2493,7 +2492,6 @@ static void hclge_reset(struct hclge_dev *hdev)
}
hclge_notify_client(hdev, HNAE3_UP_CLIENT);
handle->last_reset_time = jiffies;
rtnl_unlock();
ae_dev->reset_type = HNAE3_NONE_RESET;
}
@ -2521,24 +2519,24 @@ static void hclge_reset_event(struct pci_dev *pdev, struct hnae3_handle *handle)
if (!handle)
handle = &hdev->vport[0].nic;
if (time_before(jiffies, (handle->last_reset_time + 3 * HZ)))
if (time_before(jiffies, (hdev->last_reset_time + 3 * HZ)))
return;
else if (hdev->default_reset_request)
handle->reset_level =
hdev->reset_level =
hclge_get_reset_level(hdev,
&hdev->default_reset_request);
else if (time_after(jiffies, (handle->last_reset_time + 4 * 5 * HZ)))
handle->reset_level = HNAE3_FUNC_RESET;
else if (time_after(jiffies, (hdev->last_reset_time + 4 * 5 * HZ)))
hdev->reset_level = HNAE3_FUNC_RESET;
dev_info(&hdev->pdev->dev, "received reset event , reset type is %d",
handle->reset_level);
hdev->reset_level);
/* request reset & schedule reset task */
set_bit(handle->reset_level, &hdev->reset_request);
set_bit(hdev->reset_level, &hdev->reset_request);
hclge_reset_task_schedule(hdev);
if (handle->reset_level < HNAE3_GLOBAL_RESET)
handle->reset_level++;
if (hdev->reset_level < HNAE3_GLOBAL_RESET)
hdev->reset_level++;
}
static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev,
@ -2560,6 +2558,7 @@ static void hclge_reset_subtask(struct hclge_dev *hdev)
* b. else, we can come back later to check this status so re-sched
* now.
*/
hdev->last_reset_time = jiffies;
hdev->reset_type = hclge_get_reset_level(hdev, &hdev->reset_pending);
if (hdev->reset_type != HNAE3_NONE_RESET)
hclge_reset(hdev);
@ -6670,6 +6669,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
hdev->pdev = pdev;
hdev->ae_dev = ae_dev;
hdev->reset_type = HNAE3_NONE_RESET;
hdev->reset_level = HNAE3_FUNC_RESET;
ae_dev->priv = hdev;
ret = hclge_pci_init(hdev);
@ -6814,6 +6814,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
hclge_enable_vector(&hdev->misc_vector, true);
hclge_state_init(hdev);
hdev->last_reset_time = jiffies;
pr_info("%s driver initialization finished.\n", HCLGE_DRIVER_NAME);
return 0;

2
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
View File

@ -593,8 +593,10 @@ struct hclge_dev {
struct hclge_misc_vector misc_vector;
struct hclge_hw_stats hw_stats;
unsigned long state;
unsigned long last_reset_time;
enum hnae3_reset_type reset_type;
enum hnae3_reset_type reset_level;
unsigned long default_reset_request;
unsigned long reset_request; /* reset has been requested */
unsigned long reset_pending; /* client rst is pending to be served */

10
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
View File

@ -1234,17 +1234,17 @@ static void hclgevf_reset_event(struct pci_dev *pdev,
dev_info(&hdev->pdev->dev, "received reset request from VF enet\n");
if (!hdev->default_reset_request)
handle->reset_level =
hdev->reset_level =
hclgevf_get_reset_level(hdev,
&hdev->default_reset_request);
else
handle->reset_level = HNAE3_VF_RESET;
hdev->reset_level = HNAE3_VF_RESET;
/* reset of this VF requested */
set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state);
hclgevf_reset_task_schedule(hdev);
handle->last_reset_time = jiffies;
hdev->last_reset_time = jiffies;
}
static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev,
@ -1372,7 +1372,7 @@ static void hclgevf_reset_service_task(struct work_struct *work)
*/
if (hdev->reset_attempts > 3) {
/* prepare for full reset of stack + pcie interface */
hdev->nic.reset_level = HNAE3_VF_FULL_RESET;
hdev->reset_level = HNAE3_VF_FULL_RESET;
/* "defer" schedule the reset task again */
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
@ -1985,6 +1985,7 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
}
hclgevf_state_init(hdev);
hdev->reset_level = HNAE3_VF_RESET;
ret = hclgevf_misc_irq_init(hdev);
if (ret) {
@ -2026,6 +2027,7 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
goto err_config;
}
hdev->last_reset_time = jiffies;
pr_info("finished initializing %s driver\n", HCLGEVF_DRIVER_NAME);
return 0;

6
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
View File

@ -146,6 +146,8 @@ struct hclgevf_dev {
struct hclgevf_rss_cfg rss_cfg;
unsigned long state;
unsigned long default_reset_request;
unsigned long last_reset_time;
enum hnae3_reset_type reset_level;
#define HCLGEVF_RESET_REQUESTED 0
#define HCLGEVF_RESET_PENDING 1
@ -198,14 +200,14 @@ static inline bool hclgevf_dev_ongoing_reset(struct hclgevf_dev *hdev)
{
return (hdev &&
(test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) &&
(hdev->nic.reset_level == HNAE3_VF_RESET));
(hdev->reset_level == HNAE3_VF_RESET));
}
static inline bool hclgevf_dev_ongoing_full_reset(struct hclgevf_dev *hdev)
{
return (hdev &&
(test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) &&
(hdev->nic.reset_level == HNAE3_VF_FULL_RESET));
(hdev->reset_level == HNAE3_VF_FULL_RESET));
}
int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev, u16 code, u16 subcode,

2
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c
View File

@ -267,7 +267,7 @@ void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev)
* has been completely reset. After this stack should
* eventually be re-initialized.
*/
hdev->nic.reset_level = HNAE3_VF_RESET;
hdev->reset_level = HNAE3_VF_RESET;
set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
hclgevf_reset_task_schedule(hdev);