Device tree changes for v3.5 merge window
Mostly documentation updates, but also includes an empty stub for non-CONFIG_OF builds. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPvoQ5AAoJEEFnBt12D9kBuwoP/idxZjNqsrr/z52EiSmBdvcQ Nyh1pJXH5sRKekpYhpiDNYNf5ylz3SC/Lmo3Wf8hb9awlSFnqzD9+0d3VZ91jaEO NVGsiPCLUMs4zQZgrJ3uJqr9XvaFI+3A+zScI/bduJVDMVRYCGhNjefiw0cBBfG9 OHD1TSzwU09Lnormq/gIpBJrVvm6Io0Vhz3lSiyU7I0SBB68lmDWxPIPiaqK00oV +ac0ew2fDTWm4uZR32MvdKX2wUalYwZthm7Okw7NgQ24bCGem2V0dEXT2alynNPY 2w05aAZ8F/9AxPxquRZesoLwoThFYBntG1WWsH0aFp+EbaLz88ZT3YdOO+b8lNF2 mGPgi1V2iyxwX21X43a001u3yPIuYt34X3QQosk9DnGNNnLcMuherPBtaJTGw8d0 cqSzXUTf4W+kk06O2gav8KEg93t4BHIgyah+Zd2buOrZ5xdFc+Gg1qsTFY5XKJ1A NvdBMtqR1/rfMQYbFsQugVdmdUKaJnsIvJAgdpLp4z9De7175liURwr+zOkMWj2z RLLbkvvokolUrlaitoZVjkXGn45gj8kLCV8frH/t511O8XBAS0RDL0NKeTWc0UGh HnCsuSn+0jPpBohKwGNvrlK5mZKDBeXor2dMxslWnDz50L04NlfAj0zuVTBHSL6O TmSYezKb9/auktRLfgRf =acqX -----END PGP SIGNATURE----- Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6 Pull device tree changes from Grant Likely: "Mostly documentation updates, but also includes an empty stub for non-CONFIG_OF builds." * tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6: dt/documentation: Fix value format description dt: add vendor prefix for EM Microelectronics ARM: DT: Add binding for GIC virtualization extentions (VGIC) of/irq: add empty irq_of_parse_and_map() for non-dt builds
This commit is contained in:
Linus Torvalds
commit
0708500d49
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@ -11,7 +11,9 @@ have PPIs or SGIs.
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Main node required properties:
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- compatible : should be one of:
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"arm,cortex-a15-gic"
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"arm,cortex-a9-gic"
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"arm,cortex-a7-gic"
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"arm,arm11mp-gic"
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- interrupt-controller : Identifies the node as an interrupt controller
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- #interrupt-cells : Specifies the number of cells needed to encode an
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@ -39,8 +41,9 @@ Main node required properties:
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the GIC cpu interface register base and size.
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Optional
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- interrupts : Interrupt source of the parent interrupt controller. Only
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present on secondary GICs.
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- interrupts : Interrupt source of the parent interrupt controller on
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secondary GICs, or VGIC maintainance interrupt on primary GIC (see
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below).
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- cpu-offset : per-cpu offset within the distributor and cpu interface
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regions, used when the GIC doesn't have banked registers. The offset is
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@ -57,3 +60,31 @@ Example:
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<0xfff10100 0x100>;
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};
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* GIC virtualization extensions (VGIC)
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For ARM cores that support the virtualization extensions, additional
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properties must be described (they only exist if the GIC is the
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primary interrupt controller).
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Required properties:
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- reg : Additional regions specifying the base physical address and
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size of the VGIC registers. The first additional region is the GIC
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virtual interface control register base and size. The 2nd additional
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region is the GIC virtual cpu interface register base and size.
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- interrupts : VGIC maintainance interrupt.
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Example:
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interrupt-controller@2c001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2c001000 0x1000>,
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<0x2c002000 0x1000>,
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<0x2c004000 0x2000>,
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<0x2c006000 0x2000>;
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interrupts = <1 9 0xf04>;
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};
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@ -14,6 +14,7 @@ chrp Common Hardware Reference Platform
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cortina Cortina Systems, Inc.
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dallas Maxim Integrated Products (formerly Dallas Semiconductor)
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denx Denx Software Engineering
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emmicro EM Microelectronic
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epson Seiko Epson Corp.
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est ESTeem Wireless Modems
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fsl Freescale Semiconductor
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@ -551,12 +551,13 @@ Here is an example of a simple device-tree. In this example, an "o"
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designates a node followed by the node unit name. Properties are
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presented with their name followed by their content. "content"
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represents an ASCII string (zero terminated) value, while <content>
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represents a 32-bit hexadecimal value. The various nodes in this
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example will be discussed in a later chapter. At this point, it is
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only meant to give you a idea of what a device-tree looks like. I have
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purposefully kept the "name" and "linux,phandle" properties which
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aren't necessary in order to give you a better idea of what the tree
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looks like in practice.
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represents a 32-bit value, specified in decimal or hexadecimal (the
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latter prefixed 0x). The various nodes in this example will be
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discussed in a later chapter. At this point, it is only meant to give
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you a idea of what a device-tree looks like. I have purposefully kept
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the "name" and "linux,phandle" properties which aren't necessary in
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order to give you a better idea of what the tree looks like in
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practice.
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/ o device-tree
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|- name = "device-tree"
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@ -576,14 +577,14 @@ looks like in practice.
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| |- name = "PowerPC,970"
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| |- device_type = "cpu"
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| |- reg = <0>
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| |- clock-frequency = <5f5e1000>
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| |- clock-frequency = <0x5f5e1000>
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| |- 64-bit
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| |- linux,phandle = <2>
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o memory@0
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| |- name = "memory"
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| |- device_type = "memory"
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| |- reg = <00000000 00000000 00000000 20000000>
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| |- reg = <0x00000000 0x00000000 0x00000000 0x20000000>
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| |- linux,phandle = <3>
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o chosen
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@ -1010,8 +1011,8 @@ compatibility.
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <00000000 e0000000 00100000>
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reg = <e0000000 00003000>;
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ranges = <0x00000000 0xe0000000 0x00100000>
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reg = <0xe0000000 0x00003000>;
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bus-frequency = <0>;
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}
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@ -1085,16 +1086,16 @@ supported currently at the toplevel.
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* terminated string
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*/
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property2 = <1234abcd>; /* define a property containing a
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property2 = <0x1234abcd>; /* define a property containing a
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* numerical 32-bit value (hexadecimal)
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*/
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property3 = <12345678 12345678 deadbeef>;
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property3 = <0x12345678 0x12345678 0xdeadbeef>;
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/* define a property containing 3
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* numerical 32-bit values (cells) in
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* hexadecimal
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*/
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property4 = [0a 0b 0c 0d de ea ad be ef];
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property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef];
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/* define a property whose content is
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* an arbitrary array of bytes
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*/
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@ -1350,10 +1351,10 @@ Appendix A - Sample SOC node for MPC8540
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model = "TSEC";
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compatible = "gianfar", "simple-bus";
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reg = <0x24000 0x1000>;
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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interrupts = <29 2 30 2 34 2>;
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local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ];
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interrupts = <0x29 2 0x30 2 0x34 2>;
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phy-handle = <&phy0>;
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sleep = <&pmc 00000080>;
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sleep = <&pmc 0x00000080>;
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ranges;
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mdio@24520 {
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@ -1385,10 +1386,10 @@ Appendix A - Sample SOC node for MPC8540
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model = "TSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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interrupts = <13 2 14 2 18 2>;
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local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ];
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interrupts = <0x13 2 0x14 2 0x18 2>;
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phy-handle = <&phy1>;
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sleep = <&pmc 00000040>;
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sleep = <&pmc 0x00000040>;
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};
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ethernet@26000 {
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@ -1396,17 +1397,17 @@ Appendix A - Sample SOC node for MPC8540
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model = "FEC";
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compatible = "gianfar";
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reg = <0x26000 0x1000>;
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local-mac-address = [ 00 E0 0C 00 73 02 ];
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interrupts = <41 2>;
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local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ];
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interrupts = <0x41 2>;
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phy-handle = <&phy3>;
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sleep = <&pmc 00000020>;
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sleep = <&pmc 0x00000020>;
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};
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serial@4500 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8540-duart", "simple-bus";
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sleep = <&pmc 00000002>;
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sleep = <&pmc 0x00000002>;
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ranges;
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serial@4500 {
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@ -1414,7 +1415,7 @@ Appendix A - Sample SOC node for MPC8540
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compatible = "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupts = <0x42 2>;
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};
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serial@4600 {
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@ -1422,7 +1423,7 @@ Appendix A - Sample SOC node for MPC8540
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compatible = "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <42 2>;
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interrupts = <0x42 2>;
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};
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};
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@ -1436,11 +1437,11 @@ Appendix A - Sample SOC node for MPC8540
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};
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i2c@3000 {
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interrupts = <43 2>;
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interrupts = <0x43 2>;
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reg = <0x3000 0x100>;
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compatible = "fsl-i2c";
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dfsrr;
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sleep = <&pmc 00000004>;
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sleep = <&pmc 0x00000004>;
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};
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pmc: power@e0070 {
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@ -11,7 +11,7 @@ struct of_irq;
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#include <linux/of.h>
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/*
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* irq_of_parse_and_map() is used ba all OF enabled platforms; but SPARC
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* irq_of_parse_and_map() is used by all OF enabled platforms; but SPARC
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* implements it differently. However, the prototype is the same for all,
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* so declare it here regardless of the CONFIG_OF_IRQ setting.
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*/
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@ -76,5 +76,13 @@ extern struct device_node *of_irq_find_parent(struct device_node *child);
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extern void of_irq_init(const struct of_device_id *matches);
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#endif /* CONFIG_OF_IRQ */
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#endif /* CONFIG_OF */
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#else /* !CONFIG_OF */
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static inline unsigned int irq_of_parse_and_map(struct device_node *dev,
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int index)
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{
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return 0;
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}
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#endif /* !CONFIG_OF */
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#endif /* __OF_IRQ_H */
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