drm/i915: add DP support to intel_ddi_pll_mode_set
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -763,6 +763,7 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
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struct drm_encoder *encoder = &intel_encoder->base;
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struct drm_i915_private *dev_priv = crtc->dev->dev_private;
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struct intel_ddi_plls *plls = &dev_priv->ddi_plls;
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int type = intel_encoder->type;
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@ -773,7 +774,29 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
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intel_ddi_put_crtc_pll(crtc);
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if (type == INTEL_OUTPUT_HDMI) {
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if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
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struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
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switch (intel_dp->link_bw) {
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case DP_LINK_BW_1_62:
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intel_crtc->ddi_pll_sel = PORT_CLK_SEL_LCPLL_810;
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break;
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case DP_LINK_BW_2_7:
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intel_crtc->ddi_pll_sel = PORT_CLK_SEL_LCPLL_1350;
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break;
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case DP_LINK_BW_5_4:
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intel_crtc->ddi_pll_sel = PORT_CLK_SEL_LCPLL_2700;
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break;
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default:
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DRM_ERROR("Link bandwidth %d unsupported\n",
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intel_dp->link_bw);
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return false;
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}
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/* We don't need to turn any PLL on because we'll use LCPLL. */
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return true;
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} else if (type == INTEL_OUTPUT_HDMI) {
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int p, n2, r2;
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if (plls->wrpll1_refcount == 0) {
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