KVM/ARM changes for v4.2:
- Proper guest time accounting - FP access fix for 32bit - The usual pile of GIC fixes - PSCI fixes - Random cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVg/c2AAoJECPQ0LrRPXpDjSoQALjxhdY0ROAz2yjVqcYD5Goj 8XHLbwDxlXQIqXulEakpx/2CtQs3tYsnt7gg3HoO3aY0TqxKY+0nh9RuZ/b15KcP hailUK/hbdLo9sDmoPBRBBP26gqjnXVMYTNqSFk4u2KADYUYgl5auhXcTNARH6Gx +c3LJG9HUbbvKkTG+RB+Xgl3f9N0uaIaV15oTX+WsolNIQVmA8Sh5X7nXPnFXV4r klb9pcR3FPWA9m+fDW8VszoLZ39a12kfQsK0yshKy5ep/AA1liPEYDVc6Wp/cEqz ybDfGuO9GPoPLfzhYq1Cw/SeKaAFruu6QD1ugsSlh1DVZ2evme+OsEvzRsfCqEYc VkKkX2Rc8DQTjsJoaTCOmNfU+v0dWwriCXmfLPBj01+55M4oCDcntTasrEsDAc3o YkTk68T9HJxsNesWpkZDo0pYzGeu3GDS1Hg/ElESminCNfK/S/GBTtidLq7Rs7KU VJCaUeob6CoQnRdmNEm+nHInh5pSoOlKzdduFM9IcvOO5B12YlNMcVnr48Y16ea7 ElYGkxR/n/uLt33A3Yvaj8+PeJbwxQ1RcWRDJy8Fw77AFLEaT2VTr2kZgJIqTatQ ENnCLMxNP2uAt1TrGhEempndYZdWK/RiuaA9MjnxSscFkrXPfn4bMJzV58ghF9L+ 62hk2S8I8q69SvqbPTgv =VQWP -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/ARM changes for v4.2: - Proper guest time accounting - FP access fix for 32bit - The usual pile of GIC fixes - PSCI fixes - Random cleanups
This commit is contained in:
commit
05fe125fa3
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@ -28,6 +28,7 @@ config KVM
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select KVM_GENERIC_DIRTYLOG_READ_PROTECT
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select SRCU
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select MMU_NOTIFIER
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select KVM_VFIO
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select HAVE_KVM_EVENTFD
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select HAVE_KVM_IRQFD
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depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER
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@ -15,7 +15,7 @@ AFLAGS_init.o := -Wa,-march=armv7-a$(plus_virt)
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AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt)
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KVM := ../../../virt/kvm
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kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o
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kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o $(KVM)/vfio.o
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obj-y += kvm-arm.o init.o interrupts.o
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obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o
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@ -171,7 +171,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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int r;
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switch (ext) {
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case KVM_CAP_IRQCHIP:
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case KVM_CAP_IRQFD:
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case KVM_CAP_IOEVENTFD:
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case KVM_CAP_DEVICE_CTRL:
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case KVM_CAP_USER_MEMORY:
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@ -532,6 +531,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
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kvm_vgic_flush_hwstate(vcpu);
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kvm_timer_flush_hwstate(vcpu);
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preempt_disable();
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local_irq_disable();
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/*
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@ -544,6 +544,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
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if (ret <= 0 || need_new_vmid_gen(vcpu->kvm)) {
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local_irq_enable();
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preempt_enable();
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kvm_timer_sync_hwstate(vcpu);
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kvm_vgic_sync_hwstate(vcpu);
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continue;
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@ -559,8 +560,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
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ret = kvm_call_hyp(__kvm_vcpu_run, vcpu);
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vcpu->mode = OUTSIDE_GUEST_MODE;
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__kvm_guest_exit();
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trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
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/*
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* Back from guest
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*************************************************************/
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/*
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* We may have taken a host interrupt in HYP mode (ie
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* while executing the guest). This interrupt is still
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@ -574,8 +577,17 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
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local_irq_enable();
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/*
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* Back from guest
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*************************************************************/
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* We do local_irq_enable() before calling kvm_guest_exit() so
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* that if a timer interrupt hits while running the guest we
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* account that tick as being spent in the guest. We enable
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* preemption after calling kvm_guest_exit() so that if we get
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* preempted we make sure ticks after that is not counted as
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* guest time.
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*/
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kvm_guest_exit();
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trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
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preempt_enable();
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kvm_timer_sync_hwstate(vcpu);
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kvm_vgic_sync_hwstate(vcpu);
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@ -170,13 +170,9 @@ __kvm_vcpu_return:
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@ Don't trap coprocessor accesses for host kernel
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set_hstr vmexit
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set_hdcr vmexit
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set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11))
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set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11)), after_vfp_restore
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#ifdef CONFIG_VFPv3
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@ Save floating point registers we if let guest use them.
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tst r2, #(HCPTR_TCP(10) | HCPTR_TCP(11))
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bne after_vfp_restore
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@ Switch VFP/NEON hardware state to the host's
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add r7, vcpu, #VCPU_VFP_GUEST
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store_vfp_state r7
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@ -188,6 +184,8 @@ after_vfp_restore:
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@ Restore FPEXC_EN which we clobbered on entry
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pop {r2}
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VFPFMXR FPEXC, r2
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#else
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after_vfp_restore:
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#endif
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@ Reset Hyp-role
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@ -483,7 +481,7 @@ switch_to_guest_vfp:
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push {r3-r7}
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@ NEON/VFP used. Turn on VFP access.
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set_hcptr vmexit, (HCPTR_TCP(10) | HCPTR_TCP(11))
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set_hcptr vmtrap, (HCPTR_TCP(10) | HCPTR_TCP(11))
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@ Switch VFP/NEON hardware state to the guest's
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add r7, r0, #VCPU_VFP_HOST
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@ -412,7 +412,6 @@ vcpu .req r0 @ vcpu pointer always in r0
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add r11, vcpu, #VCPU_VGIC_CPU
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/* Save all interesting registers */
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ldr r3, [r2, #GICH_HCR]
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ldr r4, [r2, #GICH_VMCR]
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ldr r5, [r2, #GICH_MISR]
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ldr r6, [r2, #GICH_EISR0]
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@ -420,7 +419,6 @@ vcpu .req r0 @ vcpu pointer always in r0
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ldr r8, [r2, #GICH_ELRSR0]
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ldr r9, [r2, #GICH_ELRSR1]
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ldr r10, [r2, #GICH_APR]
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ARM_BE8(rev r3, r3 )
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ARM_BE8(rev r4, r4 )
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ARM_BE8(rev r5, r5 )
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ARM_BE8(rev r6, r6 )
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@ -429,7 +427,6 @@ ARM_BE8(rev r8, r8 )
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ARM_BE8(rev r9, r9 )
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ARM_BE8(rev r10, r10 )
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str r3, [r11, #VGIC_V2_CPU_HCR]
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str r4, [r11, #VGIC_V2_CPU_VMCR]
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str r5, [r11, #VGIC_V2_CPU_MISR]
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#ifdef CONFIG_CPU_ENDIAN_BE8
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@ -591,8 +588,13 @@ ARM_BE8(rev r6, r6 )
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.endm
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/* Configures the HCPTR (Hyp Coprocessor Trap Register) on entry/return
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* (hardware reset value is 0). Keep previous value in r2. */
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.macro set_hcptr operation, mask
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* (hardware reset value is 0). Keep previous value in r2.
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* An ISB is emited on vmexit/vmtrap, but executed on vmexit only if
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* VFP wasn't already enabled (always executed on vmtrap).
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* If a label is specified with vmexit, it is branched to if VFP wasn't
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* enabled.
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*/
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.macro set_hcptr operation, mask, label = none
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mrc p15, 4, r2, c1, c1, 2
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ldr r3, =\mask
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.if \operation == vmentry
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@ -601,6 +603,17 @@ ARM_BE8(rev r6, r6 )
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bic r3, r2, r3 @ Don't trap defined coproc-accesses
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.endif
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mcr p15, 4, r3, c1, c1, 2
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.if \operation != vmentry
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.if \operation == vmexit
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tst r2, #(HCPTR_TCP(10) | HCPTR_TCP(11))
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beq 1f
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.endif
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isb
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.if \label != none
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b \label
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.endif
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1:
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.endif
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.endm
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/* Configures the HDCR (Hyp Debug Configuration Register) on entry/return
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@ -691,8 +691,8 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm)
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* work. This is not used by the hardware and we have no
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* alignment requirement for this allocation.
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*/
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pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
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GFP_KERNEL | __GFP_ZERO);
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pgd = kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
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GFP_KERNEL | __GFP_ZERO);
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if (!pgd) {
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kvm_free_hwpgd(hwpgd);
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@ -230,10 +230,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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case PSCI_0_2_FN64_AFFINITY_INFO:
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val = kvm_psci_vcpu_affinity_info(vcpu);
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break;
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case PSCI_0_2_FN_MIGRATE:
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case PSCI_0_2_FN64_MIGRATE:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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/*
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* Trusted OS is MP hence does not require migration
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@ -242,10 +238,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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*/
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val = PSCI_0_2_TOS_MP;
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break;
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case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
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case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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case PSCI_0_2_FN_SYSTEM_OFF:
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kvm_psci_system_off(vcpu);
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/*
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@ -271,7 +263,8 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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ret = 0;
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break;
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default:
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return -EINVAL;
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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*vcpu_reg(vcpu, 0) = val;
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@ -291,12 +284,9 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
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case KVM_PSCI_FN_CPU_ON:
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val = kvm_psci_vcpu_on(vcpu);
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break;
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case KVM_PSCI_FN_CPU_SUSPEND:
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case KVM_PSCI_FN_MIGRATE:
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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default:
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return -EINVAL;
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}
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*vcpu_reg(vcpu, 0) = val;
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@ -28,6 +28,7 @@ config KVM
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select KVM_ARM_HOST
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select KVM_GENERIC_DIRTYLOG_READ_PROTECT
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select SRCU
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select KVM_VFIO
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select HAVE_KVM_EVENTFD
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select HAVE_KVM_IRQFD
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---help---
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@ -11,7 +11,7 @@ ARM=../../../arch/arm/kvm
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obj-$(CONFIG_KVM_ARM_HOST) += kvm.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o $(KVM)/vfio.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/arm.o $(ARM)/mmu.o $(ARM)/mmio.o
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kvm-$(CONFIG_KVM_ARM_HOST) += $(ARM)/psci.o $(ARM)/perf.o
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@ -50,8 +50,8 @@
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stp x29, lr, [x3, #80]
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mrs x19, sp_el0
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mrs x20, elr_el2 // EL1 PC
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mrs x21, spsr_el2 // EL1 pstate
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mrs x20, elr_el2 // pc before entering el2
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mrs x21, spsr_el2 // pstate before entering el2
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stp x19, x20, [x3, #96]
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str x21, [x3, #112]
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@ -82,8 +82,8 @@
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ldr x21, [x3, #16]
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msr sp_el0, x19
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msr elr_el2, x20 // EL1 PC
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msr spsr_el2, x21 // EL1 pstate
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msr elr_el2, x20 // pc on return from el2
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msr spsr_el2, x21 // pstate on return from el2
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add x3, x2, #CPU_XREG_OFFSET(19)
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ldp x19, x20, [x3]
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|
|
|
@ -47,7 +47,6 @@ __save_vgic_v2_state:
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add x3, x0, #VCPU_VGIC_CPU
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|
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/* Save all interesting registers */
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ldr w4, [x2, #GICH_HCR]
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ldr w5, [x2, #GICH_VMCR]
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ldr w6, [x2, #GICH_MISR]
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ldr w7, [x2, #GICH_EISR0]
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|
@ -55,7 +54,6 @@ __save_vgic_v2_state:
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|||
ldr w9, [x2, #GICH_ELRSR0]
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ldr w10, [x2, #GICH_ELRSR1]
|
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ldr w11, [x2, #GICH_APR]
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CPU_BE( rev w4, w4 )
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CPU_BE( rev w5, w5 )
|
||||
CPU_BE( rev w6, w6 )
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||||
CPU_BE( rev w7, w7 )
|
||||
|
@ -64,7 +62,6 @@ CPU_BE( rev w9, w9 )
|
|||
CPU_BE( rev w10, w10 )
|
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CPU_BE( rev w11, w11 )
|
||||
|
||||
str w4, [x3, #VGIC_V2_CPU_HCR]
|
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str w5, [x3, #VGIC_V2_CPU_VMCR]
|
||||
str w6, [x3, #VGIC_V2_CPU_MISR]
|
||||
CPU_LE( str w7, [x3, #VGIC_V2_CPU_EISR] )
|
||||
|
|
|
@ -48,13 +48,11 @@
|
|||
dsb st
|
||||
|
||||
// Save all interesting registers
|
||||
mrs_s x4, ICH_HCR_EL2
|
||||
mrs_s x5, ICH_VMCR_EL2
|
||||
mrs_s x6, ICH_MISR_EL2
|
||||
mrs_s x7, ICH_EISR_EL2
|
||||
mrs_s x8, ICH_ELSR_EL2
|
||||
|
||||
str w4, [x3, #VGIC_V3_CPU_HCR]
|
||||
str w5, [x3, #VGIC_V3_CPU_VMCR]
|
||||
str w6, [x3, #VGIC_V3_CPU_MISR]
|
||||
str w7, [x3, #VGIC_V3_CPU_EISR]
|
||||
|
|
|
@ -897,7 +897,7 @@ struct kvm_xen_hvm_config {
|
|||
*
|
||||
* KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies
|
||||
* the irqfd to operate in resampling mode for level triggered interrupt
|
||||
* emlation. See Documentation/virtual/kvm/api.txt.
|
||||
* emulation. See Documentation/virtual/kvm/api.txt.
|
||||
*/
|
||||
#define KVM_IRQFD_FLAG_RESAMPLE (1 << 1)
|
||||
|
||||
|
|
|
@ -76,8 +76,6 @@ static bool handle_mmio_ctlr(struct kvm_vcpu *vcpu,
|
|||
vgic_reg_access(mmio, ®, offset,
|
||||
ACCESS_READ_VALUE | ACCESS_WRITE_VALUE);
|
||||
if (mmio->is_write) {
|
||||
if (reg & GICD_CTLR_ENABLE_SS_G0)
|
||||
kvm_info("guest tried to enable unsupported Group0 interrupts\n");
|
||||
vcpu->kvm->arch.vgic.enabled = !!(reg & GICD_CTLR_ENABLE_SS_G1);
|
||||
vgic_update_state(vcpu->kvm);
|
||||
return true;
|
||||
|
@ -173,6 +171,32 @@ static bool handle_mmio_clear_pending_reg_dist(struct kvm_vcpu *vcpu,
|
|||
return false;
|
||||
}
|
||||
|
||||
static bool handle_mmio_set_active_reg_dist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
{
|
||||
if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))
|
||||
return vgic_handle_set_active_reg(vcpu->kvm, mmio, offset,
|
||||
vcpu->vcpu_id);
|
||||
|
||||
vgic_reg_access(mmio, NULL, offset,
|
||||
ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED);
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool handle_mmio_clear_active_reg_dist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
{
|
||||
if (likely(offset >= VGIC_NR_PRIVATE_IRQS / 8))
|
||||
return vgic_handle_clear_active_reg(vcpu->kvm, mmio, offset,
|
||||
vcpu->vcpu_id);
|
||||
|
||||
vgic_reg_access(mmio, NULL, offset,
|
||||
ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED);
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool handle_mmio_priority_reg_dist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
|
@ -428,13 +452,13 @@ static const struct vgic_io_range vgic_v3_dist_ranges[] = {
|
|||
.base = GICD_ISACTIVER,
|
||||
.len = 0x80,
|
||||
.bits_per_irq = 1,
|
||||
.handle_mmio = handle_mmio_raz_wi,
|
||||
.handle_mmio = handle_mmio_set_active_reg_dist,
|
||||
},
|
||||
{
|
||||
.base = GICD_ICACTIVER,
|
||||
.len = 0x80,
|
||||
.bits_per_irq = 1,
|
||||
.handle_mmio = handle_mmio_raz_wi,
|
||||
.handle_mmio = handle_mmio_clear_active_reg_dist,
|
||||
},
|
||||
{
|
||||
.base = GICD_IPRIORITYR,
|
||||
|
@ -561,6 +585,26 @@ static bool handle_mmio_clear_enable_reg_redist(struct kvm_vcpu *vcpu,
|
|||
ACCESS_WRITE_CLEARBIT);
|
||||
}
|
||||
|
||||
static bool handle_mmio_set_active_reg_redist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
{
|
||||
struct kvm_vcpu *redist_vcpu = mmio->private;
|
||||
|
||||
return vgic_handle_set_active_reg(vcpu->kvm, mmio, offset,
|
||||
redist_vcpu->vcpu_id);
|
||||
}
|
||||
|
||||
static bool handle_mmio_clear_active_reg_redist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
{
|
||||
struct kvm_vcpu *redist_vcpu = mmio->private;
|
||||
|
||||
return vgic_handle_clear_active_reg(vcpu->kvm, mmio, offset,
|
||||
redist_vcpu->vcpu_id);
|
||||
}
|
||||
|
||||
static bool handle_mmio_set_pending_reg_redist(struct kvm_vcpu *vcpu,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset)
|
||||
|
@ -674,13 +718,13 @@ static const struct vgic_io_range vgic_redist_ranges[] = {
|
|||
.base = SGI_base(GICR_ISACTIVER0),
|
||||
.len = 0x04,
|
||||
.bits_per_irq = 1,
|
||||
.handle_mmio = handle_mmio_raz_wi,
|
||||
.handle_mmio = handle_mmio_set_active_reg_redist,
|
||||
},
|
||||
{
|
||||
.base = SGI_base(GICR_ICACTIVER0),
|
||||
.len = 0x04,
|
||||
.bits_per_irq = 1,
|
||||
.handle_mmio = handle_mmio_raz_wi,
|
||||
.handle_mmio = handle_mmio_clear_active_reg_redist,
|
||||
},
|
||||
{
|
||||
.base = SGI_base(GICR_IPRIORITYR0),
|
||||
|
|
|
@ -26,8 +26,6 @@
|
|||
#include <linux/of_irq.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
|
||||
#include <asm/kvm_emulate.h>
|
||||
#include <asm/kvm_arm.h>
|
||||
#include <asm/kvm_mmu.h>
|
||||
|
@ -1561,7 +1559,7 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
|
|||
goto out;
|
||||
}
|
||||
|
||||
if (irq_num >= kvm->arch.vgic.nr_irqs)
|
||||
if (irq_num >= min(kvm->arch.vgic.nr_irqs, 1020))
|
||||
return -EINVAL;
|
||||
|
||||
vcpu_id = vgic_update_irq_pending(kvm, cpuid, irq_num, level);
|
||||
|
@ -2161,10 +2159,7 @@ int kvm_set_irq(struct kvm *kvm, int irq_source_id,
|
|||
|
||||
BUG_ON(!vgic_initialized(kvm));
|
||||
|
||||
if (spi > kvm->arch.vgic.nr_irqs)
|
||||
return -EINVAL;
|
||||
return kvm_vgic_inject_irq(kvm, 0, spi, level);
|
||||
|
||||
}
|
||||
|
||||
/* MSI not implemented yet */
|
||||
|
|
Loading…
Reference in New Issue