ACPI, Add 64bit read/write support to atomicio on i386
There is no 64bit read/write support in ACPI atomicio because readq/writeq is used to implement 64bit read/write, but readq/writeq is not available on i386. This patch implement 64bit read/write support in atomicio via two readl/writel. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -260,6 +260,21 @@ int acpi_post_unmap_gar(struct acpi_generic_address *reg)
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}
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EXPORT_SYMBOL_GPL(acpi_post_unmap_gar);
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#ifdef readq
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static inline u64 read64(const volatile void __iomem *addr)
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{
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return readq(addr);
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}
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#else
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static inline u64 read64(const volatile void __iomem *addr)
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{
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u64 l, h;
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l = readl(addr);
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h = readl(addr+4);
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return l | (h << 32);
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}
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#endif
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/*
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* Can be used in atomic (including NMI) or process context. RCU read
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* lock can only be released after the IO memory area accessing.
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@ -280,11 +295,9 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width)
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case 32:
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*val = readl(addr);
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break;
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#ifdef readq
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case 64:
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*val = readq(addr);
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*val = read64(addr);
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break;
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#endif
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default:
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return -EINVAL;
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}
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@ -293,6 +306,19 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width)
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return 0;
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}
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#ifdef writeq
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static inline void write64(u64 val, volatile void __iomem *addr)
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{
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writeq(val, addr);
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}
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#else
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static inline void write64(u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val>>32, addr+4);
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}
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#endif
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static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width)
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{
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void __iomem *addr;
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@ -309,11 +335,9 @@ static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width)
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case 32:
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writel(val, addr);
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break;
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#ifdef writeq
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case 64:
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writeq(val, addr);
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write64(val, addr);
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break;
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#endif
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default:
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return -EINVAL;
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}
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