[WATCHDOG] Add watchdog driver for NUC900
Add watchdog device driver for the Nuvoton NUC900 series SoCs. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Wan ZongShun
Wim Van Sebroeck
parent
3a5f90002e
commit
0400e3134b
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@ -266,6 +266,15 @@ config STMP3XXX_WATCHDOG
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To compile this driver as a module, choose M here: the
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module will be called stmp3xxx_wdt.
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config NUC900_WATCHDOG
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tristate "Nuvoton NUC900 watchdog"
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depends on ARCH_W90X900
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help
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Say Y here if to include support for the watchdog timer
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for the Nuvoton NUC900 series SoCs.
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To compile this driver as a module, choose M here: the
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module will be called nuc900_wdt.
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# AVR32 Architecture
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config AT32AP700X_WDT
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@ -44,6 +44,7 @@ obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
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obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
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obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
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obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o
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obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
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# AVR32 Architecture
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obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
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@ -0,0 +1,353 @@
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/*
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* Copyright (c) 2009 Nuvoton technology corporation.
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation;version 2 of the License.
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*
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <linux/uaccess.h>
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#define REG_WTCR 0x1c
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#define WTCLK (0x01 << 10)
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#define WTE (0x01 << 7) /*wdt enable*/
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#define WTIS (0x03 << 4)
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#define WTIF (0x01 << 3)
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#define WTRF (0x01 << 2)
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#define WTRE (0x01 << 1)
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#define WTR (0x01 << 0)
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/*
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* The watchdog time interval can be calculated via following formula:
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* WTIS real time interval (formula)
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* 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
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* 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
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* 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
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* 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
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*
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* The external crystal freq is 15Mhz in the nuc900 evaluation board.
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* So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
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* 0x03 = +- 16.92 seconds..
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*/
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#define WDT_HW_TIMEOUT 0x02
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#define WDT_TIMEOUT (HZ/2)
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#define WDT_HEARTBEAT 15
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static int heartbeat = WDT_HEARTBEAT;
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
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"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
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static int nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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struct nuc900_wdt {
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struct resource *res;
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struct clk *wdt_clock;
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struct platform_device *pdev;
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void __iomem *wdt_base;
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char expect_close;
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struct timer_list timer;
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spinlock_t wdt_lock;
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unsigned long next_heartbeat;
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};
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static unsigned long nuc900wdt_busy;
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struct nuc900_wdt *nuc900_wdt;
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static inline void nuc900_wdt_keepalive(void)
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{
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unsigned int val;
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spin_lock(&nuc900_wdt->wdt_lock);
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val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
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val |= (WTR | WTIF);
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__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
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spin_unlock(&nuc900_wdt->wdt_lock);
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}
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static inline void nuc900_wdt_start(void)
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{
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unsigned int val;
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spin_lock(&nuc900_wdt->wdt_lock);
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val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
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val |= (WTRE | WTE | WTR | WTCLK | WTIF);
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val &= ~WTIS;
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val |= (WDT_HW_TIMEOUT << 0x04);
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__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
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spin_unlock(&nuc900_wdt->wdt_lock);
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nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
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mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
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}
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static inline void nuc900_wdt_stop(void)
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{
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unsigned int val;
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del_timer(&nuc900_wdt->timer);
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spin_lock(&nuc900_wdt->wdt_lock);
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val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
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val &= ~WTE;
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__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
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spin_unlock(&nuc900_wdt->wdt_lock);
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}
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static inline void nuc900_wdt_ping(void)
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{
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nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
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}
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static int nuc900_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &nuc900wdt_busy))
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return -EBUSY;
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nuc900_wdt_start();
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return nonseekable_open(inode, file);
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}
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static int nuc900_wdt_close(struct inode *inode, struct file *file)
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{
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if (nuc900_wdt->expect_close == 42)
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nuc900_wdt_stop();
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else {
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dev_crit(&nuc900_wdt->pdev->dev,
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"Unexpected close, not stopping watchdog!\n");
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nuc900_wdt_ping();
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}
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nuc900_wdt->expect_close = 0;
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clear_bit(0, &nuc900wdt_busy);
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return 0;
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}
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static const struct watchdog_info nuc900_wdt_info = {
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.identity = "nuc900 watchdog",
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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static long nuc900_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int new_value;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &nuc900_wdt_info,
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sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_KEEPALIVE:
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nuc900_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_value, p))
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return -EFAULT;
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heartbeat = new_value;
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nuc900_wdt_ping();
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return put_user(new_value, p);
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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default:
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return -ENOTTY;
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}
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}
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static ssize_t nuc900_wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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if (!len)
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return 0;
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/* Scan for magic character */
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if (!nowayout) {
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size_t i;
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nuc900_wdt->expect_close = 0;
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for (i = 0; i < len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V') {
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nuc900_wdt->expect_close = 42;
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break;
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}
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}
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}
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nuc900_wdt_ping();
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return len;
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}
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static void nuc900_wdt_timer_ping(unsigned long data)
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{
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if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
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nuc900_wdt_keepalive();
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mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
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} else
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dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
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}
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static const struct file_operations nuc900wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.unlocked_ioctl = nuc900_wdt_ioctl,
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.open = nuc900_wdt_open,
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.release = nuc900_wdt_close,
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.write = nuc900_wdt_write,
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};
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static struct miscdevice nuc900wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &nuc900wdt_fops,
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};
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static int __devinit nuc900wdt_probe(struct platform_device *pdev)
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{
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int ret = 0;
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nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL);
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if (!nuc900_wdt)
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return -ENOMEM;
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nuc900_wdt->pdev = pdev;
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spin_lock_init(&nuc900_wdt->wdt_lock);
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nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (nuc900_wdt->res == NULL) {
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dev_err(&pdev->dev, "no memory resource specified\n");
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ret = -ENOENT;
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goto err_get;
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}
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if (!request_mem_region(nuc900_wdt->res->start,
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resource_size(nuc900_wdt->res), pdev->name)) {
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dev_err(&pdev->dev, "failed to get memory region\n");
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ret = -ENOENT;
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goto err_get;
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}
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nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start,
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resource_size(nuc900_wdt->res));
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if (nuc900_wdt->wdt_base == NULL) {
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dev_err(&pdev->dev, "failed to ioremap() region\n");
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ret = -EINVAL;
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goto err_req;
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}
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nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL);
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if (IS_ERR(nuc900_wdt->wdt_clock)) {
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dev_err(&pdev->dev, "failed to find watchdog clock source\n");
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ret = PTR_ERR(nuc900_wdt->wdt_clock);
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goto err_map;
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}
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clk_enable(nuc900_wdt->wdt_clock);
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setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);
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if (misc_register(&nuc900wdt_miscdev)) {
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dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
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WATCHDOG_MINOR, ret);
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goto err_clk;
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}
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return 0;
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err_clk:
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clk_disable(nuc900_wdt->wdt_clock);
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clk_put(nuc900_wdt->wdt_clock);
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err_map:
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iounmap(nuc900_wdt->wdt_base);
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err_req:
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release_mem_region(nuc900_wdt->res->start,
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resource_size(nuc900_wdt->res));
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err_get:
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kfree(nuc900_wdt);
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return ret;
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}
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static int __devexit nuc900wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&nuc900wdt_miscdev);
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clk_disable(nuc900_wdt->wdt_clock);
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clk_put(nuc900_wdt->wdt_clock);
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iounmap(nuc900_wdt->wdt_base);
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release_mem_region(nuc900_wdt->res->start,
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resource_size(nuc900_wdt->res));
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kfree(nuc900_wdt);
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return 0;
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}
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static struct platform_driver nuc900wdt_driver = {
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.probe = nuc900wdt_probe,
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.remove = __devexit_p(nuc900wdt_remove),
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.driver = {
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.name = "nuc900-wdt",
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.owner = THIS_MODULE,
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},
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};
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static int __init nuc900_wdt_init(void)
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{
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return platform_driver_register(&nuc900wdt_driver);
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}
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static void __exit nuc900_wdt_exit(void)
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{
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platform_driver_unregister(&nuc900wdt_driver);
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}
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module_init(nuc900_wdt_init);
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module_exit(nuc900_wdt_exit);
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MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
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MODULE_DESCRIPTION("Watchdog driver for NUC900");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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MODULE_ALIAS("platform:nuc900-wdt");
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