ARM: dts: rockchip: add cpu-core resets for rk3188
Specify the reset handles for each cpu core. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
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@ -26,6 +26,7 @@
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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operating-points-v2 = <&cpu0_opp_table>;
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resets = <&cru SRST_CORE0>;
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};
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cpu@1 {
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device_type = "cpu";
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@ -33,6 +34,7 @@
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next-level-cache = <&L2>;
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reg = <0x1>;
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operating-points-v2 = <&cpu0_opp_table>;
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resets = <&cru SRST_CORE1>;
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};
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cpu@2 {
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device_type = "cpu";
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@ -40,6 +42,7 @@
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next-level-cache = <&L2>;
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reg = <0x2>;
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operating-points-v2 = <&cpu0_opp_table>;
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resets = <&cru SRST_CORE2>;
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};
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cpu@3 {
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device_type = "cpu";
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@ -47,6 +50,7 @@
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next-level-cache = <&L2>;
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reg = <0x3>;
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operating-points-v2 = <&cpu0_opp_table>;
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resets = <&cru SRST_CORE3>;
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};
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};
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