Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 mm changes from Ingo Molnar: "This tree includes a micro-optimization that avoids cr3 switches during idling; it fixes corner cases and there's also small cleanups" Fix up trivial context conflict with the percpu_xx -> this_cpu_xx changes. * 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86-64: Fix accounting in kernel_physical_mapping_init() x86/tlb: Clean up and unify TLB_FLUSH_ALL definition x86: Drop obsolete ARCH_BOOTMEM support x86, tlb: Switch cr3 in leave_mm() only when needed x86/mm: Fix the size calculation of mapping tables
This commit is contained in:
commit
02171b4a7c
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@ -1238,10 +1238,6 @@ config NODES_SHIFT
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Specify the maximum number of NUMA Nodes available on the target
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system. Increases memory reserved to accommodate various tables.
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config HAVE_ARCH_BOOTMEM
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def_bool y
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depends on X86_32 && NUMA
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config HAVE_ARCH_ALLOC_REMAP
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def_bool y
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depends on X86_32 && NUMA
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@ -61,10 +61,4 @@ static inline int pfn_valid(int pfn)
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#endif /* CONFIG_DISCONTIGMEM */
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#ifdef CONFIG_NEED_MULTIPLE_NODES
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/* always use node 0 for bootmem on this numa platform */
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#define bootmem_arch_preferred_node(__bdata, size, align, goal, limit) \
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(NODE_DATA(0)->bdata)
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#endif /* CONFIG_NEED_MULTIPLE_NODES */
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#endif /* _ASM_X86_MMZONE_32_H */
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@ -62,11 +62,7 @@ static inline void __flush_tlb_one(unsigned long addr)
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__flush_tlb();
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}
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#ifdef CONFIG_X86_32
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# define TLB_FLUSH_ALL 0xffffffff
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#else
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# define TLB_FLUSH_ALL -1ULL
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#endif
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#define TLB_FLUSH_ALL -1UL
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/*
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* TLB flushing:
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@ -29,8 +29,14 @@ int direct_gbpages
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#endif
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;
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static void __init find_early_table_space(unsigned long end, int use_pse,
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int use_gbpages)
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struct map_range {
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unsigned long start;
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unsigned long end;
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unsigned page_size_mask;
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};
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static void __init find_early_table_space(struct map_range *mr, unsigned long end,
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int use_pse, int use_gbpages)
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{
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unsigned long puds, pmds, ptes, tables, start = 0, good_end = end;
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phys_addr_t base;
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@ -55,6 +61,9 @@ static void __init find_early_table_space(unsigned long end, int use_pse,
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#ifdef CONFIG_X86_32
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extra += PMD_SIZE;
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#endif
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/* The first 2/4M doesn't use large pages. */
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extra += mr->end - mr->start;
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ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
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} else
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ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
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@ -84,12 +93,6 @@ void __init native_pagetable_reserve(u64 start, u64 end)
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memblock_reserve(start, end - start);
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}
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struct map_range {
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unsigned long start;
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unsigned long end;
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unsigned page_size_mask;
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};
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#ifdef CONFIG_X86_32
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#define NR_RANGE_MR 3
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#else /* CONFIG_X86_64 */
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@ -261,7 +264,7 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
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* nodes are discovered.
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*/
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if (!after_bootmem)
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find_early_table_space(end, use_pse, use_gbpages);
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find_early_table_space(&mr[0], end, use_pse, use_gbpages);
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for (i = 0; i < nr_range; i++)
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ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
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@ -407,12 +407,12 @@ static unsigned long __meminit
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phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
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unsigned long page_size_mask, pgprot_t prot)
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{
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unsigned long pages = 0;
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unsigned long pages = 0, next;
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unsigned long last_map_addr = end;
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int i = pmd_index(address);
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for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) {
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for (; i < PTRS_PER_PMD; i++, address = next) {
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unsigned long pte_phys;
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pmd_t *pmd = pmd_page + pmd_index(address);
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pte_t *pte;
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@ -426,6 +426,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
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break;
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}
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next = (address & PMD_MASK) + PMD_SIZE;
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if (pmd_val(*pmd)) {
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if (!pmd_large(*pmd)) {
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spin_lock(&init_mm.page_table_lock);
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@ -449,7 +451,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
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* attributes.
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*/
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if (page_size_mask & (1 << PG_LEVEL_2M)) {
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pages++;
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last_map_addr = next;
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continue;
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}
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new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
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@ -462,7 +464,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
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pfn_pte(address >> PAGE_SHIFT,
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__pgprot(pgprot_val(prot) | _PAGE_PSE)));
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spin_unlock(&init_mm.page_table_lock);
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last_map_addr = (address & PMD_MASK) + PMD_SIZE;
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last_map_addr = next;
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continue;
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}
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@ -482,11 +484,11 @@ static unsigned long __meminit
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phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
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unsigned long page_size_mask)
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{
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unsigned long pages = 0;
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unsigned long pages = 0, next;
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unsigned long last_map_addr = end;
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int i = pud_index(addr);
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for (; i < PTRS_PER_PUD; i++, addr = (addr & PUD_MASK) + PUD_SIZE) {
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for (; i < PTRS_PER_PUD; i++, addr = next) {
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unsigned long pmd_phys;
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pud_t *pud = pud_page + pud_index(addr);
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pmd_t *pmd;
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@ -495,8 +497,9 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
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if (addr >= end)
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break;
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if (!after_bootmem &&
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!e820_any_mapped(addr, addr+PUD_SIZE, 0)) {
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next = (addr & PUD_MASK) + PUD_SIZE;
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if (!after_bootmem && !e820_any_mapped(addr, next, 0)) {
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set_pud(pud, __pud(0));
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continue;
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}
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@ -523,7 +526,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
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* attributes.
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*/
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if (page_size_mask & (1 << PG_LEVEL_1G)) {
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pages++;
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last_map_addr = next;
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continue;
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}
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prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
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@ -535,7 +538,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
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set_pte((pte_t *)pud,
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pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
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spin_unlock(&init_mm.page_table_lock);
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last_map_addr = (addr & PUD_MASK) + PUD_SIZE;
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last_map_addr = next;
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continue;
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}
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@ -61,11 +61,13 @@ static DEFINE_PER_CPU_READ_MOSTLY(int, tlb_vector_offset);
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*/
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void leave_mm(int cpu)
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{
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struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm);
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if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
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BUG();
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cpumask_clear_cpu(cpu,
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mm_cpumask(this_cpu_read(cpu_tlbstate.active_mm)));
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if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
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cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
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load_cr3(swapper_pg_dir);
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}
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}
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EXPORT_SYMBOL_GPL(leave_mm);
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