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Merge branch 'sh/iomap'

This commit is contained in:
Paul Mundt 2010-06-02 16:32:12 +09:00
parent 4705b2e804 861160bfd0
commit 019e2574f9
15 changed files with 99 additions and 75 deletions
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5
arch/sh/Kconfig
View File

@ -9,7 +9,7 @@ config SUPERH
def_bool y
select EMBEDDED
select HAVE_CLK
select HAVE_IDE
select HAVE_IDE if HAS_IOPORT
select HAVE_LMB
select HAVE_OPROFILE
select HAVE_GENERIC_DMA_COHERENT
@ -174,6 +174,9 @@ config ARCH_HAS_DEFAULT_IDLE
config ARCH_HAS_CPU_IDLE_WAIT
def_bool y
config NO_IOPORT
bool
config IO_TRAPPED
bool

3
arch/sh/boards/Kconfig
View File

@ -154,6 +154,7 @@ config SH_SDK7786
bool "SDK7786"
depends on CPU_SUBTYPE_SH7786
select SYS_SUPPORTS_PCI
select NO_IOPORT if !PCI
help
Select SDK7786 if configuring for a Renesas Technology Europe
SH7786-65nm board.
@ -190,6 +191,7 @@ config SH_URQUELL
depends on CPU_SUBTYPE_SH7786
select ARCH_REQUIRE_GPIOLIB
select SYS_SUPPORTS_PCI
select NO_IOPORT if !PCI
config SH_MIGOR
bool "Migo-R"
@ -286,6 +288,7 @@ config SH_LBOX_RE2
config SH_X3PROTO
bool "SH-X3 Prototype board"
depends on CPU_SUBTYPE_SHX3
select NO_IOPORT if !PCI
config SH_MAGIC_PANEL_R2
bool "Magic Panel R2"

8
arch/sh/include/asm/io.h
View File

@ -39,6 +39,8 @@
#include <asm/io_generic.h>
#include <asm/io_trapped.h>
#ifdef CONFIG_HAS_IOPORT
#define inb(p) sh_mv.mv_inb((p))
#define inw(p) sh_mv.mv_inw((p))
#define inl(p) sh_mv.mv_inl((p))
@ -60,6 +62,8 @@
#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
#endif
#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
@ -240,6 +244,8 @@ __BUILD_MEMORY_STRING(q, u64)
#define IO_SPACE_LIMIT 0xffffffff
#ifdef CONFIG_HAS_IOPORT
/*
* This function provides a method for the generic case where a
* board-specific ioport_map simply needs to return the port + some
@ -255,6 +261,8 @@ static inline void __set_io_port_base(unsigned long pbase)
#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
#endif
/* We really want to try and get these to memcpy etc */
void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
void memcpy_toio(volatile void __iomem *, const void *, unsigned long);

9
arch/sh/include/asm/machvec.h
View File

@ -19,6 +19,10 @@ struct sh_machine_vector {
const char *mv_name;
int mv_nr_irqs;
int (*mv_irq_demux)(int irq);
void (*mv_init_irq)(void);
#ifdef CONFIG_HAS_IOPORT
u8 (*mv_inb)(unsigned long);
u16 (*mv_inw)(unsigned long);
u32 (*mv_inl)(unsigned long);
@ -40,12 +44,9 @@ struct sh_machine_vector {
void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
int (*mv_irq_demux)(int irq);
void (*mv_init_irq)(void);
void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
void (*mv_ioport_unmap)(void __iomem *);
#endif
int (*mv_clk_init)(void);
int (*mv_mode_pins)(void);

3
arch/sh/kernel/Makefile
View File

@ -12,7 +12,7 @@ endif
CFLAGS_REMOVE_return_address.o = -pg
obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
idle.o io.o io_generic.o irq.o \
idle.o io.o irq.o \
irq_$(BITS).o machvec.o nmi_debug.o process.o \
process_$(BITS).o ptrace_$(BITS).o \
reboot.o return_address.o \
@ -39,6 +39,7 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o
obj-$(CONFIG_HIBERNATION) += swsusp.o
obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
obj-$(CONFIG_HAS_IOPORT) += io_generic.o
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o

22
arch/sh/kernel/io.c
View File

@ -112,25 +112,3 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count)
}
}
EXPORT_SYMBOL(memset_io);
#ifndef CONFIG_GENERIC_IOMAP
void __iomem *ioport_map(unsigned long port, unsigned int nr)
{
void __iomem *ret;
ret = __ioport_map_trapped(port, nr);
if (ret)
return ret;
return __ioport_map(port, nr);
}
EXPORT_SYMBOL(ioport_map);
void ioport_unmap(void __iomem *addr)
{
sh_mv.mv_ioport_unmap(addr);
}
EXPORT_SYMBOL(ioport_unmap);
#endif /* CONFIG_GENERIC_IOMAP */

20
arch/sh/kernel/io_generic.c
View File

@ -158,3 +158,23 @@ void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
void generic_ioport_unmap(void __iomem *addr)
{
}
#ifndef CONFIG_GENERIC_IOMAP
void __iomem *ioport_map(unsigned long port, unsigned int nr)
{
void __iomem *ret;
ret = __ioport_map_trapped(port, nr);
if (ret)
return ret;
return __ioport_map(port, nr);
}
EXPORT_SYMBOL(ioport_map);
void ioport_unmap(void __iomem *addr)
{
sh_mv.mv_ioport_unmap(addr);
}
EXPORT_SYMBOL(ioport_unmap);
#endif /* CONFIG_GENERIC_IOMAP */

4
arch/sh/kernel/io_trapped.c
View File

@ -91,10 +91,14 @@ int register_trapped_io(struct trapped_io *tiop)
tiop->magic = IO_TRAPPED_MAGIC;
INIT_LIST_HEAD(&tiop->list);
spin_lock_irq(&trapped_lock);
#ifdef CONFIG_HAS_IOPORT
if (flags & IORESOURCE_IO)
list_add(&tiop->list, &trapped_io);
#endif
#ifdef CONFIG_HAS_IOMEM
if (flags & IORESOURCE_MEM)
list_add(&tiop->list, &trapped_mem);
#endif
spin_unlock_irq(&trapped_lock);
return 0;

17
arch/sh/kernel/machvec.c
View File

@ -118,6 +118,14 @@ void __init sh_mv_setup(void)
sh_mv.mv_##elem = generic_##elem; \
} while (0)
#ifdef CONFIG_HAS_IOPORT
#ifdef P2SEG
__set_io_port_base(P2SEG);
#else
__set_io_port_base(0);
#endif
mv_set(inb); mv_set(inw); mv_set(inl);
mv_set(outb); mv_set(outw); mv_set(outl);
@ -129,16 +137,13 @@ void __init sh_mv_setup(void)
mv_set(ioport_map);
mv_set(ioport_unmap);
#endif
mv_set(irq_demux);
mv_set(mode_pins);
mv_set(mem_init);
if (!sh_mv.mv_nr_irqs)
sh_mv.mv_nr_irqs = NR_IRQS;
#ifdef P2SEG
__set_io_port_base(P2SEG);
#else
__set_io_port_base(0);
#endif
}

3
drivers/input/serio/Kconfig
View File

@ -21,7 +21,8 @@ if SERIO
config SERIO_I8042
tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86
default y
depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && !M68K && !BLACKFIN
depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \
(!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN
help
i8042 is the chip over which the standard AT keyboard and PS/2
mouse are connected to the computer. If you use these devices,

22
drivers/usb/gadget/m66592-udc.h
View File

@ -537,35 +537,35 @@ struct m66592 {
/*-------------------------------------------------------------------------*/
static inline u16 m66592_read(struct m66592 *m66592, unsigned long offset)
{
return inw((unsigned long)m66592->reg + offset);
return ioread16(m66592->reg + offset);
}
static inline void m66592_read_fifo(struct m66592 *m66592,
unsigned long offset,
void *buf, unsigned long len)
{
unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
void __iomem *fifoaddr = m66592->reg + offset;
if (m66592->pdata->on_chip) {
len = (len + 3) / 4;
insl(fifoaddr, buf, len);
ioread32_rep(fifoaddr, buf, len);
} else {
len = (len + 1) / 2;
insw(fifoaddr, buf, len);
ioread16_rep(fifoaddr, buf, len);
}
}
static inline void m66592_write(struct m66592 *m66592, u16 val,
unsigned long offset)
{
outw(val, (unsigned long)m66592->reg + offset);
iowrite16(val, m66592->reg + offset);
}
static inline void m66592_write_fifo(struct m66592 *m66592,
unsigned long offset,
void *buf, unsigned long len)
{
unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
void __iomem *fifoaddr = m66592->reg + offset;
if (m66592->pdata->on_chip) {
unsigned long count;
@ -573,25 +573,25 @@ static inline void m66592_write_fifo(struct m66592 *m66592,
int i;
count = len / 4;
outsl(fifoaddr, buf, count);
iowrite32_rep(fifoaddr, buf, count);
if (len & 0x00000003) {
pb = buf + count * 4;
for (i = 0; i < (len & 0x00000003); i++) {
if (m66592_read(m66592, M66592_CFBCFG)) /* le */
outb(pb[i], fifoaddr + (3 - i));
iowrite8(pb[i], fifoaddr + (3 - i));
else
outb(pb[i], fifoaddr + i);
iowrite8(pb[i], fifoaddr + i);
}
}
} else {
unsigned long odd = len & 0x0001;
len = len / 2;
outsw(fifoaddr, buf, len);
iowrite16_rep(fifoaddr, buf, len);
if (odd) {
unsigned char *p = buf + len*2;
outb(*p, fifoaddr);
iowrite8(*p, fifoaddr);
}
}
}

4
drivers/usb/gadget/r8a66597-udc.c
View File

@ -1500,7 +1500,7 @@ static int __exit r8a66597_remove(struct platform_device *pdev)
struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
del_timer_sync(&r8a66597->timer);
iounmap((void *)r8a66597->reg);
iounmap(r8a66597->reg);
free_irq(platform_get_irq(pdev, 0), r8a66597);
r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
#ifdef CONFIG_HAVE_CLK
@ -1578,7 +1578,7 @@ static int __init r8a66597_probe(struct platform_device *pdev)
init_timer(&r8a66597->timer);
r8a66597->timer.function = r8a66597_timer;
r8a66597->timer.data = (unsigned long)r8a66597;
r8a66597->reg = (unsigned long)reg;
r8a66597->reg = reg;
#ifdef CONFIG_HAVE_CLK
if (r8a66597->pdata->on_chip) {

24
drivers/usb/gadget/r8a66597-udc.h
View File

@ -91,7 +91,7 @@ struct r8a66597_ep {
struct r8a66597 {
spinlock_t lock;
unsigned long reg;
void __iomem *reg;
#ifdef CONFIG_HAVE_CLK
struct clk *clk;
@ -127,7 +127,7 @@ struct r8a66597 {
static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
{
return inw(r8a66597->reg + offset);
return ioread16(r8a66597->reg + offset);
}
static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
@ -135,7 +135,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
unsigned char *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
void __iomem *fifoaddr = r8a66597->reg + offset;
unsigned int data;
int i;
@ -144,7 +144,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
/* aligned buf case */
if (len >= 4 && !((unsigned long)buf & 0x03)) {
insl(fifoaddr, buf, len / 4);
ioread32_rep(fifoaddr, buf, len / 4);
buf += len & ~0x03;
len &= 0x03;
}
@ -152,7 +152,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
/* unaligned buf case */
for (i = 0; i < len; i++) {
if (!(i & 0x03))
data = inl(fifoaddr);
data = ioread32(fifoaddr);
buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
}
@ -161,7 +161,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
/* aligned buf case */
if (len >= 2 && !((unsigned long)buf & 0x01)) {
insw(fifoaddr, buf, len / 2);
ioread16_rep(fifoaddr, buf, len / 2);
buf += len & ~0x01;
len &= 0x01;
}
@ -169,7 +169,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
/* unaligned buf case */
for (i = 0; i < len; i++) {
if (!(i & 0x01))
data = inw(fifoaddr);
data = ioread16(fifoaddr);
buf[i] = (data >> ((i & 0x01) * 8)) & 0xff;
}
@ -179,7 +179,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
unsigned long offset)
{
outw(val, r8a66597->reg + offset);
iowrite16(val, r8a66597->reg + offset);
}
static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
@ -187,21 +187,21 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
unsigned char *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
void __iomem *fifoaddr = r8a66597->reg + offset;
int adj = 0;
int i;
if (r8a66597->pdata->on_chip) {
/* 32-bit access only if buf is 32-bit aligned */
if (len >= 4 && !((unsigned long)buf & 0x03)) {
outsl(fifoaddr, buf, len / 4);
iowrite32_rep(fifoaddr, buf, len / 4);
buf += len & ~0x03;
len &= 0x03;
}
} else {
/* 16-bit access only if buf is 16-bit aligned */
if (len >= 2 && !((unsigned long)buf & 0x01)) {
outsw(fifoaddr, buf, len / 2);
iowrite16_rep(fifoaddr, buf, len / 2);
buf += len & ~0x01;
len &= 0x01;
}
@ -216,7 +216,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
}
for (i = 0; i < len; i++)
outb(buf[i], fifoaddr + adj - (i & adj));
iowrite8(buf[i], fifoaddr + adj - (i & adj));
}
static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,

4
drivers/usb/host/r8a66597-hcd.c
View File

@ -2404,7 +2404,7 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
del_timer_sync(&r8a66597->rh_timer);
usb_remove_hcd(hcd);
iounmap((void *)r8a66597->reg);
iounmap(r8a66597->reg);
#ifdef CONFIG_HAVE_CLK
if (r8a66597->pdata->on_chip)
clk_put(r8a66597->clk);
@ -2496,7 +2496,7 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
init_timer(&r8a66597->rh_timer);
r8a66597->rh_timer.function = r8a66597_timer;
r8a66597->rh_timer.data = (unsigned long)r8a66597;
r8a66597->reg = (unsigned long)reg;
r8a66597->reg = reg;
/* make sure no interrupts are pending */
ret = r8a66597_clock_enable(r8a66597);

26
drivers/usb/host/r8a66597.h
View File

@ -112,7 +112,7 @@ struct r8a66597_root_hub {
struct r8a66597 {
spinlock_t lock;
unsigned long reg;
void __iomem *reg;
#ifdef CONFIG_HAVE_CLK
struct clk *clk;
#endif
@ -170,67 +170,67 @@ static inline struct urb *r8a66597_get_urb(struct r8a66597 *r8a66597,
static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
{
return inw(r8a66597->reg + offset);
return ioread16(r8a66597->reg + offset);
}
static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
unsigned long offset, u16 *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
void __iomem *fifoaddr = r8a66597->reg + offset;
unsigned long count;
if (r8a66597->pdata->on_chip) {
count = len / 4;
insl(fifoaddr, buf, count);
ioread32_rep(fifoaddr, buf, count);
if (len & 0x00000003) {
unsigned long tmp = inl(fifoaddr);
unsigned long tmp = ioread32(fifoaddr);
memcpy((unsigned char *)buf + count * 4, &tmp,
len & 0x03);
}
} else {
len = (len + 1) / 2;
insw(fifoaddr, buf, len);
ioread16_rep(fifoaddr, buf, len);
}
}
static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
unsigned long offset)
{
outw(val, r8a66597->reg + offset);
iowrite16(val, r8a66597->reg + offset);
}
static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
unsigned long offset, u16 *buf,
int len)
{
unsigned long fifoaddr = r8a66597->reg + offset;
void __iomem *fifoaddr = r8a66597->reg + offset;
unsigned long count;
unsigned char *pb;
int i;
if (r8a66597->pdata->on_chip) {
count = len / 4;
outsl(fifoaddr, buf, count);
iowrite32_rep(fifoaddr, buf, count);
if (len & 0x00000003) {
pb = (unsigned char *)buf + count * 4;
for (i = 0; i < (len & 0x00000003); i++) {
if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
outb(pb[i], fifoaddr + i);
iowrite8(pb[i], fifoaddr + i);
else
outb(pb[i], fifoaddr + 3 - i);
iowrite8(pb[i], fifoaddr + 3 - i);
}
}
} else {
int odd = len & 0x0001;
len = len / 2;
outsw(fifoaddr, buf, len);
ioread16_rep(fifoaddr, buf, len);
if (unlikely(odd)) {
buf = &buf[len];
outb((unsigned char)*buf, fifoaddr);
iowrite8((unsigned char)*buf, fifoaddr);
}
}
}