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coresight: etm4x: Use asm-generic IO memory barriers 

Per discussion in [1], it was decided to move to using architecture
independent/asm-generic IO memory barriers to have just one set of
them and deprecate use of arm64 specific IO memory barriers in driver
code. So replace current usage of __io_rmb()/__iowmb() in drivers to
__io_ar()/__io_bw().

[1] https://lore.kernel.org/lkml/CAK8P3a0L2tLeF1Q0+0ijUxhGNaw+Z0fyPC1oW6_ELQfn0=i4iw@mail.gmail.com/

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Sai Prakash Ranjan 2022-05-18 22:14:11 +05:30 committed by Arnd Bergmann
parent 548927e031
commit 018b741ea2
2 changed files with 8 additions and 8 deletions
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8
drivers/hwtracing/coresight/coresight-etm4x-core.c
View File

@ -98,7 +98,7 @@ u64 etm4x_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
} }
if (!_relaxed) if (!_relaxed)
__iormb(res); /* Imitate the !relaxed I/O helpers */ __io_ar(res); /* Imitate the !relaxed I/O helpers */
return res; return res;
} }
@ -106,7 +106,7 @@ u64 etm4x_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit) void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
{ {
if (!_relaxed) if (!_relaxed)
__iowmb(); /* Imitate the !relaxed I/O helpers */ __io_bw(); /* Imitate the !relaxed I/O helpers */
if (!_64bit) if (!_64bit)
val &= GENMASK(31, 0); val &= GENMASK(31, 0);
@ -130,7 +130,7 @@ static u64 ete_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
} }
if (!_relaxed) if (!_relaxed)
__iormb(res); /* Imitate the !relaxed I/O helpers */ __io_ar(res); /* Imitate the !relaxed I/O helpers */
return res; return res;
} }
@ -138,7 +138,7 @@ static u64 ete_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
static void ete_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit) static void ete_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
{ {
if (!_relaxed) if (!_relaxed)
__iowmb(); /* Imitate the !relaxed I/O helpers */ __io_bw(); /* Imitate the !relaxed I/O helpers */
if (!_64bit) if (!_64bit)
val &= GENMASK(31, 0); val &= GENMASK(31, 0);

8
drivers/hwtracing/coresight/coresight-etm4x.h
View File

@ -546,14 +546,14 @@
#define etm4x_read32(csa, offset) \ #define etm4x_read32(csa, offset) \
({ \ ({ \
u32 __val = etm4x_relaxed_read32((csa), (offset)); \ u32 __val = etm4x_relaxed_read32((csa), (offset)); \
__iormb(__val); \ __io_ar(__val); \
__val; \ __val; \
}) })
#define etm4x_read64(csa, offset) \ #define etm4x_read64(csa, offset) \
({ \ ({ \
u64 __val = etm4x_relaxed_read64((csa), (offset)); \ u64 __val = etm4x_relaxed_read64((csa), (offset)); \
__iormb(__val); \ __io_ar(__val); \
__val; \ __val; \
}) })
@ -577,13 +577,13 @@
#define etm4x_write32(csa, val, offset) \ #define etm4x_write32(csa, val, offset) \
do { \ do { \
__iowmb(); \ __io_bw(); \
etm4x_relaxed_write32((csa), (val), (offset)); \ etm4x_relaxed_write32((csa), (val), (offset)); \
} while (0) } while (0)
#define etm4x_write64(csa, val, offset) \ #define etm4x_write64(csa, val, offset) \
do { \ do { \
__iowmb(); \ __io_bw(); \
etm4x_relaxed_write64((csa), (val), (offset)); \ etm4x_relaxed_write64((csa), (val), (offset)); \
} while (0) } while (0)