drm/radeon: parse the uvd clock voltage deps table
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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57ff476171
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018042b15b
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@ -1030,6 +1030,42 @@ int r600_parse_extended_power_table(struct radeon_device *rdev)
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le16_to_cpu(limits->entries[i].usVoltage);
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}
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}
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if ((le16_to_cpu(ext_hdr->usSize) >= SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3) &&
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ext_hdr->usUVDTableOffset) {
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UVDClockInfoArray *array = (UVDClockInfoArray *)
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(mode_info->atom_context->bios + data_offset +
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le16_to_cpu(ext_hdr->usUVDTableOffset) + 1);
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ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits =
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(ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *)
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(mode_info->atom_context->bios + data_offset +
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le16_to_cpu(ext_hdr->usUVDTableOffset) + 1 +
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1 + (array->ucNumEntries * sizeof (UVDClockInfo)));
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u32 size = limits->numEntries *
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sizeof(struct radeon_uvd_clock_voltage_dependency_entry);
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rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =
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kzalloc(size, GFP_KERNEL);
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if (!rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {
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kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
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kfree(rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk.entries);
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kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk.entries);
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kfree(rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries);
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kfree(rdev->pm.dpm.dyn_state.cac_leakage_table.entries);
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kfree(rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries);
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return -ENOMEM;
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}
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rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =
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limits->numEntries;
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for (i = 0; i < limits->numEntries; i++) {
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UVDClockInfo *uvd_clk =
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&array->entries[limits->entries[i].ucUVDClockInfoIndex];
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rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =
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le16_to_cpu(uvd_clk->usVClkLow) | (uvd_clk->ucVClkHigh << 16);
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rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =
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le16_to_cpu(uvd_clk->usDClkLow) | (uvd_clk->ucDClkHigh << 16);
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rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =
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le16_to_cpu(limits->entries[i].usVoltage);
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}
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}
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if ((le16_to_cpu(ext_hdr->usSize) >= SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V5) &&
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ext_hdr->usPPMTableOffset) {
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ATOM_PPLIB_PPM_Table *ppm = (ATOM_PPLIB_PPM_Table *)
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@ -1044,6 +1080,7 @@ int r600_parse_extended_power_table(struct radeon_device *rdev)
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kfree(rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk.entries);
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kfree(rdev->pm.dpm.dyn_state.cac_leakage_table.entries);
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kfree(rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries);
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kfree(rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries);
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return -ENOMEM;
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}
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rdev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;
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@ -1081,6 +1118,7 @@ int r600_parse_extended_power_table(struct radeon_device *rdev)
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kfree(rdev->pm.dpm.dyn_state.cac_leakage_table.entries);
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kfree(rdev->pm.dpm.dyn_state.ppm_table);
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kfree(rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries);
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kfree(rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries);
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return -ENOMEM;
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}
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if (rev > 0) {
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@ -1135,6 +1173,8 @@ void r600_free_extended_power_table(struct radeon_device *rdev)
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kfree(rdev->pm.dpm.dyn_state.cac_tdp_table);
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if (rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries)
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kfree(rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries);
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if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries)
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kfree(rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries);
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}
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enum radeon_pcie_gen r600_get_pcie_gen_support(struct radeon_device *rdev,
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