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[RADEON]: Fix unaligned I/O port access during probe. 

The driver does a readl() on DEVICE_ID which is 2-byte aligned and
2-bytes in size.  It's doing this read just to flush write buffers.

Create IN16() and OUT16() macros, and use the former to do this I/O
load.

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2005-09-29 19:26:51 -07:00
parent 717463d806
commit 017fb98e70
2 changed files with 3 additions and 1 deletions
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2
drivers/video/aty/radeon_base.c
View File

@ -475,7 +475,7 @@ static int __devinit radeon_probe_pll_params(struct radeonfb_info *rinfo)
*/ */
/* Flush PCI buffers ? */ /* Flush PCI buffers ? */
tmp = INREG(DEVICE_ID); tmp = INREG16(DEVICE_ID);
local_irq_disable(); local_irq_disable();

2
drivers/video/aty/radeonfb.h
View File

@ -395,6 +395,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms)
#define INREG8(addr) readb((rinfo->mmio_base)+addr) #define INREG8(addr) readb((rinfo->mmio_base)+addr)
#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
#define INREG16(addr) readw((rinfo->mmio_base)+addr)
#define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
#define INREG(addr) readl((rinfo->mmio_base)+addr) #define INREG(addr) readl((rinfo->mmio_base)+addr)
#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)