dma: ipu_idmac driver cosmetic clean-up
Remove superfluous semicolons, update comments. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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257b17ca03
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@ -107,7 +107,7 @@ static uint32_t bytes_per_pixel(enum pixel_fmt fmt)
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}
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}
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/* Enable / disable direct write to memory by the Camera Sensor Interface */
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/* Enable direct write to memory by the Camera Sensor Interface */
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static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
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{
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uint32_t ic_conf, mask;
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@ -126,6 +126,7 @@ static void ipu_ic_enable_task(struct ipu *ipu, enum ipu_channel channel)
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idmac_write_icreg(ipu, ic_conf, IC_CONF);
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}
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/* Called under spin_lock_irqsave(&ipu_data.lock) */
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static void ipu_ic_disable_task(struct ipu *ipu, enum ipu_channel channel)
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{
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uint32_t ic_conf, mask;
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@ -422,7 +423,7 @@ static void ipu_ch_param_set_size(union chan_param_mem *params,
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break;
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default:
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dev_err(ipu_data.dev,
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"mxc ipu: unimplemented pixel format %d\n", pixel_fmt);
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"mx3 ipu: unimplemented pixel format %d\n", pixel_fmt);
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break;
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}
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@ -433,20 +434,20 @@ static void ipu_ch_param_set_burst_size(union chan_param_mem *params,
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uint16_t burst_pixels)
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{
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params->pp.npb = burst_pixels - 1;
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};
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}
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static void ipu_ch_param_set_buffer(union chan_param_mem *params,
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dma_addr_t buf0, dma_addr_t buf1)
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{
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params->pp.eba0 = buf0;
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params->pp.eba1 = buf1;
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};
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}
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static void ipu_ch_param_set_rotation(union chan_param_mem *params,
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enum ipu_rotate_mode rotate)
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{
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params->pp.bam = rotate;
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};
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}
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static void ipu_write_param_mem(uint32_t addr, uint32_t *data,
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uint32_t num_words)
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@ -571,7 +572,7 @@ static uint32_t dma_param_addr(uint32_t dma_ch)
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{
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/* Channel Parameter Memory */
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return 0x10000 | (dma_ch << 4);
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};
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}
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static void ipu_channel_set_priority(struct ipu *ipu, enum ipu_channel channel,
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bool prio)
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@ -611,7 +612,8 @@ static uint32_t ipu_channel_conf_mask(enum ipu_channel channel)
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/**
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* ipu_enable_channel() - enable an IPU channel.
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* @channel: channel ID.
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* @idmac: IPU DMAC context.
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* @ichan: IDMAC channel.
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* @return: 0 on success or negative error code on failure.
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*/
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static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
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@ -649,7 +651,7 @@ static int ipu_enable_channel(struct idmac *idmac, struct idmac_channel *ichan)
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/**
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* ipu_init_channel_buffer() - initialize a buffer for logical IPU channel.
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* @channel: channel ID.
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* @ichan: IDMAC channel.
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* @pixel_fmt: pixel format of buffer. Pixel format is a FOURCC ASCII code.
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* @width: width of buffer in pixels.
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* @height: height of buffer in pixels.
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@ -687,7 +689,7 @@ static int ipu_init_channel_buffer(struct idmac_channel *ichan,
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}
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/* IC channel's stride must be a multiple of 8 pixels */
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if ((channel <= 13) && (stride % 8)) {
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if ((channel <= IDMAC_IC_13) && (stride % 8)) {
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dev_err(ipu->dev, "Stride must be 8 pixel multiple\n");
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return -EINVAL;
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}
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@ -752,7 +754,7 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
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/**
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* ipu_update_channel_buffer() - update physical address of a channel buffer.
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* @channel: channel ID.
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* @ichan: IDMAC channel.
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* @buffer_n: buffer number to update.
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* 0 or 1 are the only valid values.
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* @phyaddr: buffer physical address.
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@ -1341,13 +1343,7 @@ static void ipu_gc_tasklet(unsigned long arg)
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}
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}
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/*
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* At the time .device_alloc_chan_resources() method is called, we cannot know,
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* whether the client will accept the channel. Thus we must only check, if we
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* can satisfy client's request but the only real criterion to verify, whether
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* the client has accepted our offer is the client_count. That's why we have to
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* perform the rest of our allocation tasks on the first call to this function.
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*/
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/* Allocate and initialise a transfer descriptor. */
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static struct dma_async_tx_descriptor *idmac_prep_slave_sg(struct dma_chan *chan,
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struct scatterlist *sgl, unsigned int sg_len,
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enum dma_data_direction direction, unsigned long tx_flags)
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@ -1432,8 +1428,7 @@ static void __idmac_terminate_all(struct dma_chan *chan)
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struct idmac_tx_desc *desc = ichan->desc + i;
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if (list_empty(&desc->list))
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/* Descriptor was prepared, but not submitted */
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list_add(&desc->list,
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&ichan->free_list);
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list_add(&desc->list, &ichan->free_list);
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async_tx_clear_ack(&desc->txd);
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}
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