staging: comedi: s626: move encoder functions part 1
Move some functions to help avoid the forward declaration of `s626_enc_chan_info[]`. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
3a305a66bb
commit
010be96fb6
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@ -651,6 +651,148 @@ static void preload(struct comedi_device *dev, const struct s626_enc_info *k,
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debi_write(dev, k->my_latch_lsw + 2, value >> 16);
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}
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/* ****** PRIVATE COUNTER FUNCTIONS ****** */
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/*
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* Reset a counter's index and overflow event capture flags.
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*/
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static void reset_cap_flags_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
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}
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static void reset_cap_flags_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B);
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}
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/*
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* Return counter setup in a format (COUNTER_SETUP) that is consistent
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* for both A and B counters.
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*/
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static uint16_t get_mode_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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uint16_t crb;
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uint16_t setup;
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/* Fetch CRA and CRB register images. */
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cra = debi_read(dev, k->my_cra);
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crb = debi_read(dev, k->my_crb);
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/*
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* Populate the standardized counter setup bit fields.
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* Note: IndexSrc is restricted to ENC_X or IndxPol.
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*/
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setup = (cra & STDMSK_LOADSRC) | /* LoadSrc = LoadSrcA. */
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((crb << (STDBIT_LATCHSRC - CRBBIT_LATCHSRC)) &
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STDMSK_LATCHSRC) | /* LatchSrc = LatchSrcA. */
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((cra << (STDBIT_INTSRC - CRABIT_INTSRC_A)) &
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STDMSK_INTSRC) | /* IntSrc = IntSrcA. */
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((cra << (STDBIT_INDXSRC - (CRABIT_INDXSRC_A + 1))) &
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STDMSK_INDXSRC) | /* IndxSrc = IndxSrcA<1>. */
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((cra >> (CRABIT_INDXPOL_A - STDBIT_INDXPOL)) &
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STDMSK_INDXPOL) | /* IndxPol = IndxPolA. */
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((crb >> (CRBBIT_CLKENAB_A - STDBIT_CLKENAB)) &
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STDMSK_CLKENAB); /* ClkEnab = ClkEnabA. */
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/* Adjust mode-dependent parameters. */
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if (cra & (2 << CRABIT_CLKSRC_A)) {
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/* Timer mode (ClkSrcA<1> == 1): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_TIMER << STDBIT_CLKSRC;
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/* Set ClkPol to indicate count direction (ClkSrcA<0>). */
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setup |= (cra << (STDBIT_CLKPOL - CRABIT_CLKSRC_A)) &
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STDMSK_CLKPOL;
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/* ClkMult must be 1x in Timer mode. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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} else {
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/* Counter mode (ClkSrcA<1> == 0): */
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/* Indicate Counter mode. */
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setup |= CLKSRC_COUNTER << STDBIT_CLKSRC;
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/* Pass through ClkPol. */
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setup |= (cra >> (CRABIT_CLKPOL_A - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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/* Force ClkMult to 1x if not legal, else pass through. */
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if ((cra & CRAMSK_CLKMULT_A) == (MULT_X0 << CRABIT_CLKMULT_A))
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setup |= MULT_X1 << STDBIT_CLKMULT;
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else
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setup |= (cra >> (CRABIT_CLKMULT_A - STDBIT_CLKMULT)) &
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STDMSK_CLKMULT;
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}
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/* Return adjusted counter setup. */
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return setup;
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}
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static uint16_t get_mode_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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uint16_t crb;
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uint16_t setup;
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/* Fetch CRA and CRB register images. */
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cra = debi_read(dev, k->my_cra);
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crb = debi_read(dev, k->my_crb);
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/*
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* Populate the standardized counter setup bit fields.
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* Note: IndexSrc is restricted to ENC_X or IndxPol.
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*/
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setup = ((crb << (STDBIT_INTSRC - CRBBIT_INTSRC_B)) &
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STDMSK_INTSRC) | /* IntSrc = IntSrcB. */
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((crb << (STDBIT_LATCHSRC - CRBBIT_LATCHSRC)) &
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STDMSK_LATCHSRC) | /* LatchSrc = LatchSrcB. */
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((crb << (STDBIT_LOADSRC - CRBBIT_LOADSRC_B)) &
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STDMSK_LOADSRC) | /* LoadSrc = LoadSrcB. */
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((crb << (STDBIT_INDXPOL - CRBBIT_INDXPOL_B)) &
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STDMSK_INDXPOL) | /* IndxPol = IndxPolB. */
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((crb >> (CRBBIT_CLKENAB_B - STDBIT_CLKENAB)) &
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STDMSK_CLKENAB) | /* ClkEnab = ClkEnabB. */
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((cra >> ((CRABIT_INDXSRC_B + 1) - STDBIT_INDXSRC)) &
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STDMSK_INDXSRC); /* IndxSrc = IndxSrcB<1>. */
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/* Adjust mode-dependent parameters. */
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if ((crb & CRBMSK_CLKMULT_B) == (MULT_X0 << CRBBIT_CLKMULT_B)) {
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/* Extender mode (ClkMultB == MULT_X0): */
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/* Indicate Extender mode. */
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setup |= CLKSRC_EXTENDER << STDBIT_CLKSRC;
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/* Indicate multiplier is 1x. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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/* Set ClkPol equal to Timer count direction (ClkSrcB<0>). */
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setup |= (cra >> (CRABIT_CLKSRC_B - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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} else if (cra & (2 << CRABIT_CLKSRC_B)) {
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/* Timer mode (ClkSrcB<1> == 1): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_TIMER << STDBIT_CLKSRC;
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/* Indicate multiplier is 1x. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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/* Set ClkPol equal to Timer count direction (ClkSrcB<0>). */
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setup |= (cra >> (CRABIT_CLKSRC_B - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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} else {
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/* If Counter mode (ClkSrcB<1> == 0): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_COUNTER << STDBIT_CLKSRC;
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/* Clock multiplier is passed through. */
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setup |= (crb >> (CRBBIT_CLKMULT_B - STDBIT_CLKMULT)) &
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STDMSK_CLKMULT;
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/* Clock polarity is passed through. */
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setup |= (crb << (STDBIT_CLKPOL - CRBBIT_CLKPOL_B)) &
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STDMSK_CLKPOL;
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}
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/* Return adjusted counter setup. */
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return setup;
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}
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static unsigned int s626_ai_reg_to_uint(int data)
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{
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unsigned int tempdata;
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@ -1822,148 +1964,6 @@ static void close_dma_b(struct comedi_device *dev, struct buffer_dma *pdma,
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}
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}
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/* ****** PRIVATE COUNTER FUNCTIONS ****** */
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/*
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* Reset a counter's index and overflow event capture flags.
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*/
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static void reset_cap_flags_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
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}
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static void reset_cap_flags_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL,
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CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B);
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}
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/*
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* Return counter setup in a format (COUNTER_SETUP) that is consistent
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* for both A and B counters.
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*/
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static uint16_t get_mode_a(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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uint16_t crb;
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uint16_t setup;
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/* Fetch CRA and CRB register images. */
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cra = debi_read(dev, k->my_cra);
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crb = debi_read(dev, k->my_crb);
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/*
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* Populate the standardized counter setup bit fields.
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* Note: IndexSrc is restricted to ENC_X or IndxPol.
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*/
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setup = (cra & STDMSK_LOADSRC) | /* LoadSrc = LoadSrcA. */
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((crb << (STDBIT_LATCHSRC - CRBBIT_LATCHSRC)) &
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STDMSK_LATCHSRC) | /* LatchSrc = LatchSrcA. */
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((cra << (STDBIT_INTSRC - CRABIT_INTSRC_A)) &
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STDMSK_INTSRC) | /* IntSrc = IntSrcA. */
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((cra << (STDBIT_INDXSRC - (CRABIT_INDXSRC_A + 1))) &
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STDMSK_INDXSRC) | /* IndxSrc = IndxSrcA<1>. */
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((cra >> (CRABIT_INDXPOL_A - STDBIT_INDXPOL)) &
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STDMSK_INDXPOL) | /* IndxPol = IndxPolA. */
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((crb >> (CRBBIT_CLKENAB_A - STDBIT_CLKENAB)) &
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STDMSK_CLKENAB); /* ClkEnab = ClkEnabA. */
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/* Adjust mode-dependent parameters. */
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if (cra & (2 << CRABIT_CLKSRC_A)) {
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/* Timer mode (ClkSrcA<1> == 1): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_TIMER << STDBIT_CLKSRC;
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/* Set ClkPol to indicate count direction (ClkSrcA<0>). */
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setup |= (cra << (STDBIT_CLKPOL - CRABIT_CLKSRC_A)) &
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STDMSK_CLKPOL;
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/* ClkMult must be 1x in Timer mode. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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} else {
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/* Counter mode (ClkSrcA<1> == 0): */
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/* Indicate Counter mode. */
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setup |= CLKSRC_COUNTER << STDBIT_CLKSRC;
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/* Pass through ClkPol. */
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setup |= (cra >> (CRABIT_CLKPOL_A - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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/* Force ClkMult to 1x if not legal, else pass through. */
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if ((cra & CRAMSK_CLKMULT_A) == (MULT_X0 << CRABIT_CLKMULT_A))
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setup |= MULT_X1 << STDBIT_CLKMULT;
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else
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setup |= (cra >> (CRABIT_CLKMULT_A - STDBIT_CLKMULT)) &
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STDMSK_CLKMULT;
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}
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/* Return adjusted counter setup. */
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return setup;
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}
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static uint16_t get_mode_b(struct comedi_device *dev,
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const struct s626_enc_info *k)
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{
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uint16_t cra;
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uint16_t crb;
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uint16_t setup;
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/* Fetch CRA and CRB register images. */
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cra = debi_read(dev, k->my_cra);
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crb = debi_read(dev, k->my_crb);
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/*
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* Populate the standardized counter setup bit fields.
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* Note: IndexSrc is restricted to ENC_X or IndxPol.
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*/
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setup = ((crb << (STDBIT_INTSRC - CRBBIT_INTSRC_B)) &
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STDMSK_INTSRC) | /* IntSrc = IntSrcB. */
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((crb << (STDBIT_LATCHSRC - CRBBIT_LATCHSRC)) &
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STDMSK_LATCHSRC) | /* LatchSrc = LatchSrcB. */
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((crb << (STDBIT_LOADSRC - CRBBIT_LOADSRC_B)) &
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STDMSK_LOADSRC) | /* LoadSrc = LoadSrcB. */
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((crb << (STDBIT_INDXPOL - CRBBIT_INDXPOL_B)) &
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STDMSK_INDXPOL) | /* IndxPol = IndxPolB. */
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((crb >> (CRBBIT_CLKENAB_B - STDBIT_CLKENAB)) &
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STDMSK_CLKENAB) | /* ClkEnab = ClkEnabB. */
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((cra >> ((CRABIT_INDXSRC_B + 1) - STDBIT_INDXSRC)) &
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STDMSK_INDXSRC); /* IndxSrc = IndxSrcB<1>. */
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/* Adjust mode-dependent parameters. */
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if ((crb & CRBMSK_CLKMULT_B) == (MULT_X0 << CRBBIT_CLKMULT_B)) {
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/* Extender mode (ClkMultB == MULT_X0): */
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/* Indicate Extender mode. */
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setup |= CLKSRC_EXTENDER << STDBIT_CLKSRC;
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/* Indicate multiplier is 1x. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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/* Set ClkPol equal to Timer count direction (ClkSrcB<0>). */
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setup |= (cra >> (CRABIT_CLKSRC_B - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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} else if (cra & (2 << CRABIT_CLKSRC_B)) {
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/* Timer mode (ClkSrcB<1> == 1): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_TIMER << STDBIT_CLKSRC;
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/* Indicate multiplier is 1x. */
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setup |= MULT_X1 << STDBIT_CLKMULT;
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/* Set ClkPol equal to Timer count direction (ClkSrcB<0>). */
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setup |= (cra >> (CRABIT_CLKSRC_B - STDBIT_CLKPOL)) &
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STDMSK_CLKPOL;
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} else {
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/* If Counter mode (ClkSrcB<1> == 0): */
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/* Indicate Timer mode. */
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setup |= CLKSRC_COUNTER << STDBIT_CLKSRC;
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/* Clock multiplier is passed through. */
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setup |= (crb >> (CRBBIT_CLKMULT_B - STDBIT_CLKMULT)) &
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STDMSK_CLKMULT;
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/* Clock polarity is passed through. */
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setup |= (crb << (STDBIT_CLKPOL - CRBBIT_CLKPOL_B)) &
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STDMSK_CLKPOL;
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}
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/* Return adjusted counter setup. */
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return setup;
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}
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/*
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* Set the operating mode for the specified counter. The setup
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* parameter is treated as a COUNTER_SETUP data type. The following
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