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omap_hsmmc: Flush posted write to IRQ 

Spurious IRQs seen on MMC after 2.6.29.  Flush posted write in IRQ
handler.

The interrupt line is released by clearing the error status bits
in the MMCHS_STAT register, which must occur before the interrupt
handler returns to avoid unwanted irqs.  Hence the need to flush
the posted write.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Acked-by: Tony Lindgen <tony@atomide.com>
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
This commit is contained in:
Kevin Hilman 2009-04-06 15:01:19 +03:00 committed by Pierre Ossman
parent 32710e8fd5
commit 00adadc121
1 changed files with 4 additions and 0 deletions
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4
drivers/mmc/host/omap_hsmmc.c
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@ -434,6 +434,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
if (host->mrq == NULL) {
OMAP_HSMMC_WRITE(host->base, STAT,
OMAP_HSMMC_READ(host->base, STAT));
/* Flush posted write */
OMAP_HSMMC_READ(host->base, STAT);
return IRQ_HANDLED;
}
@ -489,6 +491,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
}
OMAP_HSMMC_WRITE(host->base, STAT, status);
/* Flush posted write */
OMAP_HSMMC_READ(host->base, STAT);
if (end_cmd || (status & CC))
mmc_omap_cmd_done(host, host->cmd);