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irqchip/gic-v4.1: Eagerly vmap vPEs 

Now that we have HW-accelerated SGIs being delivered to VPEs, it
becomes required to map the VPEs on all ITSs instead of relying
on the lazy approach that we would use when using the ITS-list
mechanism.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20200304203330.4967-17-maz@kernel.org
This commit is contained in:
Marc Zyngier 2020-03-04 20:33:23 +00:00
parent d50676f5ce
commit 009384b380
1 changed files with 42 additions and 10 deletions
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52
drivers/irqchip/irq-gic-v3-its.c
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@ -189,6 +189,15 @@ static DEFINE_IDA(its_vpeid_ida);
#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
#define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K)
/*
* Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we
* always have vSGIs mapped.
*/
static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its)
{
return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]);
}
static u16 get_its_list(struct its_vm *vm)
{
struct its_node *its;
@ -198,7 +207,7 @@ static u16 get_its_list(struct its_vm *vm)
if (!is_v4(its))
continue;
if (vm->vlpi_count[its->list_nr])
if (require_its_list_vmovp(vm, its))
__set_bit(its->list_nr, &its_list);
}
@ -1295,7 +1304,7 @@ static void its_send_vmovp(struct its_vpe *vpe)
if (!is_v4(its))
continue;
if (!vpe->its_vm->vlpi_count[its->list_nr])
if (!require_its_list_vmovp(vpe->its_vm, its))
continue;
desc.its_vmovp_cmd.col = &its->collections[col_id];
@ -1586,12 +1595,31 @@ static int its_irq_set_irqchip_state(struct irq_data *d,
return 0;
}
/*
* Two favourable cases:
*
* (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times
* for vSGI delivery
*
* (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough
* and we're better off mapping all VPEs always
*
* If neither (a) nor (b) is true, then we map vPEs on demand.
*
*/
static bool gic_requires_eager_mapping(void)
{
if (!its_list_map || gic_rdists->has_rvpeid)
return true;
return false;
}
static void its_map_vm(struct its_node *its, struct its_vm *vm)
{
unsigned long flags;
/* Not using the ITS list? Everything is always mapped. */
if (!its_list_map)
if (gic_requires_eager_mapping())
return;
raw_spin_lock_irqsave(&vmovp_lock, flags);
@ -1625,7 +1653,7 @@ static void its_unmap_vm(struct its_node *its, struct its_vm *vm)
unsigned long flags;
/* Not using the ITS list? Everything is always mapped. */
if (!its_list_map)
if (gic_requires_eager_mapping())
return;
raw_spin_lock_irqsave(&vmovp_lock, flags);
@ -4282,8 +4310,12 @@ static int its_vpe_irq_domain_activate(struct irq_domain *domain,
struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
struct its_node *its;
/* If we use the list map, we issue VMAPP on demand... */
if (its_list_map)
/*
* If we use the list map, we issue VMAPP on demand... Unless
* we're on a GICv4.1 and we eagerly map the VPE on all ITSs
* so that VSGIs can work.
*/
if (!gic_requires_eager_mapping())
return 0;
/* Map the VPE to the first possible CPU */
@ -4309,10 +4341,10 @@ static void its_vpe_irq_domain_deactivate(struct irq_domain *domain,
struct its_node *its;
/*
* If we use the list map, we unmap the VPE once no VLPIs are
* associated with the VM.
* If we use the list map on GICv4.0, we unmap the VPE once no
* VLPIs are associated with the VM.
*/
if (its_list_map)
if (!gic_requires_eager_mapping())
return;
list_for_each_entry(its, &its_nodes, entry) {