mtd: spi-nor: add macros related to MICRON flash
Some MICRON related macros in spi-nor domain were ST. Rename entries related to STMicroelectronics under macro SNOR_MFR_ST. Added entry of MFR Id for Micron flashes, 0x002C. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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@ -284,6 +284,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info,
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u8 cmd;
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switch (JEDEC_MFR(info)) {
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case SNOR_MFR_ST:
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case SNOR_MFR_MICRON:
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/* Some Micron need WREN command; all will accept it */
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need_wren = true;
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@ -1391,7 +1392,7 @@ static const struct flash_info spi_nor_ids[] = {
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{ "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
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/* Micron */
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/* Micron <--> ST Micro */
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{ "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) },
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{ "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) },
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@ -3324,6 +3325,7 @@ static int spi_nor_init_params(struct spi_nor *nor,
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params->quad_enable = macronix_quad_enable;
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break;
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case SNOR_MFR_ST:
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case SNOR_MFR_MICRON:
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break;
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@ -3774,7 +3776,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
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mtd->_resume = spi_nor_resume;
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/* NOR protection support for STmicro/Micron chips and similar */
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if (JEDEC_MFR(info) == SNOR_MFR_MICRON ||
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if (JEDEC_MFR(info) == SNOR_MFR_ST ||
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JEDEC_MFR(info) == SNOR_MFR_MICRON ||
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info->flags & SPI_NOR_HAS_LOCK) {
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nor->flash_lock = stm_lock;
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nor->flash_unlock = stm_unlock;
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@ -377,6 +377,7 @@ struct cfi_fixup {
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#define CFI_MFR_SHARP 0x00B0
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#define CFI_MFR_SST 0x00BF
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#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
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#define CFI_MFR_MICRON 0x002C /* Micron */
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#define CFI_MFR_TOSHIBA 0x0098
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#define CFI_MFR_WINBOND 0x00DA
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@ -23,7 +23,8 @@
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#define SNOR_MFR_ATMEL CFI_MFR_ATMEL
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#define SNOR_MFR_GIGADEVICE 0xc8
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#define SNOR_MFR_INTEL CFI_MFR_INTEL
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#define SNOR_MFR_MICRON CFI_MFR_ST /* ST Micro <--> Micron */
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#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
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#define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
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#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
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#define SNOR_MFR_SPANSION CFI_MFR_AMD
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#define SNOR_MFR_SST CFI_MFR_SST
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