2012-05-02 15:06:22 +08:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#undef DEBUG
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2018-06-20 16:19:45 +08:00
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#include <linux/dma-noncoherent.h>
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2012-05-02 15:06:22 +08:00
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#include <linux/device.h>
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#include <linux/kernel.h>
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2018-05-17 18:07:13 +08:00
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#include <linux/platform_device.h>
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2012-05-02 15:06:22 +08:00
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/export.h>
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#include <asm/pgalloc.h>
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2012-06-26 19:02:54 +08:00
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#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
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2019-06-25 17:01:35 +08:00
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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cache_push(page_to_phys(page), size);
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}
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2019-08-26 15:03:44 +08:00
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pgprot_t pgprot_dmacoherent(pgprot_t prot)
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2012-05-02 15:06:22 +08:00
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{
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2019-06-25 17:01:34 +08:00
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if (CPU_IS_040_OR_060) {
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pgprot_val(prot) &= ~_PAGE_CACHE040;
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pgprot_val(prot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
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} else {
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pgprot_val(prot) |= _PAGE_NOCACHE030;
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2012-05-02 15:06:22 +08:00
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}
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2019-06-25 17:01:34 +08:00
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return prot;
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2012-05-02 15:06:22 +08:00
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}
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2011-03-22 11:39:27 +08:00
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#else
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2012-05-02 15:06:22 +08:00
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#include <asm/cacheflush.h>
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2018-06-20 16:19:45 +08:00
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs)
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2012-05-02 15:06:22 +08:00
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{
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void *ret;
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if (dev == NULL || (*dev->dma_mask < 0xffffffff))
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gfp |= GFP_DMA;
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ret = (void *)__get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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*dma_handle = virt_to_phys(ret);
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}
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return ret;
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}
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2018-06-20 16:19:45 +08:00
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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2016-08-04 04:46:00 +08:00
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dma_addr_t dma_handle, unsigned long attrs)
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2012-05-02 15:06:22 +08:00
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{
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free_pages((unsigned long)vaddr, get_order(size));
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}
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2012-06-26 19:02:54 +08:00
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#endif /* CONFIG_MMU && !CONFIG_COLDFIRE */
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2012-05-02 15:06:22 +08:00
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2019-11-08 01:03:11 +08:00
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void arch_sync_dma_for_device(phys_addr_t handle, size_t size,
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enum dma_data_direction dir)
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2012-05-02 15:06:22 +08:00
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{
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switch (dir) {
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2012-07-10 11:50:58 +08:00
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case DMA_BIDIRECTIONAL:
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2012-05-02 15:06:22 +08:00
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case DMA_TO_DEVICE:
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cache_push(handle, size);
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break;
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case DMA_FROM_DEVICE:
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cache_clear(handle, size);
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break;
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default:
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2016-12-07 02:57:37 +08:00
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pr_err_ratelimited("dma_sync_single_for_device: unsupported dir %u\n",
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dir);
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2012-05-02 15:06:22 +08:00
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break;
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}
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}
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