289 lines
9.7 KiB
C
289 lines
9.7 KiB
C
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/*
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*
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* Linux MegaRAID device driver
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*
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* Copyright (c) 2003-2004 LSI Logic Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* FILE : megaraid_mbox.h
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*/
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#ifndef _MEGARAID_H_
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#define _MEGARAID_H_
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#include "mega_common.h"
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#include "mbox_defs.h"
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#include "megaraid_ioctl.h"
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#define MEGARAID_VERSION "2.20.4.5"
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#define MEGARAID_EXT_VERSION "(Release Date: Thu Feb 03 12:27:22 EST 2005)"
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/*
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* Define some PCI values here until they are put in the kernel
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*/
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#define PCI_DEVICE_ID_PERC4_DI_DISCOVERY 0x000E
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#define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY 0x0123
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#define PCI_DEVICE_ID_PERC4_SC 0x1960
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#define PCI_SUBSYS_ID_PERC4_SC 0x0520
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#define PCI_DEVICE_ID_PERC4_DC 0x1960
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#define PCI_SUBSYS_ID_PERC4_DC 0x0518
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#define PCI_DEVICE_ID_PERC4_QC 0x0407
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#define PCI_SUBSYS_ID_PERC4_QC 0x0531
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#define PCI_DEVICE_ID_PERC4_DI_EVERGLADES 0x000F
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#define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES 0x014A
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#define PCI_DEVICE_ID_PERC4E_SI_BIGBEND 0x0013
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#define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND 0x016c
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#define PCI_DEVICE_ID_PERC4E_DI_KOBUK 0x0013
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#define PCI_SUBSYS_ID_PERC4E_DI_KOBUK 0x016d
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#define PCI_DEVICE_ID_PERC4E_DI_CORVETTE 0x0013
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#define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE 0x016e
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#define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION 0x0013
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#define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION 0x016f
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#define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE 0x0013
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#define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE 0x0170
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#define PCI_DEVICE_ID_PERC4E_DC_320_2E 0x0408
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#define PCI_SUBSYS_ID_PERC4E_DC_320_2E 0x0002
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#define PCI_DEVICE_ID_PERC4E_SC_320_1E 0x0408
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#define PCI_SUBSYS_ID_PERC4E_SC_320_1E 0x0001
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_0 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0 0xA520
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_1 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1 0x0520
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_2 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2 0x0518
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_0x 0x0407
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0x 0x0530
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_2x 0x0407
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2x 0x0532
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_4x 0x0407
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_4x 0x0531
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_1E 0x0408
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1E 0x0001
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#define PCI_DEVICE_ID_MEGARAID_SCSI_320_2E 0x0408
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#define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2E 0x0002
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#define PCI_DEVICE_ID_MEGARAID_I4_133_RAID 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID 0x0522
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#define PCI_DEVICE_ID_MEGARAID_SATA_150_4 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_SATA_150_4 0x4523
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#define PCI_DEVICE_ID_MEGARAID_SATA_150_6 0x1960
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#define PCI_SUBSYS_ID_MEGARAID_SATA_150_6 0x0523
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#define PCI_DEVICE_ID_MEGARAID_SATA_300_4x 0x0409
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#define PCI_SUBSYS_ID_MEGARAID_SATA_300_4x 0x3004
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#define PCI_DEVICE_ID_MEGARAID_SATA_300_8x 0x0409
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#define PCI_SUBSYS_ID_MEGARAID_SATA_300_8x 0x3008
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#define PCI_DEVICE_ID_INTEL_RAID_SRCU42X 0x0407
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCU42X 0x0532
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#define PCI_DEVICE_ID_INTEL_RAID_SRCS16 0x1960
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCS16 0x0523
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#define PCI_DEVICE_ID_INTEL_RAID_SRCU42E 0x0408
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCU42E 0x0002
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#define PCI_DEVICE_ID_INTEL_RAID_SRCZCRX 0x0407
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCZCRX 0x0530
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#define PCI_DEVICE_ID_INTEL_RAID_SRCS28X 0x0409
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCS28X 0x3008
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#define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_ALIEF 0x0408
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#define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_ALIEF 0x3431
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#define PCI_DEVICE_ID_INTEL_RAID_SROMBU42E_HARWICH 0x0408
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#define PCI_SUBSYS_ID_INTEL_RAID_SROMBU42E_HARWICH 0x3499
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#define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x1960
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#define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x0520
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#define PCI_DEVICE_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB 0x0408
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#define PCI_SUBSYS_ID_FSC_MEGARAID_PCI_EXPRESS_ROMB 0x1065
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#define PCI_DEVICE_ID_MEGARAID_ACER_ROMB_2E 0x0408
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#define PCI_SUBSYS_ID_MEGARAID_ACER_ROMB_2E 0x004D
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#define PCI_SUBSYS_ID_PERC3_QC 0x0471
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#define PCI_SUBSYS_ID_PERC3_DC 0x0493
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#define PCI_SUBSYS_ID_PERC3_SC 0x0475
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#define PCI_DEVICE_ID_MEGARAID_NEC_ROMB_2E 0x0408
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#define PCI_SUBSYS_ID_MEGARAID_NEC_ROMB_2E 0x8287
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#ifndef PCI_SUBSYS_ID_FSC
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#define PCI_SUBSYS_ID_FSC 0x1734
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#endif
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#define MBOX_MAX_SCSI_CMDS 128 // number of cmds reserved for kernel
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#define MBOX_MAX_USER_CMDS 32 // number of cmds for applications
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#define MBOX_DEF_CMD_PER_LUN 64 // default commands per lun
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#define MBOX_DEFAULT_SG_SIZE 26 // default sg size supported by all fw
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#define MBOX_MAX_SG_SIZE 32 // maximum scatter-gather list size
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#define MBOX_MAX_SECTORS 128 // maximum sectors per IO
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#define MBOX_TIMEOUT 30 // timeout value for internal cmds
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#define MBOX_BUSY_WAIT 10 // max usec to wait for busy mailbox
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#define MBOX_RESET_WAIT 180 // wait these many seconds in reset
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#define MBOX_RESET_EXT_WAIT 120 // extended wait reset
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/*
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* maximum transfer that can happen through the firmware commands issued
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* internnaly from the driver.
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*/
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#define MBOX_IBUF_SIZE 4096
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/**
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* mbox_ccb_t - command control block specific to mailbox based controllers
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* @raw_mbox : raw mailbox pointer
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* @mbox : mailbox
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* @mbox64 : extended mailbox
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* @mbox_dma_h : maibox dma address
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* @sgl64 : 64-bit scatter-gather list
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* @sgl32 : 32-bit scatter-gather list
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* @sgl_dma_h : dma handle for the scatter-gather list
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* @pthru : passthru structure
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* @pthru_dma_h : dma handle for the passthru structure
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* @epthru : extended passthru structure
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* @epthru_dma_h : dma handle for extended passthru structure
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* @buf_dma_h : dma handle for buffers w/o sg list
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*
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* command control block specific to the mailbox based controllers
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*/
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typedef struct {
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uint8_t *raw_mbox;
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mbox_t *mbox;
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mbox64_t *mbox64;
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dma_addr_t mbox_dma_h;
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mbox_sgl64 *sgl64;
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mbox_sgl32 *sgl32;
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dma_addr_t sgl_dma_h;
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mraid_passthru_t *pthru;
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dma_addr_t pthru_dma_h;
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mraid_epassthru_t *epthru;
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dma_addr_t epthru_dma_h;
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dma_addr_t buf_dma_h;
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} mbox_ccb_t;
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/**
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* mraid_device_t - adapter soft state structure for mailbox controllers
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* @param una_mbox64 : 64-bit mbox - unaligned
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* @param una_mbox64_dma : mbox dma addr - unaligned
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* @param mbox : 32-bit mbox - aligned
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* @param mbox64 : 64-bit mbox - aligned
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* @param mbox_dma : mbox dma addr - aligned
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* @param mailbox_lock : exclusion lock for the mailbox
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* @param baseport : base port of hba memory
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* @param baseaddr : mapped addr of hba memory
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* @param mbox_pool : pool of mailboxes
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* @param mbox_pool_handle : handle for the mailbox pool memory
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* @param epthru_pool : a pool for extended passthru commands
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* @param epthru_pool_handle : handle to the pool above
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* @param sg_pool : pool of scatter-gather lists for this driver
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* @param sg_pool_handle : handle to the pool above
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* @param ccb_list : list of our command control blocks
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* @param uccb_list : list of cmd control blocks for mgmt module
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* @param umbox64 : array of mailbox for user commands (cmm)
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* @param pdrv_state : array for state of each physical drive.
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* @param last_disp : flag used to show device scanning
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* @param hw_error : set if FW not responding
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* @param fast_load : If set, skip physical device scanning
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* @channel_class : channel class, RAID or SCSI
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* @sysfs_sem : semaphore to serialize access to sysfs res.
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* @sysfs_uioc : management packet to issue FW calls from sysfs
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* @sysfs_mbox64 : mailbox packet to issue FW calls from sysfs
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* @sysfs_buffer : data buffer for FW commands issued from sysfs
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* @sysfs_buffer_dma : DMA buffer for FW commands issued from sysfs
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* @sysfs_wait_q : wait queue for sysfs operations
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* @random_del_supported : set if the random deletion is supported
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* @curr_ldmap : current LDID map
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*
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* Initialization structure for mailbox controllers: memory based and IO based
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* All the fields in this structure are LLD specific and may be discovered at
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* init() or start() time.
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*
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* NOTE: The fields of this structures are placed to minimize cache misses
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*/
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#define MAX_LD_EXTENDED64 64
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typedef struct {
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mbox64_t *una_mbox64;
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dma_addr_t una_mbox64_dma;
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mbox_t *mbox;
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mbox64_t *mbox64;
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dma_addr_t mbox_dma;
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spinlock_t mailbox_lock;
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unsigned long baseport;
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void __iomem * baseaddr;
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struct mraid_pci_blk mbox_pool[MBOX_MAX_SCSI_CMDS];
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struct dma_pool *mbox_pool_handle;
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struct mraid_pci_blk epthru_pool[MBOX_MAX_SCSI_CMDS];
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struct dma_pool *epthru_pool_handle;
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struct mraid_pci_blk sg_pool[MBOX_MAX_SCSI_CMDS];
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struct dma_pool *sg_pool_handle;
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mbox_ccb_t ccb_list[MBOX_MAX_SCSI_CMDS];
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mbox_ccb_t uccb_list[MBOX_MAX_USER_CMDS];
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mbox64_t umbox64[MBOX_MAX_USER_CMDS];
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uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES];
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uint32_t last_disp;
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int hw_error;
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int fast_load;
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uint8_t channel_class;
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struct semaphore sysfs_sem;
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uioc_t *sysfs_uioc;
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mbox64_t *sysfs_mbox64;
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caddr_t sysfs_buffer;
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dma_addr_t sysfs_buffer_dma;
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wait_queue_head_t sysfs_wait_q;
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int random_del_supported;
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uint16_t curr_ldmap[MAX_LD_EXTENDED64];
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} mraid_device_t;
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// route to raid device from adapter
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#define ADAP2RAIDDEV(adp) ((mraid_device_t *)((adp)->raid_device))
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#define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock)
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// Find out if this channel is a RAID or SCSI
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#define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01)
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#define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20)
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#define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C)
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#define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20)
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#define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C)
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#endif // _MEGARAID_H_
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// vim: set ts=8 sw=8 tw=78:
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