982 lines
22 KiB
Plaintext
982 lines
22 KiB
Plaintext
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#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
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config MMU
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bool
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default n
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config FPU
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bool
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default n
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config RWSEM_GENERIC_SPINLOCK
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bool
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default y
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config RWSEM_XCHGADD_ALGORITHM
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bool
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default n
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config BLACKFIN
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bool
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default y
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config BFIN
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bool
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default y
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config SEMAPHORE_SLEEPERS
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bool
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default y
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config GENERIC_FIND_NEXT_BIT
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bool
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default y
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config GENERIC_HWEIGHT
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bool
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default y
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config GENERIC_HARDIRQS
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bool
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default y
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config GENERIC_IRQ_PROBE
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bool
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default y
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config GENERIC_TIME
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bool
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default n
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config GENERIC_CALIBRATE_DELAY
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bool
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default y
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config FORCE_MAX_ZONEORDER
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int
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default "14"
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config GENERIC_CALIBRATE_DELAY
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bool
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default y
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config IRQCHIP_DEMUX_GPIO
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bool
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default y
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source "init/Kconfig"
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source "kernel/Kconfig.preempt"
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menu "Blackfin Processor Options"
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comment "Processor and Board Settings"
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choice
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prompt "CPU"
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default BF533
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config BF531
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bool "BF531"
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help
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BF531 Processor Support.
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config BF532
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bool "BF532"
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help
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BF532 Processor Support.
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config BF533
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bool "BF533"
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help
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BF533 Processor Support.
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config BF534
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bool "BF534"
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help
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BF534 Processor Support.
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config BF536
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bool "BF536"
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help
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BF536 Processor Support.
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config BF537
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bool "BF537"
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help
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BF537 Processor Support.
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config BF561
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bool "BF561"
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help
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Not Supported Yet - Work in progress - BF561 Processor Support.
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endchoice
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choice
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prompt "Silicon Rev"
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default BF_REV_0_2 if BF537
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default BF_REV_0_3 if BF533
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config BF_REV_0_2
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bool "0.2"
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depends on (BF537 || BF536 || BF534)
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config BF_REV_0_3
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bool "0.3"
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depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
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config BF_REV_0_4
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bool "0.4"
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depends on (BF561 || BF533 || BF532 || BF531)
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config BF_REV_0_5
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bool "0.5"
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depends on (BF561 || BF533 || BF532 || BF531)
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endchoice
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config BFIN_DUAL_CORE
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bool
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depends on (BF561)
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default y
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config BFIN_SINGLE_CORE
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bool
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depends on !BFIN_DUAL_CORE
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default y
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choice
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prompt "System type"
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default BFIN533_STAMP
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help
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Do NOT change the board here. Please use the top level
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configuration to ensure that all the other settings are
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correct.
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config BFIN533_EZKIT
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bool "BF533-EZKIT"
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depends on (BF533 || BF532 || BF531)
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help
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BF533-EZKIT-LITE board Support.
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config BFIN533_STAMP
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bool "BF533-STAMP"
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depends on (BF533 || BF532 || BF531)
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help
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BF533-STAMP board Support.
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config BFIN537_STAMP
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bool "BF537-STAMP"
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depends on (BF537 || BF536 || BF534)
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help
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BF537-STAMP board Support.
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config BFIN533_BLUETECHNIX_CM
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bool "Bluetechnix CM-BF533"
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depends on (BF533)
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help
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CM-BF533 support for EVAL- and DEV-Board.
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config BFIN537_BLUETECHNIX_CM
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bool "Bluetechnix CM-BF537"
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depends on (BF537)
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help
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CM-BF537 support for EVAL- and DEV-Board.
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config BFIN561_BLUETECHNIX_CM
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bool "BF561-CM"
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depends on (BF561)
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help
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CM-BF561 support for EVAL- and DEV-Board.
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config BFIN561_EZKIT
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bool "BF561-EZKIT"
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depends on (BF561)
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help
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BF561-EZKIT-LITE board Support.
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config PNAV10
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bool "PNAV 1.0 board"
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depends on (BF537)
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help
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PNAV 1.0 board Support.
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config GENERIC_BOARD
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bool "Custom"
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depends on (BF537 || BF536 \
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|| BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
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help
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GENERIC or Custom board Support.
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endchoice
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config MEM_GENERIC_BOARD
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bool
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depends on GENERIC_BOARD
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default y
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config MEM_MT48LC64M4A2FB_7E
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bool
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depends on (BFIN533_STAMP)
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default y
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config MEM_MT48LC16M16A2TG_75
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bool
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depends on (BFIN533_EZKIT || BFIN561_EZKIT \
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|| BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
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default y
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config MEM_MT48LC32M8A2_75
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bool
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depends on (BFIN537_STAMP || PNAV10)
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default y
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config MEM_MT48LC8M32B2B5_7
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bool
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depends on (BFIN561_BLUETECHNIX_CM)
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default y
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config BFIN_SHARED_FLASH_ENET
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bool
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depends on (BFIN533_STAMP)
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default y
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source "arch/blackfin/mach-bf533/Kconfig"
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source "arch/blackfin/mach-bf561/Kconfig"
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source "arch/blackfin/mach-bf537/Kconfig"
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menu "Board customizations"
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config CMDLINE_BOOL
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bool "Default bootloader kernel arguments"
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config CMDLINE
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string "Initial kernel command string"
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depends on CMDLINE_BOOL
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default "console=ttyBF0,57600"
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help
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If you don't have a boot loader capable of passing a command line string
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to the kernel, you may specify one here. As a minimum, you should specify
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the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
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comment "Board Setup"
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config CLKIN_HZ
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int "Crystal Frequency in Hz"
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default "11059200" if BFIN533_STAMP
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default "27000000" if BFIN533_EZKIT
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default "25000000" if BFIN537_STAMP
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default "30000000" if BFIN561_EZKIT
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default "24576000" if PNAV10
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help
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The frequency of CLKIN crystal oscillator on the board in Hz.
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config MEM_SIZE
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int "SDRAM Memory Size in MBytes"
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default 32 if BFIN533_EZKIT
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default 64 if BFIN537_STAMP
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default 64 if BFIN561_EZKIT
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default 128 if BFIN533_STAMP
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default 64 if PNAV10
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config MEM_ADD_WIDTH
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int "SDRAM Memory Address Width"
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default 9 if BFIN533_EZKIT
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default 9 if BFIN561_EZKIT
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default 10 if BFIN537_STAMP
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default 11 if BFIN533_STAMP
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default 10 if PNAV10
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config ENET_FLASH_PIN
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int "PF port/pin used for flash and ethernet sharing"
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depends on (BFIN533_STAMP)
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default 0
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help
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PF port/pin used for flash and ethernet sharing to allow other PF
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pins to be used on other platforms without having to touch common
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code.
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For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
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config BOOT_LOAD
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hex "Kernel load address for booting"
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default "0x1000"
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help
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This option allows you to set the load address of the kernel.
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This can be useful if you are on a board which has a small amount
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of memory or you wish to reserve some memory at the beginning of
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the address space.
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Note that you generally want to keep this value at or above 4k
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(0x1000) as this will allow the kernel to capture NULL pointer
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references.
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comment "LED Status Indicators"
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depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
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config BFIN_ALIVE_LED
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bool "Enable Board Alive"
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depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
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default n
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help
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Blink the LEDs you select when the kernel is running. Helps detect
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a hung kernel.
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config BFIN_ALIVE_LED_NUM
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int "LED"
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depends on BFIN_ALIVE_LED
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range 1 3 if BFIN533_STAMP
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default "3" if BFIN533_STAMP
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help
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Select the LED (marked on the board) for you to blink.
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config BFIN_IDLE_LED
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bool "Enable System Load/Idle LED"
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depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
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default n
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help
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Blinks the LED you select when to determine kernel load.
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config BFIN_IDLE_LED_NUM
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int "LED"
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depends on BFIN_IDLE_LED
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range 1 3 if BFIN533_STAMP
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default "2" if BFIN533_STAMP
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help
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Select the LED (marked on the board) for you to blink.
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#
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# Sorry - but you need to put the hex address here -
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#
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# Flag Data register
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config BFIN_ALIVE_LED_PORT
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hex
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default 0xFFC00700 if (BFIN533_STAMP)
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# Peripheral Flag Direction Register
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config BFIN_ALIVE_LED_DPORT
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hex
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default 0xFFC00730 if (BFIN533_STAMP)
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config BFIN_ALIVE_LED_PIN
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hex
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default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
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default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
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default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
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config BFIN_IDLE_LED_PORT
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hex
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default 0xFFC00700 if (BFIN533_STAMP)
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# Peripheral Flag Direction Register
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config BFIN_IDLE_LED_DPORT
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hex
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default 0xFFC00730 if (BFIN533_STAMP)
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config BFIN_IDLE_LED_PIN
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hex
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default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
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default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
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default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
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comment "Console UART Setup"
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choice
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prompt "Baud Rate"
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default BAUD_57600
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config BAUD_9600
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bool "9600"
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config BAUD_19200
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bool "19200"
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config BAUD_38400
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bool "38400"
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config BAUD_57600
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bool "57600"
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config BAUD_115200
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bool "115200"
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endchoice
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choice
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prompt "Parity"
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default BAUD_NO_PARITY
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config BAUD_NO_PARITY
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bool "No Parity"
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config BAUD_PARITY
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bool "Parity"
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endchoice
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choice
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prompt "Stop Bits"
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default BAUD_1_STOPBIT
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|
config BAUD_1_STOPBIT
|
||
|
|
bool "1"
|
||
|
|
config BAUD_2_STOPBIT
|
||
|
|
bool "2"
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
|
||
|
|
menu "Blackfin Kernel Optimizations"
|
||
|
|
|
||
|
|
comment "Timer Tick"
|
||
|
|
|
||
|
|
source kernel/Kconfig.hz
|
||
|
|
|
||
|
|
comment "Memory Optimizations"
|
||
|
|
|
||
|
|
config I_ENTRY_L1
|
||
|
|
bool "Locate interrupt entry code in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config EXCPT_IRQ_SYSC_L1
|
||
|
|
bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config DO_IRQ_L1
|
||
|
|
bool "Locate frequently called do_irq dispatcher function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled frequently called do_irq dispatcher function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config CORE_TIMER_IRQ_L1
|
||
|
|
bool "Locate frequently called timer_interrupt() function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled frequently called timer_interrupt() function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config IDLE_L1
|
||
|
|
bool "Locate frequently idle function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled frequently called idle function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config SCHEDULE_L1
|
||
|
|
bool "Locate kernel schedule function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled frequently called kernel schedule is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config ARITHMETIC_OPS_L1
|
||
|
|
bool "Locate kernel owned arithmetic functions in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled arithmetic functions are linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config ACCESS_OK_L1
|
||
|
|
bool "Locate access_ok function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled access_ok function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config MEMSET_L1
|
||
|
|
bool "Locate memset function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled memset function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config MEMCPY_L1
|
||
|
|
bool "Locate memcpy function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled memcpy function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config SYS_BFIN_SPINLOCK_L1
|
||
|
|
bool "Locate sys_bfin_spinlock function in L1 Memory"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
If enabled sys_bfin_spinlock function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config IP_CHECKSUM_L1
|
||
|
|
bool "Locate IP Checksum function in L1 Memory"
|
||
|
|
default n
|
||
|
|
help
|
||
|
|
If enabled IP Checksum function is linked
|
||
|
|
into L1 instruction memory.(less latency)
|
||
|
|
|
||
|
|
config CACHELINE_ALIGNED_L1
|
||
|
|
bool "Locate cacheline_aligned data to L1 Data Memory"
|
||
|
|
default y
|
||
|
|
depends on !BF531
|
||
|
|
help
|
||
|
|
If enabled cacheline_anligned data is linked
|
||
|
|
into L1 data memory.(less latency)
|
||
|
|
|
||
|
|
config SYSCALL_TAB_L1
|
||
|
|
bool "Locate Syscall Table L1 Data Memory"
|
||
|
|
default n
|
||
|
|
depends on !BF531
|
||
|
|
help
|
||
|
|
If enabled the Syscall LUT is linked
|
||
|
|
into L1 data memory.(less latency)
|
||
|
|
|
||
|
|
config CPLB_SWITCH_TAB_L1
|
||
|
|
bool "Locate CPLB Switch Tables L1 Data Memory"
|
||
|
|
default n
|
||
|
|
depends on !BF531
|
||
|
|
help
|
||
|
|
If enabled the CPLB Switch Tables are linked
|
||
|
|
into L1 data memory.(less latency)
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt "Kernel executes from"
|
||
|
|
help
|
||
|
|
Choose the memory type that the kernel will be running in.
|
||
|
|
|
||
|
|
config RAMKERNEL
|
||
|
|
bool "RAM"
|
||
|
|
help
|
||
|
|
The kernel will be resident in RAM when running.
|
||
|
|
|
||
|
|
config ROMKERNEL
|
||
|
|
bool "ROM"
|
||
|
|
help
|
||
|
|
The kernel will be resident in FLASH/ROM when running.
|
||
|
|
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
source "mm/Kconfig"
|
||
|
|
|
||
|
|
config BFIN_DMA_5XX
|
||
|
|
bool "Enable DMA Support"
|
||
|
|
depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561)
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
DMA driver for BF5xx.
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt "Uncached SDRAM region"
|
||
|
|
default DMA_UNCACHED_1M
|
||
|
|
depends BFIN_DMA_5XX
|
||
|
|
config DMA_UNCACHED_2M
|
||
|
|
bool "Enable 2M DMA region"
|
||
|
|
config DMA_UNCACHED_1M
|
||
|
|
bool "Enable 1M DMA region"
|
||
|
|
config DMA_UNCACHED_NONE
|
||
|
|
bool "Disable DMA region"
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
|
||
|
|
comment "Cache Support"
|
||
|
|
config BLKFIN_CACHE
|
||
|
|
bool "Enable ICACHE"
|
||
|
|
config BLKFIN_DCACHE
|
||
|
|
bool "Enable DCACHE"
|
||
|
|
config BLKFIN_DCACHE_BANKA
|
||
|
|
bool "Enable only 16k BankA DCACHE - BankB is SRAM"
|
||
|
|
depends on BLKFIN_DCACHE && !BF531
|
||
|
|
default n
|
||
|
|
config BLKFIN_CACHE_LOCK
|
||
|
|
bool "Enable Cache Locking"
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt "Policy"
|
||
|
|
depends on BLKFIN_DCACHE
|
||
|
|
default BLKFIN_WB
|
||
|
|
config BLKFIN_WB
|
||
|
|
bool "Write back"
|
||
|
|
help
|
||
|
|
Write Back Policy:
|
||
|
|
Cached data will be written back to SDRAM only when needed.
|
||
|
|
This can give a nice increase in performance, but beware of
|
||
|
|
broken drivers that do not properly invalidate/flush their
|
||
|
|
cache.
|
||
|
|
|
||
|
|
Write Through Policy:
|
||
|
|
Cached data will always be written back to SDRAM when the
|
||
|
|
cache is updated. This is a completely safe setting, but
|
||
|
|
performance is worse than Write Back.
|
||
|
|
|
||
|
|
If you are unsure of the options and you want to be safe,
|
||
|
|
then go with Write Through.
|
||
|
|
|
||
|
|
config BLKFIN_WT
|
||
|
|
bool "Write through"
|
||
|
|
help
|
||
|
|
Write Back Policy:
|
||
|
|
Cached data will be written back to SDRAM only when needed.
|
||
|
|
This can give a nice increase in performance, but beware of
|
||
|
|
broken drivers that do not properly invalidate/flush their
|
||
|
|
cache.
|
||
|
|
|
||
|
|
Write Through Policy:
|
||
|
|
Cached data will always be written back to SDRAM when the
|
||
|
|
cache is updated. This is a completely safe setting, but
|
||
|
|
performance is worse than Write Back.
|
||
|
|
|
||
|
|
If you are unsure of the options and you want to be safe,
|
||
|
|
then go with Write Through.
|
||
|
|
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
config L1_MAX_PIECE
|
||
|
|
int "Set the max L1 SRAM pieces"
|
||
|
|
default 16
|
||
|
|
help
|
||
|
|
Set the max memory pieces for the L1 SRAM allocation algorithm.
|
||
|
|
Min value is 16. Max value is 1024.
|
||
|
|
|
||
|
|
menu "Clock Settings"
|
||
|
|
|
||
|
|
|
||
|
|
config BFIN_KERNEL_CLOCK
|
||
|
|
bool "Re-program Clocks while Kernel boots?"
|
||
|
|
default n
|
||
|
|
help
|
||
|
|
This option decides if kernel clocks are re-programed from the
|
||
|
|
bootloader settings. If the clocks are not set, the SDRAM settings
|
||
|
|
are also not changed, and the Bootloader does 100% of the hardware
|
||
|
|
configuration.
|
||
|
|
|
||
|
|
config VCO_MULT
|
||
|
|
int "VCO Multiplier"
|
||
|
|
depends on BFIN_KERNEL_CLOCK
|
||
|
|
default "22" if BFIN533_EZKIT
|
||
|
|
default "45" if BFIN533_STAMP
|
||
|
|
default "20" if BFIN537_STAMP
|
||
|
|
default "22" if BFIN533_BLUETECHNIX_CM
|
||
|
|
default "20" if BFIN537_BLUETECHNIX_CM
|
||
|
|
default "20" if BFIN561_BLUETECHNIX_CM
|
||
|
|
default "20" if BFIN561_EZKIT
|
||
|
|
|
||
|
|
config CCLK_DIV
|
||
|
|
int "Core Clock Divider"
|
||
|
|
depends on BFIN_KERNEL_CLOCK
|
||
|
|
default 1 if BFIN533_EZKIT
|
||
|
|
default 1 if BFIN533_STAMP
|
||
|
|
default 1 if BFIN537_STAMP
|
||
|
|
default 1 if BFIN533_BLUETECHNIX_CM
|
||
|
|
default 1 if BFIN537_BLUETECHNIX_CM
|
||
|
|
default 1 if BFIN561_BLUETECHNIX_CM
|
||
|
|
default 1 if BFIN561_EZKIT
|
||
|
|
|
||
|
|
config SCLK_DIV
|
||
|
|
int "System Clock Divider"
|
||
|
|
depends on BFIN_KERNEL_CLOCK
|
||
|
|
default 5 if BFIN533_EZKIT
|
||
|
|
default 5 if BFIN533_STAMP
|
||
|
|
default 4 if BFIN537_STAMP
|
||
|
|
default 5 if BFIN533_BLUETECHNIX_CM
|
||
|
|
default 4 if BFIN537_BLUETECHNIX_CM
|
||
|
|
default 4 if BFIN561_BLUETECHNIX_CM
|
||
|
|
default 5 if BFIN561_EZKIT
|
||
|
|
|
||
|
|
config CLKIN_HALF
|
||
|
|
bool "Half ClockIn"
|
||
|
|
depends on BFIN_KERNEL_CLOCK
|
||
|
|
default n
|
||
|
|
|
||
|
|
config PLL_BYPASS
|
||
|
|
bool "Bypass PLL"
|
||
|
|
depends on BFIN_KERNEL_CLOCK
|
||
|
|
default n
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
comment "Asynchonous Memory Configuration"
|
||
|
|
|
||
|
|
menu "EBIU_AMBCTL Global Control"
|
||
|
|
config C_AMCKEN
|
||
|
|
bool "Enable CLKOUT"
|
||
|
|
default y
|
||
|
|
|
||
|
|
config C_CDPRIO
|
||
|
|
bool "DMA has priority over core for ext. accesses"
|
||
|
|
default n
|
||
|
|
|
||
|
|
config C_B0PEN
|
||
|
|
depends on BF561
|
||
|
|
bool "Bank 0 16 bit packing enable"
|
||
|
|
default y
|
||
|
|
|
||
|
|
config C_B1PEN
|
||
|
|
depends on BF561
|
||
|
|
bool "Bank 1 16 bit packing enable"
|
||
|
|
default y
|
||
|
|
|
||
|
|
config C_B2PEN
|
||
|
|
depends on BF561
|
||
|
|
bool "Bank 2 16 bit packing enable"
|
||
|
|
default y
|
||
|
|
|
||
|
|
config C_B3PEN
|
||
|
|
depends on BF561
|
||
|
|
bool "Bank 3 16 bit packing enable"
|
||
|
|
default n
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt"Enable Asynchonous Memory Banks"
|
||
|
|
default C_AMBEN_ALL
|
||
|
|
|
||
|
|
config C_AMBEN
|
||
|
|
bool "Disable All Banks"
|
||
|
|
|
||
|
|
config C_AMBEN_B0
|
||
|
|
bool "Enable Bank 0"
|
||
|
|
|
||
|
|
config C_AMBEN_B0_B1
|
||
|
|
bool "Enable Bank 0 & 1"
|
||
|
|
|
||
|
|
config C_AMBEN_B0_B1_B2
|
||
|
|
bool "Enable Bank 0 & 1 & 2"
|
||
|
|
|
||
|
|
config C_AMBEN_ALL
|
||
|
|
bool "Enable All Banks"
|
||
|
|
endchoice
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
menu "EBIU_AMBCTL Control"
|
||
|
|
config BANK_0
|
||
|
|
hex "Bank 0"
|
||
|
|
default 0x7BB0
|
||
|
|
|
||
|
|
config BANK_1
|
||
|
|
hex "Bank 1"
|
||
|
|
default 0x7BB0
|
||
|
|
|
||
|
|
config BANK_2
|
||
|
|
hex "Bank 2"
|
||
|
|
default 0x7BB0
|
||
|
|
|
||
|
|
config BANK_3
|
||
|
|
hex "Bank 3"
|
||
|
|
default 0x99B3
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
#############################################################################
|
||
|
|
menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
|
||
|
|
|
||
|
|
config PCI
|
||
|
|
bool "PCI support"
|
||
|
|
help
|
||
|
|
Support for PCI bus.
|
||
|
|
|
||
|
|
source "drivers/pci/Kconfig"
|
||
|
|
|
||
|
|
config HOTPLUG
|
||
|
|
bool "Support for hot-pluggable device"
|
||
|
|
help
|
||
|
|
Say Y here if you want to plug devices into your computer while
|
||
|
|
the system is running, and be able to use them quickly. In many
|
||
|
|
cases, the devices can likewise be unplugged at any time too.
|
||
|
|
|
||
|
|
One well known example of this is PCMCIA- or PC-cards, credit-card
|
||
|
|
size devices such as network cards, modems or hard drives which are
|
||
|
|
plugged into slots found on all modern laptop computers. Another
|
||
|
|
example, used on modern desktops as well as laptops, is USB.
|
||
|
|
|
||
|
|
Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
|
||
|
|
software (at <http://linux-hotplug.sourceforge.net/>) and install it.
|
||
|
|
Then your kernel will automatically call out to a user mode "policy
|
||
|
|
agent" (/sbin/hotplug) to load modules and set up software needed
|
||
|
|
to use devices as you hotplug them.
|
||
|
|
|
||
|
|
source "drivers/pcmcia/Kconfig"
|
||
|
|
|
||
|
|
source "drivers/pci/hotplug/Kconfig"
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
menu "Executable file formats"
|
||
|
|
|
||
|
|
source "fs/Kconfig.binfmt"
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
menu "Power management options"
|
||
|
|
source "kernel/power/Kconfig"
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt "Select PM Wakeup Event Source"
|
||
|
|
default PM_WAKEUP_GPIO_BY_SIC_IWR
|
||
|
|
depends on PM
|
||
|
|
help
|
||
|
|
If you have a GPIO already configured as input with the corresponding PORTx_MASK
|
||
|
|
bit set - "Specify Wakeup Event by SIC_IWR value"
|
||
|
|
|
||
|
|
config PM_WAKEUP_GPIO_BY_SIC_IWR
|
||
|
|
bool "Specify Wakeup Event by SIC_IWR value"
|
||
|
|
config PM_WAKEUP_BY_GPIO
|
||
|
|
bool "Cause Wakeup Event by GPIO"
|
||
|
|
config PM_WAKEUP_GPIO_API
|
||
|
|
bool "Configure Wakeup Event by PM GPIO API"
|
||
|
|
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
config PM_WAKEUP_SIC_IWR
|
||
|
|
hex "Wakeup Events (SIC_IWR)"
|
||
|
|
depends on PM_WAKEUP_GPIO_BY_SIC_IWR
|
||
|
|
default 0x80000000 if (BF537 || BF536 || BF534)
|
||
|
|
default 0x100000 if (BF533 || BF532 || BF531)
|
||
|
|
|
||
|
|
config PM_WAKEUP_GPIO_NUMBER
|
||
|
|
int "Wakeup GPIO number"
|
||
|
|
range 0 47
|
||
|
|
depends on PM_WAKEUP_BY_GPIO
|
||
|
|
default 2 if BFIN537_STAMP
|
||
|
|
|
||
|
|
choice
|
||
|
|
prompt "GPIO Polarity"
|
||
|
|
depends on PM_WAKEUP_BY_GPIO
|
||
|
|
default PM_WAKEUP_GPIO_POLAR_H
|
||
|
|
config PM_WAKEUP_GPIO_POLAR_H
|
||
|
|
bool "Active High"
|
||
|
|
config PM_WAKEUP_GPIO_POLAR_L
|
||
|
|
bool "Active Low"
|
||
|
|
config PM_WAKEUP_GPIO_POLAR_EDGE_F
|
||
|
|
bool "Falling EDGE"
|
||
|
|
config PM_WAKEUP_GPIO_POLAR_EDGE_R
|
||
|
|
bool "Rising EDGE"
|
||
|
|
config PM_WAKEUP_GPIO_POLAR_EDGE_B
|
||
|
|
bool "Both EDGE"
|
||
|
|
endchoice
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
if (BF537 || BF533)
|
||
|
|
|
||
|
|
menu "CPU Frequency scaling"
|
||
|
|
|
||
|
|
source "drivers/cpufreq/Kconfig"
|
||
|
|
|
||
|
|
config CPU_FREQ
|
||
|
|
bool
|
||
|
|
default n
|
||
|
|
help
|
||
|
|
If you want to enable this option, you should select the
|
||
|
|
DPMC driver from Character Devices.
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
endif
|
||
|
|
|
||
|
|
source "net/Kconfig"
|
||
|
|
|
||
|
|
source "drivers/Kconfig"
|
||
|
|
|
||
|
|
source "fs/Kconfig"
|
||
|
|
|
||
|
|
source "arch/blackfin/oprofile/Kconfig"
|
||
|
|
|
||
|
|
menu "Kernel hacking"
|
||
|
|
|
||
|
|
source "lib/Kconfig.debug"
|
||
|
|
|
||
|
|
config DEBUG_HWERR
|
||
|
|
bool "Hardware error interrupt debugging"
|
||
|
|
depends on DEBUG_KERNEL
|
||
|
|
help
|
||
|
|
When enabled, the hardware error interrupt is never disabled, and
|
||
|
|
will happen immediately when an error condition occurs. This comes
|
||
|
|
at a slight cost in code size, but is necessary if you are getting
|
||
|
|
hardware error interrupts and need to know where they are coming
|
||
|
|
from.
|
||
|
|
|
||
|
|
config DEBUG_ICACHE_CHECK
|
||
|
|
bool "Check Instruction cache coherancy"
|
||
|
|
depends on DEBUG_KERNEL
|
||
|
|
depends on DEBUG_HWERR
|
||
|
|
help
|
||
|
|
Say Y here if you are getting wierd unexplained errors. This will
|
||
|
|
ensure that icache is what SDRAM says it should be, by doing a
|
||
|
|
byte wise comparision between SDRAM and instruction cache. This
|
||
|
|
also relocates the irq_panic() function to L1 memory, (which is
|
||
|
|
un-cached).
|
||
|
|
|
||
|
|
config DEBUG_KERNEL_START
|
||
|
|
bool "Debug Kernel Startup"
|
||
|
|
depends on DEBUG_KERNEL
|
||
|
|
help
|
||
|
|
Say Y here to put in an mini-execption handler before the kernel
|
||
|
|
replaces the bootloader exception handler. This will stop kernels
|
||
|
|
from dieing at startup with no visible error messages.
|
||
|
|
|
||
|
|
config DEBUG_SERIAL_EARLY_INIT
|
||
|
|
bool "Initialize serial driver early"
|
||
|
|
default n
|
||
|
|
depends on SERIAL_BFIN
|
||
|
|
help
|
||
|
|
Say Y here if you want to get kernel output early when kernel
|
||
|
|
crashes before the normal console initialization. If this option
|
||
|
|
is enable, console output will always go to the ttyBF0, no matter
|
||
|
|
what kernel boot paramters you set.
|
||
|
|
|
||
|
|
config DEBUG_HUNT_FOR_ZERO
|
||
|
|
bool "Catch NULL pointer reads/writes"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
Say Y here to catch reads/writes to anywhere in the memory range
|
||
|
|
from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
|
||
|
|
catching common programming errors such as NULL pointer dereferences.
|
||
|
|
|
||
|
|
Misbehaving applications will be killed (generate a SEGV) while the
|
||
|
|
kernel will trigger a panic.
|
||
|
|
|
||
|
|
Enabling this option will take up an extra entry in CPLB table.
|
||
|
|
Otherwise, there is no extra overhead.
|
||
|
|
|
||
|
|
config DEBUG_BFIN_NO_KERN_HWTRACE
|
||
|
|
bool "Trace user apps (turn off hwtrace in kernel)"
|
||
|
|
default n
|
||
|
|
help
|
||
|
|
Some pieces of the kernel contain a lot of flow changes which can
|
||
|
|
quickly fill up the hardware trace buffer. When debugging crashes,
|
||
|
|
the hardware trace may indicate that the problem lies in kernel
|
||
|
|
space when in reality an application is buggy.
|
||
|
|
|
||
|
|
Say Y here to disable hardware tracing in some known "jumpy" pieces
|
||
|
|
of code so that the trace buffer will extend further back.
|
||
|
|
|
||
|
|
config DUAL_CORE_TEST_MODULE
|
||
|
|
tristate "Dual Core Test Module"
|
||
|
|
depends on (BF561)
|
||
|
|
default n
|
||
|
|
help
|
||
|
|
Say Y here to build-in dual core test module for dual core test.
|
||
|
|
|
||
|
|
config CPLB_INFO
|
||
|
|
bool "Display the CPLB information"
|
||
|
|
help
|
||
|
|
Display the CPLB information.
|
||
|
|
|
||
|
|
config ACCESS_CHECK
|
||
|
|
bool "Check the user pointer address"
|
||
|
|
default y
|
||
|
|
help
|
||
|
|
Usually the pointer transfer from user space is checked to see if its
|
||
|
|
address is in the kernel space.
|
||
|
|
|
||
|
|
Say N here to disable that check to improve the performance.
|
||
|
|
|
||
|
|
endmenu
|
||
|
|
|
||
|
|
source "security/Kconfig"
|
||
|
|
|
||
|
|
source "crypto/Kconfig"
|
||
|
|
|
||
|
|
source "lib/Kconfig"
|