License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
|
|
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# SPDX-License-Identifier: GPL-2.0
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2005-06-24 13:01:10 +08:00
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config XTENSA
|
2009-03-04 23:21:28 +08:00
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def_bool y
|
32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
All new 32-bit architectures should have 64-bit userspace off_t type, but
existing architectures has 32-bit ones.
To enforce the rule, new config option is added to arch/Kconfig that defaults
ARCH_32BIT_OFF_T to be disabled for new 32-bit architectures. All existing
32-bit architectures enable it explicitly.
New option affects force_o_largefile() behaviour. Namely, if userspace
off_t is 64-bits long, we have no reason to reject user to open big files.
Note that even if architectures has only 64-bit off_t in the kernel
(arc, c6x, h8300, hexagon, nios2, openrisc, and unicore32),
a libc may use 32-bit off_t, and therefore want to limit the file size
to 4GB unless specified differently in the open flags.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Yury Norov <ynorov@marvell.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-05-16 16:18:49 +08:00
|
|
|
select ARCH_32BIT_OFF_T
|
2019-06-13 15:08:57 +08:00
|
|
|
select ARCH_HAS_BINFMT_FLAT if !MMU
|
2019-10-29 17:53:30 +08:00
|
|
|
select ARCH_HAS_DMA_PREP_COHERENT if MMU
|
|
|
|
|
select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
|
|
|
|
|
select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
|
2020-02-22 07:55:43 +08:00
|
|
|
select ARCH_HAS_DMA_SET_UNCACHED if MMU
|
2021-05-17 15:22:34 +08:00
|
|
|
select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
|
|
|
|
|
select ARCH_HAS_STRNLEN_USER
|
2021-04-30 13:55:15 +08:00
|
|
|
select ARCH_USE_MEMTEST
|
2019-01-02 06:08:32 +08:00
|
|
|
select ARCH_USE_QUEUED_RWLOCKS
|
|
|
|
|
select ARCH_USE_QUEUED_SPINLOCKS
|
2013-04-15 13:21:35 +08:00
|
|
|
select ARCH_WANT_FRAME_POINTERS
|
2013-01-06 20:17:21 +08:00
|
|
|
select ARCH_WANT_IPC_PARSE_VERSION
|
2019-12-04 08:46:31 +08:00
|
|
|
select BUILDTIME_TABLE_SORT
|
2012-10-27 11:41:40 +08:00
|
|
|
select CLONE_BACKWARDS
|
2014-06-16 12:20:17 +08:00
|
|
|
select COMMON_CLK
|
2018-08-24 16:31:08 +08:00
|
|
|
select DMA_REMAP if MMU
|
2014-06-16 12:20:17 +08:00
|
|
|
select GENERIC_ATOMIC64
|
|
|
|
|
select GENERIC_IRQ_SHOW
|
|
|
|
|
select GENERIC_PCI_IOMAP
|
|
|
|
|
select GENERIC_SCHED_CLOCK
|
2017-05-01 21:17:47 +08:00
|
|
|
select HAVE_ARCH_AUDITSYSCALL
|
2017-01-04 09:57:51 +08:00
|
|
|
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
|
|
|
|
|
select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
|
2019-11-14 12:47:17 +08:00
|
|
|
select HAVE_ARCH_SECCOMP_FILTER
|
2018-11-10 07:45:53 +08:00
|
|
|
select HAVE_ARCH_TRACEHOOK
|
2016-04-26 03:08:20 +08:00
|
|
|
select HAVE_DEBUG_KMEMLEAK
|
2016-04-26 03:08:52 +08:00
|
|
|
select HAVE_DMA_CONTIGUOUS
|
2016-05-21 08:00:16 +08:00
|
|
|
select HAVE_EXIT_THREAD
|
2013-05-24 11:02:25 +08:00
|
|
|
select HAVE_FUNCTION_TRACER
|
2021-05-26 15:03:37 +08:00
|
|
|
select HAVE_FUTEX_CMPXCHG if !MMU && FUTEX
|
2016-01-24 15:32:10 +08:00
|
|
|
select HAVE_HW_BREAKPOINT if PERF_EVENTS
|
2013-10-17 06:42:17 +08:00
|
|
|
select HAVE_IRQ_TIME_ACCOUNTING
|
2018-11-16 03:05:32 +08:00
|
|
|
select HAVE_PCI
|
2013-11-29 00:00:04 +08:00
|
|
|
select HAVE_PERF_EVENTS
|
2018-06-14 18:36:45 +08:00
|
|
|
select HAVE_STACKPROTECTOR
|
2018-11-12 13:51:49 +08:00
|
|
|
select HAVE_SYSCALL_TRACEPOINTS
|
2014-06-16 12:20:17 +08:00
|
|
|
select IRQ_DOMAIN
|
|
|
|
|
select MODULES_USE_ELF_RELA
|
2015-06-04 18:41:27 +08:00
|
|
|
select PERF_USE_VMALLOC
|
2020-09-03 22:22:35 +08:00
|
|
|
select SET_FS
|
2021-07-31 13:22:32 +08:00
|
|
|
select TRACE_IRQFLAGS_SUPPORT
|
2014-06-16 12:20:17 +08:00
|
|
|
select VIRT_TO_BUS
|
2005-06-24 13:01:10 +08:00
|
|
|
help
|
|
|
|
|
Xtensa processors are 32-bit RISC machines designed by Tensilica
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|
primarily for embedded systems. These processors are both
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configurable and extensible. The Linux port to the Xtensa
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architecture supports all processor configurations and extensions,
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with reasonable minimum requirements. The Xtensa Linux project has
|
2013-01-04 16:29:18 +08:00
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a home page at <http://www.linux-xtensa.org/>.
|
2005-06-24 13:01:10 +08:00
|
|
|
|
[PATCH] bitops: xtensa: use generic bitops
- remove {,test_and_}{set,clear,change}_bit()
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- remove generic_fls64()
- remove find_{next,first}{,_zero}_bit()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove generic_hweight{32,16,8}()
- remove sched_find_first_bit()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-26 17:39:43 +08:00
|
|
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config GENERIC_HWEIGHT
|
2009-03-04 23:21:28 +08:00
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|
|
def_bool y
|
[PATCH] bitops: xtensa: use generic bitops
- remove {,test_and_}{set,clear,change}_bit()
- remove __{,test_and_}{set,clear,change}_bit() and test_bit()
- remove generic_fls64()
- remove find_{next,first}{,_zero}_bit()
- remove ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
- remove generic_hweight{32,16,8}()
- remove sched_find_first_bit()
- remove minix_{test,set,test_and_clear,test,find_first_zero}_bit()
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-26 17:39:43 +08:00
|
|
|
|
2006-12-08 18:37:49 +08:00
|
|
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config ARCH_HAS_ILOG2_U32
|
2009-03-04 23:21:28 +08:00
|
|
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def_bool n
|
2006-12-08 18:37:49 +08:00
|
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|
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config ARCH_HAS_ILOG2_U64
|
2009-03-04 23:21:28 +08:00
|
|
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def_bool n
|
2006-12-08 18:37:49 +08:00
|
|
|
|
2014-04-08 06:39:19 +08:00
|
|
|
config NO_IOPORT_MAP
|
2012-09-17 09:44:41 +08:00
|
|
|
def_bool n
|
2007-02-11 23:41:31 +08:00
|
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|
avoid overflows in kernel/time.c
When the conversion factor between jiffies and milli- or microseconds is
not a single multiply or divide, as for the case of HZ == 300, we currently
do a multiply followed by a divide. The intervening result, however, is
subject to overflows, especially since the fraction is not simplified (for
HZ == 300, we multiply by 300 and divide by 1000).
This is exposed to the user when passing a large timeout to poll(), for
example.
This patch replaces the multiply-divide with a reciprocal multiplication on
32-bit platforms. When the input is an unsigned long, there is no portable
way to do this on 64-bit platforms there is no portable way to do this
since it requires a 128-bit intermediate result (which gcc does support on
64-bit platforms but may generate libgcc calls, e.g. on 64-bit s390), but
since the output is a 32-bit integer in the cases affected, just simplify
the multiply-divide (*3/10 instead of *300/1000).
The reciprocal multiply used can have off-by-one errors in the upper half
of the valid output range. This could be avoided at the expense of having
to deal with a potential 65-bit intermediate result. Since the intent is
to avoid overflow problems and most of the other time conversions are only
semiexact, the off-by-one errors were considered an acceptable tradeoff.
At Ralf Baechle's suggestion, this version uses a Perl script to compute
the necessary constants. We already have dependencies on Perl for kernel
compiles. This does, however, require the Perl module Math::BigInt, which
is included in the standard Perl distribution starting with version 5.8.0.
In order to support older versions of Perl, include a table of canned
constants in the script itself, and structure the script so that
Math::BigInt isn't required if pulling values from said table.
Running the script requires that the HZ value is available from the
Makefile. Thus, this patch also adds the Kconfig variable CONFIG_HZ to the
architectures which didn't already have it (alpha, cris, frv, h8300, m32r,
m68k, m68knommu, sparc, v850, and xtensa.) It does *not* touch the sh or
sh64 architectures, since Paul Mundt has dealt with those separately in the
sh tree.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Ralf Baechle <ralf@linux-mips.org>,
Cc: Sam Ravnborg <sam@ravnborg.org>,
Cc: Paul Mundt <lethal@linux-sh.org>,
Cc: Richard Henderson <rth@twiddle.net>,
Cc: Michael Starvik <starvik@axis.com>,
Cc: David Howells <dhowells@redhat.com>,
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>,
Cc: Hirokazu Takata <takata@linux-m32r.org>,
Cc: Geert Uytterhoeven <geert@linux-m68k.org>,
Cc: Roman Zippel <zippel@linux-m68k.org>,
Cc: William L. Irwin <sparclinux@vger.kernel.org>,
Cc: Chris Zankel <chris@zankel.net>,
Cc: H. Peter Anvin <hpa@zytor.com>,
Cc: Jan Engelhardt <jengelh@computergmbh.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-08 20:21:26 +08:00
|
|
|
config HZ
|
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int
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|
default 100
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|
2013-04-15 13:21:35 +08:00
|
|
|
config LOCKDEP_SUPPORT
|
|
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|
|
def_bool y
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|
2013-04-15 13:20:48 +08:00
|
|
|
config STACKTRACE_SUPPORT
|
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|
|
def_bool y
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|
|
|
2009-03-04 23:21:28 +08:00
|
|
|
config MMU
|
2015-06-27 12:31:12 +08:00
|
|
|
def_bool n
|
2009-03-04 23:21:28 +08:00
|
|
|
|
2013-12-18 15:10:29 +08:00
|
|
|
config HAVE_XTENSA_GPIO32
|
|
|
|
|
def_bool n
|
|
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|
|
|
2017-12-04 05:28:52 +08:00
|
|
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config KASAN_SHADOW_OFFSET
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|
hex
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default 0x6e400000
|
|
|
|
|
|
2021-03-13 20:23:41 +08:00
|
|
|
config CPU_BIG_ENDIAN
|
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def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
|
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|
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config CPU_LITTLE_ENDIAN
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def_bool !CPU_BIG_ENDIAN
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|
2005-06-24 13:01:10 +08:00
|
|
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menu "Processor type and features"
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choice
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|
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prompt "Xtensa Processor Configuration"
|
2006-12-10 18:18:48 +08:00
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default XTENSA_VARIANT_FSF
|
2005-06-24 13:01:10 +08:00
|
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|
2006-12-10 18:18:48 +08:00
|
|
|
config XTENSA_VARIANT_FSF
|
2008-10-22 00:11:43 +08:00
|
|
|
bool "fsf - default (not generic) configuration"
|
2009-03-04 23:21:28 +08:00
|
|
|
select MMU
|
2008-10-22 00:11:43 +08:00
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|
config XTENSA_VARIANT_DC232B
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|
bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
|
2009-03-04 23:21:28 +08:00
|
|
|
select MMU
|
2013-12-18 15:10:29 +08:00
|
|
|
select HAVE_XTENSA_GPIO32
|
2008-10-22 00:11:43 +08:00
|
|
|
help
|
2009-03-04 23:21:28 +08:00
|
|
|
This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
|
2009-03-04 23:21:32 +08:00
|
|
|
|
2013-01-05 08:57:16 +08:00
|
|
|
config XTENSA_VARIANT_DC233C
|
|
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bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
|
|
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|
|
select MMU
|
2013-12-18 15:10:29 +08:00
|
|
|
select HAVE_XTENSA_GPIO32
|
2013-01-05 08:57:16 +08:00
|
|
|
help
|
|
|
|
|
This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
|
|
|
|
|
|
2014-06-16 11:25:06 +08:00
|
|
|
config XTENSA_VARIANT_CUSTOM
|
|
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|
|
bool "Custom Xtensa processor configuration"
|
|
|
|
|
select HAVE_XTENSA_GPIO32
|
|
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|
help
|
|
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|
|
Select this variant to use a custom Xtensa processor configuration.
|
|
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|
|
You will be prompted for a processor variant CORENAME.
|
2005-06-24 13:01:10 +08:00
|
|
|
endchoice
|
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|
|
|
2014-06-16 11:25:06 +08:00
|
|
|
config XTENSA_VARIANT_CUSTOM_NAME
|
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string "Xtensa Processor Custom Core Variant Name"
|
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depends on XTENSA_VARIANT_CUSTOM
|
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help
|
|
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|
Provide the name of a custom Xtensa processor variant.
|
|
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|
This CORENAME selects arch/xtensa/variant/CORENAME.
|
2020-03-30 12:54:36 +08:00
|
|
|
Don't forget you have to select MMU if you have one.
|
2014-06-16 11:25:06 +08:00
|
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config XTENSA_VARIANT_NAME
|
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string
|
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default "dc232b" if XTENSA_VARIANT_DC232B
|
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|
default "dc233c" if XTENSA_VARIANT_DC233C
|
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default "fsf" if XTENSA_VARIANT_FSF
|
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default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
|
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|
config XTENSA_VARIANT_MMU
|
|
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bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
|
|
|
|
|
depends on XTENSA_VARIANT_CUSTOM
|
|
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|
default y
|
2015-06-27 12:31:12 +08:00
|
|
|
select MMU
|
2014-06-16 11:25:06 +08:00
|
|
|
help
|
|
|
|
|
Build a Conventional Kernel with full MMU support,
|
|
|
|
|
ie: it supports a TLB with auto-loading, page protection.
|
|
|
|
|
|
2015-06-14 06:41:25 +08:00
|
|
|
config XTENSA_VARIANT_HAVE_PERF_EVENTS
|
|
|
|
|
bool "Core variant has Performance Monitor Module"
|
|
|
|
|
depends on XTENSA_VARIANT_CUSTOM
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Enable if core variant has Performance Monitor Module with
|
|
|
|
|
External Registers Interface.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2015-11-27 21:26:41 +08:00
|
|
|
config XTENSA_FAKE_NMI
|
|
|
|
|
bool "Treat PMM IRQ as NMI"
|
|
|
|
|
depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
If PMM IRQ is the only IRQ at EXCM level it is safe to
|
|
|
|
|
treat it as NMI, which improves accuracy of profiling.
|
|
|
|
|
|
|
|
|
|
If there are other interrupts at or above PMM IRQ priority level
|
|
|
|
|
but not above the EXCM level, PMM IRQ still may be treated as NMI,
|
|
|
|
|
but only if these IRQs are not used. There will be a build warning
|
|
|
|
|
saying that this is not safe, and a bugcheck if one of these IRQs
|
|
|
|
|
actually fire.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2005-06-24 13:01:10 +08:00
|
|
|
config XTENSA_UNALIGNED_USER
|
2019-01-18 21:45:27 +08:00
|
|
|
bool "Unaligned memory access in user space"
|
2009-03-04 23:21:28 +08:00
|
|
|
help
|
|
|
|
|
The Xtensa architecture currently does not handle unaligned
|
|
|
|
|
memory accesses in hardware but through an exception handler.
|
|
|
|
|
Per default, unaligned memory accesses are disabled in user space.
|
2005-06-24 13:01:10 +08:00
|
|
|
|
2009-03-04 23:21:28 +08:00
|
|
|
Say Y here to enable unaligned memory access in user space.
|
2005-06-24 13:01:10 +08:00
|
|
|
|
2013-10-17 06:42:26 +08:00
|
|
|
config HAVE_SMP
|
|
|
|
|
bool "System Supports SMP (MX)"
|
2015-06-27 12:31:12 +08:00
|
|
|
depends on XTENSA_VARIANT_CUSTOM
|
2013-10-17 06:42:26 +08:00
|
|
|
select XTENSA_MX
|
|
|
|
|
help
|
2020-02-01 09:59:26 +08:00
|
|
|
This option is used to indicate that the system-on-a-chip (SOC)
|
2013-10-17 06:42:26 +08:00
|
|
|
supports Multiprocessing. Multiprocessor support implemented above
|
|
|
|
|
the CPU core definition and currently needs to be selected manually.
|
|
|
|
|
|
2020-02-01 09:59:26 +08:00
|
|
|
Multiprocessor support is implemented with external cache and
|
2015-04-27 21:52:07 +08:00
|
|
|
interrupt controllers.
|
2013-10-17 06:42:26 +08:00
|
|
|
|
|
|
|
|
The MX interrupt distributer adds Interprocessor Interrupts
|
|
|
|
|
and causes the IRQ numbers to be increased by 4 for devices
|
|
|
|
|
like the open cores ethernet driver and the serial interface.
|
|
|
|
|
|
|
|
|
|
You still have to select "Enable SMP" to enable SMP on this SOC.
|
|
|
|
|
|
|
|
|
|
config SMP
|
|
|
|
|
bool "Enable Symmetric multi-processing support"
|
|
|
|
|
depends on HAVE_SMP
|
|
|
|
|
select GENERIC_SMP_IDLE_THREAD
|
|
|
|
|
help
|
|
|
|
|
Enabled SMP Software; allows more than one CPU/CORE
|
|
|
|
|
to be activated during startup.
|
|
|
|
|
|
|
|
|
|
config NR_CPUS
|
|
|
|
|
depends on SMP
|
|
|
|
|
int "Maximum number of CPUs (2-32)"
|
|
|
|
|
range 2 32
|
|
|
|
|
default "4"
|
|
|
|
|
|
2013-10-17 06:42:28 +08:00
|
|
|
config HOTPLUG_CPU
|
|
|
|
|
bool "Enable CPU hotplug support"
|
|
|
|
|
depends on SMP
|
|
|
|
|
help
|
|
|
|
|
Say Y here to allow turning CPUs off and on. CPUs can be
|
|
|
|
|
controlled through /sys/devices/system/cpu.
|
|
|
|
|
|
|
|
|
|
Say N if you want to disable CPU hotplug.
|
|
|
|
|
|
2014-08-07 07:32:30 +08:00
|
|
|
config FAST_SYSCALL_XTENSA
|
|
|
|
|
bool "Enable fast atomic syscalls"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
fast_syscall_xtensa is a syscall that can make atomic operations
|
|
|
|
|
on UP kernel when processor has no s32c1i support.
|
|
|
|
|
|
|
|
|
|
This syscall is deprecated. It may have issues when called with
|
|
|
|
|
invalid arguments. It is provided only for backwards compatibility.
|
|
|
|
|
Only enable it if your userspace software requires it.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config FAST_SYSCALL_SPILL_REGISTERS
|
|
|
|
|
bool "Enable spill registers syscall"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
fast_syscall_spill_registers is a syscall that spills all active
|
|
|
|
|
register windows of a calling userspace task onto its stack.
|
|
|
|
|
|
|
|
|
|
This syscall is deprecated. It may have issues when called with
|
|
|
|
|
invalid arguments. It is provided only for backwards compatibility.
|
|
|
|
|
Only enable it if your userspace software requires it.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2015-01-12 14:44:44 +08:00
|
|
|
config USER_ABI_CALL0
|
|
|
|
|
bool
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "Userspace ABI"
|
|
|
|
|
default USER_ABI_DEFAULT
|
|
|
|
|
help
|
|
|
|
|
Select supported userspace ABI.
|
|
|
|
|
|
|
|
|
|
If unsure, choose the default ABI.
|
|
|
|
|
|
|
|
|
|
config USER_ABI_DEFAULT
|
|
|
|
|
bool "Default ABI only"
|
|
|
|
|
help
|
|
|
|
|
Assume default userspace ABI. For XEA2 cores it is windowed ABI.
|
|
|
|
|
call0 ABI binaries may be run on such kernel, but signal delivery
|
|
|
|
|
will not work correctly for them.
|
|
|
|
|
|
|
|
|
|
config USER_ABI_CALL0_ONLY
|
|
|
|
|
bool "Call0 ABI only"
|
|
|
|
|
select USER_ABI_CALL0
|
|
|
|
|
help
|
|
|
|
|
Select this option to support only call0 ABI in userspace.
|
|
|
|
|
Windowed ABI binaries will crash with a segfault caused by
|
|
|
|
|
an illegal instruction exception on the first 'entry' opcode.
|
|
|
|
|
|
|
|
|
|
Choose this option if you're planning to run only user code
|
|
|
|
|
built with call0 ABI.
|
|
|
|
|
|
|
|
|
|
config USER_ABI_CALL0_PROBE
|
|
|
|
|
bool "Support both windowed and call0 ABI by probing"
|
|
|
|
|
select USER_ABI_CALL0
|
|
|
|
|
help
|
|
|
|
|
Select this option to support both windowed and call0 userspace
|
|
|
|
|
ABIs. When enabled all processes are started with PS.WOE disabled
|
|
|
|
|
and a fast user exception handler for an illegal instruction is
|
|
|
|
|
used to turn on PS.WOE bit on the first 'entry' opcode executed by
|
|
|
|
|
the userspace.
|
|
|
|
|
|
|
|
|
|
This option should be enabled for the kernel that must support
|
|
|
|
|
both call0 and windowed ABIs in userspace at the same time.
|
|
|
|
|
|
|
|
|
|
Note that Xtensa ISA does not guarantee that entry opcode will
|
|
|
|
|
raise an illegal instruction exception on cores with XEA2 when
|
|
|
|
|
PS.WOE is disabled, check whether the target core supports it.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
2005-06-24 13:01:10 +08:00
|
|
|
endmenu
|
|
|
|
|
|
2009-03-04 23:21:28 +08:00
|
|
|
config XTENSA_CALIBRATE_CCOUNT
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
On some platforms (XT2000, for example), the CPU clock rate can
|
|
|
|
|
vary. The frequency can be determined, however, by measuring
|
|
|
|
|
against a well known, fixed frequency, such as an UART oscillator.
|
|
|
|
|
|
|
|
|
|
config SERIAL_CONSOLE
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2017-01-04 09:57:51 +08:00
|
|
|
config PLATFORM_HAVE_XIP
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2005-06-24 13:01:10 +08:00
|
|
|
menu "Platform options"
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "Xtensa System Type"
|
|
|
|
|
default XTENSA_PLATFORM_ISS
|
|
|
|
|
|
|
|
|
|
config XTENSA_PLATFORM_ISS
|
|
|
|
|
bool "ISS"
|
2009-03-04 23:21:28 +08:00
|
|
|
select XTENSA_CALIBRATE_CCOUNT
|
|
|
|
|
select SERIAL_CONSOLE
|
2005-06-24 13:01:10 +08:00
|
|
|
help
|
|
|
|
|
ISS is an acronym for Tensilica's Instruction Set Simulator.
|
|
|
|
|
|
|
|
|
|
config XTENSA_PLATFORM_XT2000
|
|
|
|
|
bool "XT2000"
|
|
|
|
|
help
|
|
|
|
|
XT2000 is the name of Tensilica's feature-rich emulation platform.
|
|
|
|
|
This hardware is capable of running a full Linux distribution.
|
|
|
|
|
|
2012-11-05 11:37:14 +08:00
|
|
|
config XTENSA_PLATFORM_XTFPGA
|
|
|
|
|
bool "XTFPGA"
|
2014-10-04 08:44:04 +08:00
|
|
|
select ETHOC if ETHERNET
|
2016-07-23 07:47:58 +08:00
|
|
|
select PLATFORM_WANT_DEFAULT_MEM if !MMU
|
2012-11-05 11:37:14 +08:00
|
|
|
select SERIAL_CONSOLE
|
|
|
|
|
select XTENSA_CALIBRATE_CCOUNT
|
2017-01-04 09:57:51 +08:00
|
|
|
select PLATFORM_HAVE_XIP
|
2012-11-05 11:37:14 +08:00
|
|
|
help
|
|
|
|
|
XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
|
|
|
|
|
This hardware is capable of running a full Linux distribution.
|
|
|
|
|
|
2005-06-24 13:01:10 +08:00
|
|
|
endchoice
|
|
|
|
|
|
2018-08-14 09:11:38 +08:00
|
|
|
config PLATFORM_NR_IRQS
|
|
|
|
|
int
|
|
|
|
|
default 3 if XTENSA_PLATFORM_XT2000
|
|
|
|
|
default 0
|
2005-06-24 13:01:10 +08:00
|
|
|
|
|
|
|
|
config XTENSA_CPU_CLOCK
|
|
|
|
|
int "CPU clock rate [MHz]"
|
|
|
|
|
depends on !XTENSA_CALIBRATE_CCOUNT
|
2009-03-04 23:21:28 +08:00
|
|
|
default 16
|
2005-06-24 13:01:10 +08:00
|
|
|
|
|
|
|
|
config GENERIC_CALIBRATE_DELAY
|
|
|
|
|
bool "Auto calibration of the BogoMIPS value"
|
2009-03-04 23:21:28 +08:00
|
|
|
help
|
2005-06-30 17:58:58 +08:00
|
|
|
The BogoMIPS value can easily be derived from the CPU frequency.
|
2005-06-24 13:01:10 +08:00
|
|
|
|
|
|
|
|
config CMDLINE_BOOL
|
|
|
|
|
bool "Default bootloader kernel arguments"
|
|
|
|
|
|
|
|
|
|
config CMDLINE
|
|
|
|
|
string "Initial kernel command string"
|
|
|
|
|
depends on CMDLINE_BOOL
|
|
|
|
|
default "console=ttyS0,38400 root=/dev/ram"
|
|
|
|
|
help
|
|
|
|
|
On some architectures (EBSA110 and CATS), there is currently no way
|
|
|
|
|
for the boot loader to pass arguments to the kernel. For these
|
|
|
|
|
architectures, you should supply some command-line options at build
|
|
|
|
|
time by entering them here. As a minimum, you should specify the
|
|
|
|
|
memory size and the root device (e.g., mem=64M root=/dev/nfs).
|
|
|
|
|
|
2012-11-04 04:30:13 +08:00
|
|
|
config USE_OF
|
|
|
|
|
bool "Flattened Device Tree support"
|
|
|
|
|
select OF
|
|
|
|
|
select OF_EARLY_FLATTREE
|
|
|
|
|
help
|
|
|
|
|
Include support for flattened device tree machine descriptions.
|
|
|
|
|
|
2019-01-23 17:49:18 +08:00
|
|
|
config BUILTIN_DTB_SOURCE
|
2012-11-04 04:30:13 +08:00
|
|
|
string "DTB to build into the kernel image"
|
|
|
|
|
depends on OF
|
|
|
|
|
|
2018-08-14 09:56:37 +08:00
|
|
|
config PARSE_BOOTPARAM
|
|
|
|
|
bool "Parse bootparam block"
|
|
|
|
|
default y
|
|
|
|
|
help
|
|
|
|
|
Parse parameters passed to the kernel from the bootloader. It may
|
|
|
|
|
be disabled if the kernel is known to run without the bootloader.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
2021-02-19 02:18:00 +08:00
|
|
|
choice
|
|
|
|
|
prompt "Semihosting interface"
|
|
|
|
|
default XTENSA_SIMCALL_ISS
|
|
|
|
|
depends on XTENSA_PLATFORM_ISS
|
|
|
|
|
help
|
|
|
|
|
Choose semihosting interface that will be used for serial port,
|
|
|
|
|
block device and networking.
|
|
|
|
|
|
|
|
|
|
config XTENSA_SIMCALL_ISS
|
|
|
|
|
bool "simcall"
|
|
|
|
|
help
|
|
|
|
|
Use simcall instruction. simcall is only available on simulators,
|
|
|
|
|
it does nothing on hardware.
|
|
|
|
|
|
|
|
|
|
config XTENSA_SIMCALL_GDBIO
|
|
|
|
|
bool "GDBIO"
|
|
|
|
|
help
|
|
|
|
|
Use break instruction. It is available on real hardware when GDB
|
|
|
|
|
is attached to it via JTAG.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
2008-05-20 05:50:38 +08:00
|
|
|
config BLK_DEV_SIMDISK
|
|
|
|
|
tristate "Host file-based simulated block device support"
|
|
|
|
|
default n
|
2014-08-27 18:54:48 +08:00
|
|
|
depends on XTENSA_PLATFORM_ISS && BLOCK
|
2008-05-20 05:50:38 +08:00
|
|
|
help
|
|
|
|
|
Create block devices that map to files in the host file system.
|
|
|
|
|
Device binding to host file may be changed at runtime via proc
|
|
|
|
|
interface provided the device is not in use.
|
|
|
|
|
|
|
|
|
|
config BLK_DEV_SIMDISK_COUNT
|
|
|
|
|
int "Number of host file-based simulated block devices"
|
|
|
|
|
range 1 10
|
|
|
|
|
depends on BLK_DEV_SIMDISK
|
|
|
|
|
default 2
|
|
|
|
|
help
|
|
|
|
|
This is the default minimal number of created block devices.
|
|
|
|
|
Kernel/module parameter 'simdisk_count' may be used to change this
|
|
|
|
|
value at runtime. More file names (but no more than 10) may be
|
|
|
|
|
specified as parameters, simdisk_count grows accordingly.
|
|
|
|
|
|
|
|
|
|
config SIMDISK0_FILENAME
|
|
|
|
|
string "Host filename for the first simulated device"
|
|
|
|
|
depends on BLK_DEV_SIMDISK = y
|
|
|
|
|
default ""
|
|
|
|
|
help
|
|
|
|
|
Attach a first simdisk to a host file. Conventionally, this file
|
|
|
|
|
contains a root file system.
|
|
|
|
|
|
|
|
|
|
config SIMDISK1_FILENAME
|
|
|
|
|
string "Host filename for the second simulated device"
|
|
|
|
|
depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
|
|
|
|
|
default ""
|
|
|
|
|
help
|
|
|
|
|
Another simulated disk in a host file for a buildroot-independent
|
|
|
|
|
storage.
|
|
|
|
|
|
2015-02-27 11:28:00 +08:00
|
|
|
config XTFPGA_LCD
|
|
|
|
|
bool "Enable XTFPGA LCD driver"
|
|
|
|
|
depends on XTENSA_PLATFORM_XTFPGA
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
There's a 2x16 LCD on most of XTFPGA boards, kernel may output
|
|
|
|
|
progress messages there during bootup/shutdown. It may be useful
|
|
|
|
|
during board bringup.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config XTFPGA_LCD_BASE_ADDR
|
|
|
|
|
hex "XTFPGA LCD base address"
|
|
|
|
|
depends on XTFPGA_LCD
|
|
|
|
|
default "0x0d0c0000"
|
|
|
|
|
help
|
|
|
|
|
Base address of the LCD controller inside KIO region.
|
|
|
|
|
Different boards from XTFPGA family have LCD controller at different
|
|
|
|
|
addresses. Please consult prototyping user guide for your board for
|
|
|
|
|
the correct address. Wrong address here may lead to hardware lockup.
|
|
|
|
|
|
|
|
|
|
config XTFPGA_LCD_8BIT_ACCESS
|
|
|
|
|
bool "Use 8-bit access to XTFPGA LCD"
|
|
|
|
|
depends on XTFPGA_LCD
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
LCD may be connected with 4- or 8-bit interface, 8-bit access may
|
|
|
|
|
only be used with 8-bit interface. Please consult prototyping user
|
|
|
|
|
guide for your board for the correct interface width.
|
|
|
|
|
|
2019-10-01 15:25:30 +08:00
|
|
|
comment "Kernel memory layout"
|
|
|
|
|
|
|
|
|
|
config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
|
|
|
|
|
bool "Initialize Xtensa MMU inside the Linux kernel code"
|
|
|
|
|
depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
|
|
|
|
|
default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
|
|
|
|
|
help
|
|
|
|
|
Earlier version initialized the MMU in the exception vector
|
|
|
|
|
before jumping to _startup in head.S and had an advantage that
|
|
|
|
|
it was possible to place a software breakpoint at 'reset' and
|
|
|
|
|
then enter your normal kernel breakpoints once the MMU was mapped
|
|
|
|
|
to the kernel mappings (0XC0000000).
|
|
|
|
|
|
2020-12-18 01:24:27 +08:00
|
|
|
This unfortunately won't work for U-Boot and likely also won't
|
2019-10-01 15:25:30 +08:00
|
|
|
work for using KEXEC to have a hot kernel ready for doing a
|
|
|
|
|
KDUMP.
|
|
|
|
|
|
|
|
|
|
So now the MMU is initialized in head.S but it's necessary to
|
|
|
|
|
use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
|
|
|
|
|
xt-gdb can't place a Software Breakpoint in the 0XD region prior
|
|
|
|
|
to mapping the MMU and after mapping even if the area of low memory
|
|
|
|
|
was mapped gdb wouldn't remove the breakpoint on hitting it as the
|
|
|
|
|
PC wouldn't match. Since Hardware Breakpoints are recommended for
|
|
|
|
|
Linux configurations it seems reasonable to just assume they exist
|
|
|
|
|
and leave this older mechanism for unfortunate souls that choose
|
|
|
|
|
not to follow Tensilica's recommendation.
|
|
|
|
|
|
|
|
|
|
Selecting this will cause U-Boot to set the KERNEL Load and Entry
|
|
|
|
|
address at 0x00003000 instead of the mapped std of 0xD0003000.
|
|
|
|
|
|
|
|
|
|
If in doubt, say Y.
|
|
|
|
|
|
2017-01-04 09:57:51 +08:00
|
|
|
config XIP_KERNEL
|
|
|
|
|
bool "Kernel Execute-In-Place from ROM"
|
|
|
|
|
depends on PLATFORM_HAVE_XIP
|
|
|
|
|
help
|
|
|
|
|
Execute-In-Place allows the kernel to run from non-volatile storage
|
|
|
|
|
directly addressable by the CPU, such as NOR flash. This saves RAM
|
|
|
|
|
space since the text section of the kernel is not loaded from flash
|
|
|
|
|
to RAM. Read-write sections, such as the data section and stack,
|
|
|
|
|
are still copied to RAM. The XIP kernel is not compressed since
|
|
|
|
|
it has to run directly from flash, so it will take more space to
|
|
|
|
|
store it. The flash address used to link the kernel object files,
|
|
|
|
|
and for storing it, is configuration dependent. Therefore, if you
|
|
|
|
|
say Y here, you must know the proper physical address where to
|
|
|
|
|
store the kernel image depending on your own flash memory usage.
|
|
|
|
|
|
|
|
|
|
Also note that the make target becomes "make xipImage" rather than
|
|
|
|
|
"make Image" or "make uImage". The final kernel binary to put in
|
|
|
|
|
ROM memory will be arch/xtensa/boot/xipImage.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2019-10-01 15:25:30 +08:00
|
|
|
config MEMMAP_CACHEATTR
|
|
|
|
|
hex "Cache attributes for the memory address space"
|
|
|
|
|
depends on !MMU
|
|
|
|
|
default 0x22222222
|
|
|
|
|
help
|
|
|
|
|
These cache attributes are set up for noMMU systems. Each hex digit
|
|
|
|
|
specifies cache attributes for the corresponding 512MB memory
|
|
|
|
|
region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
|
|
|
|
|
bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
|
|
|
|
|
|
|
|
|
|
Cache attribute values are specific for the MMU type.
|
|
|
|
|
For region protection MMUs:
|
|
|
|
|
1: WT cached,
|
|
|
|
|
2: cache bypass,
|
|
|
|
|
4: WB cached,
|
|
|
|
|
f: illegal.
|
2020-08-30 13:57:51 +08:00
|
|
|
For full MMU:
|
2019-10-01 15:25:30 +08:00
|
|
|
bit 0: executable,
|
|
|
|
|
bit 1: writable,
|
|
|
|
|
bits 2..3:
|
|
|
|
|
0: cache bypass,
|
|
|
|
|
1: WB cache,
|
|
|
|
|
2: WT cache,
|
|
|
|
|
3: special (c and e are illegal, f is reserved).
|
|
|
|
|
For MPU:
|
|
|
|
|
0: illegal,
|
|
|
|
|
1: WB cache,
|
|
|
|
|
2: WB, no-write-allocate cache,
|
|
|
|
|
3: WT cache,
|
|
|
|
|
4: cache bypass.
|
|
|
|
|
|
|
|
|
|
config KSEG_PADDR
|
|
|
|
|
hex "Physical address of the KSEG mapping"
|
|
|
|
|
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
|
|
|
|
|
default 0x00000000
|
|
|
|
|
help
|
|
|
|
|
This is the physical address where KSEG is mapped. Please refer to
|
|
|
|
|
the chosen KSEG layout help for the required address alignment.
|
|
|
|
|
Unpacked kernel image (including vectors) must be located completely
|
|
|
|
|
within KSEG.
|
|
|
|
|
Physical memory below this address is not available to linux.
|
|
|
|
|
|
|
|
|
|
If unsure, leave the default value here.
|
|
|
|
|
|
2017-01-04 09:57:51 +08:00
|
|
|
config KERNEL_VIRTUAL_ADDRESS
|
|
|
|
|
hex "Kernel virtual address"
|
|
|
|
|
depends on MMU && XIP_KERNEL
|
|
|
|
|
default 0xd0003000
|
|
|
|
|
help
|
|
|
|
|
This is the virtual address where the XIP kernel is mapped.
|
|
|
|
|
XIP kernel may be mapped into KSEG or KIO region, virtual address
|
|
|
|
|
provided here must match kernel load address provided in
|
|
|
|
|
KERNEL_LOAD_ADDRESS.
|
|
|
|
|
|
2019-10-01 15:25:30 +08:00
|
|
|
config KERNEL_LOAD_ADDRESS
|
|
|
|
|
hex "Kernel load address"
|
|
|
|
|
default 0x60003000 if !MMU
|
|
|
|
|
default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
|
|
|
|
|
default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
|
|
|
|
|
help
|
|
|
|
|
This is the address where the kernel is loaded.
|
|
|
|
|
It is virtual address for MMUv2 configurations and physical address
|
|
|
|
|
for all other configurations.
|
|
|
|
|
|
|
|
|
|
If unsure, leave the default value here.
|
|
|
|
|
|
2020-02-01 12:11:24 +08:00
|
|
|
choice
|
|
|
|
|
prompt "Relocatable vectors location"
|
|
|
|
|
default XTENSA_VECTORS_IN_TEXT
|
2019-10-01 15:25:30 +08:00
|
|
|
help
|
2020-02-01 12:11:24 +08:00
|
|
|
Choose whether relocatable vectors are merged into the kernel .text
|
|
|
|
|
or placed separately at runtime. This option does not affect
|
|
|
|
|
configurations without VECBASE register where vectors are always
|
|
|
|
|
placed at their hardware-defined locations.
|
2019-10-01 15:25:30 +08:00
|
|
|
|
2020-02-01 12:11:24 +08:00
|
|
|
config XTENSA_VECTORS_IN_TEXT
|
|
|
|
|
bool "Merge relocatable vectors into kernel text"
|
|
|
|
|
depends on !MTD_XIP
|
|
|
|
|
help
|
|
|
|
|
This option puts relocatable vectors into the kernel .text section
|
|
|
|
|
with proper alignment.
|
|
|
|
|
This is a safe choice for most configurations.
|
|
|
|
|
|
|
|
|
|
config XTENSA_VECTORS_SEPARATE
|
|
|
|
|
bool "Put relocatable vectors at fixed address"
|
|
|
|
|
help
|
|
|
|
|
This option puts relocatable vectors at specific virtual address.
|
|
|
|
|
Vectors are merged with the .init data in the kernel image and
|
|
|
|
|
are copied into their designated location during kernel startup.
|
|
|
|
|
Use it to put vectors into IRAM or out of FLASH on kernels with
|
|
|
|
|
XIP-aware MTD support.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config VECTORS_ADDR
|
|
|
|
|
hex "Kernel vectors virtual address"
|
|
|
|
|
default 0x00000000
|
|
|
|
|
depends on XTENSA_VECTORS_SEPARATE
|
|
|
|
|
help
|
|
|
|
|
This is the virtual address of the (relocatable) vectors base.
|
|
|
|
|
It must be within KSEG if MMU is used.
|
2019-10-01 15:25:30 +08:00
|
|
|
|
2017-01-04 09:57:51 +08:00
|
|
|
config XIP_DATA_ADDR
|
|
|
|
|
hex "XIP kernel data virtual address"
|
|
|
|
|
depends on XIP_KERNEL
|
|
|
|
|
default 0x00000000
|
|
|
|
|
help
|
|
|
|
|
This is the virtual address where XIP kernel data is copied.
|
|
|
|
|
It must be within KSEG if MMU is used.
|
|
|
|
|
|
2019-10-01 15:25:30 +08:00
|
|
|
config PLATFORM_WANT_DEFAULT_MEM
|
|
|
|
|
def_bool n
|
|
|
|
|
|
|
|
|
|
config DEFAULT_MEM_START
|
|
|
|
|
hex
|
|
|
|
|
prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
|
|
|
|
|
default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
|
|
|
|
|
default 0x00000000
|
|
|
|
|
help
|
|
|
|
|
This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
|
|
|
|
|
in noMMU configurations.
|
|
|
|
|
|
|
|
|
|
If unsure, leave the default value here.
|
|
|
|
|
|
|
|
|
|
choice
|
|
|
|
|
prompt "KSEG layout"
|
|
|
|
|
depends on MMU
|
|
|
|
|
default XTENSA_KSEG_MMU_V2
|
|
|
|
|
|
|
|
|
|
config XTENSA_KSEG_MMU_V2
|
|
|
|
|
bool "MMUv2: 128MB cached + 128MB uncached"
|
|
|
|
|
help
|
|
|
|
|
MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
|
|
|
|
|
at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
|
|
|
|
|
without cache.
|
|
|
|
|
KSEG_PADDR must be aligned to 128MB.
|
|
|
|
|
|
|
|
|
|
config XTENSA_KSEG_256M
|
|
|
|
|
bool "256MB cached + 256MB uncached"
|
|
|
|
|
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
|
|
|
|
|
help
|
|
|
|
|
TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
|
|
|
|
|
with cache and to 0xc0000000 without cache.
|
|
|
|
|
KSEG_PADDR must be aligned to 256MB.
|
|
|
|
|
|
|
|
|
|
config XTENSA_KSEG_512M
|
|
|
|
|
bool "512MB cached + 512MB uncached"
|
|
|
|
|
depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
|
|
|
|
|
help
|
|
|
|
|
TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
|
|
|
|
|
with cache and to 0xc0000000 without cache.
|
|
|
|
|
KSEG_PADDR must be aligned to 256MB.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config HIGHMEM
|
|
|
|
|
bool "High Memory Support"
|
|
|
|
|
depends on MMU
|
2020-11-03 17:27:29 +08:00
|
|
|
select KMAP_LOCAL
|
2019-10-01 15:25:30 +08:00
|
|
|
help
|
|
|
|
|
Linux can use the full amount of RAM in the system by
|
|
|
|
|
default. However, the default MMUv2 setup only maps the
|
|
|
|
|
lowermost 128 MB of memory linearly to the areas starting
|
|
|
|
|
at 0xd0000000 (cached) and 0xd8000000 (uncached).
|
|
|
|
|
When there are more than 128 MB memory in the system not
|
|
|
|
|
all of it can be "permanently mapped" by the kernel.
|
|
|
|
|
The physical memory that's not permanently mapped is called
|
|
|
|
|
"high memory".
|
|
|
|
|
|
|
|
|
|
If you are compiling a kernel which will never run on a
|
|
|
|
|
machine with more than 128 MB total physical RAM, answer
|
|
|
|
|
N here.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
|
|
|
|
|
|
|
|
|
config FORCE_MAX_ZONEORDER
|
|
|
|
|
int "Maximum zone order"
|
|
|
|
|
default "11"
|
|
|
|
|
help
|
|
|
|
|
The kernel memory allocator divides physically contiguous memory
|
|
|
|
|
blocks into "zones", where each zone is a power of two number of
|
|
|
|
|
pages. This option selects the largest power of two that the kernel
|
|
|
|
|
keeps in the memory allocator. If you need to allocate very large
|
|
|
|
|
blocks of physically contiguous memory, then you may need to
|
|
|
|
|
increase this value.
|
|
|
|
|
|
|
|
|
|
This config option is actually maximum order plus one. For example,
|
|
|
|
|
a value of 11 means that the largest free memory block is 2^10 pages.
|
|
|
|
|
|
2005-06-24 13:01:10 +08:00
|
|
|
endmenu
|
|
|
|
|
|
2014-10-29 06:42:01 +08:00
|
|
|
menu "Power management options"
|
|
|
|
|
|
|
|
|
|
source "kernel/power/Kconfig"
|
|
|
|
|
|
|
|
|
|
endmenu
|