License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 22:07:57 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2005-04-17 06:20:36 +08:00
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#ifndef __ALPHA_TSUNAMI__H__
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#define __ALPHA_TSUNAMI__H__
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#include <linux/types.h>
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#include <asm/compiler.h>
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/*
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* TSUNAMI/TYPHOON are the internal names for the core logic chipset which
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* provides memory controller and PCI access for the 21264 based systems.
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*
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* This file is based on:
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*
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* Tsunami System Programmers Manual
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* Preliminary, Chapters 2-5
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*
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*/
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/* XXX: Do we need to conditionalize on this? */
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#ifdef USE_48_BIT_KSEG
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#define TS_BIAS 0x80000000000UL
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#else
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#define TS_BIAS 0x10000000000UL
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#endif
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/*
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* CChip, DChip, and PChip registers
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*/
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typedef struct {
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volatile unsigned long csr __attribute__((aligned(64)));
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} tsunami_64;
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typedef struct {
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tsunami_64 csc;
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tsunami_64 mtr;
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tsunami_64 misc;
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tsunami_64 mpd;
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tsunami_64 aar0;
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tsunami_64 aar1;
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tsunami_64 aar2;
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tsunami_64 aar3;
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tsunami_64 dim0;
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tsunami_64 dim1;
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tsunami_64 dir0;
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tsunami_64 dir1;
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tsunami_64 drir;
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tsunami_64 prben;
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tsunami_64 iic; /* a.k.a. iic0 */
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tsunami_64 wdr; /* a.k.a. iic1 */
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tsunami_64 mpr0;
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tsunami_64 mpr1;
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tsunami_64 mpr2;
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tsunami_64 mpr3;
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tsunami_64 mctl;
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tsunami_64 __pad1;
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tsunami_64 ttr;
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tsunami_64 tdr;
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tsunami_64 dim2;
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tsunami_64 dim3;
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tsunami_64 dir2;
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tsunami_64 dir3;
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tsunami_64 iic2;
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tsunami_64 iic3;
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} tsunami_cchip;
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typedef struct {
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tsunami_64 dsc;
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tsunami_64 str;
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tsunami_64 drev;
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} tsunami_dchip;
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typedef struct {
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tsunami_64 wsba[4];
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tsunami_64 wsm[4];
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tsunami_64 tba[4];
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tsunami_64 pctl;
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tsunami_64 plat;
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tsunami_64 reserved;
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tsunami_64 perror;
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tsunami_64 perrmask;
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tsunami_64 perrset;
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tsunami_64 tlbiv;
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tsunami_64 tlbia;
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tsunami_64 pmonctl;
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tsunami_64 pmoncnt;
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} tsunami_pchip;
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#define TSUNAMI_cchip ((tsunami_cchip *)(IDENT_ADDR+TS_BIAS+0x1A0000000UL))
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#define TSUNAMI_dchip ((tsunami_dchip *)(IDENT_ADDR+TS_BIAS+0x1B0000800UL))
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#define TSUNAMI_pchip0 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x180000000UL))
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#define TSUNAMI_pchip1 ((tsunami_pchip *)(IDENT_ADDR+TS_BIAS+0x380000000UL))
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extern int TSUNAMI_bootcpu;
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/*
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* TSUNAMI Pchip Error register.
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*/
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#define perror_m_lost 0x1
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#define perror_m_serr 0x2
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#define perror_m_perr 0x4
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#define perror_m_dcrto 0x8
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#define perror_m_sge 0x10
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#define perror_m_ape 0x20
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#define perror_m_ta 0x40
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#define perror_m_rdpe 0x80
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#define perror_m_nds 0x100
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#define perror_m_rto 0x200
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#define perror_m_uecc 0x400
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#define perror_m_cre 0x800
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#define perror_m_addrl 0xFFFFFFFF0000UL
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#define perror_m_addrh 0x7000000000000UL
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#define perror_m_cmd 0xF0000000000000UL
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#define perror_m_syn 0xFF00000000000000UL
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union TPchipPERROR {
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struct {
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unsigned int perror_v_lost : 1;
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unsigned perror_v_serr : 1;
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unsigned perror_v_perr : 1;
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unsigned perror_v_dcrto : 1;
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unsigned perror_v_sge : 1;
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unsigned perror_v_ape : 1;
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unsigned perror_v_ta : 1;
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unsigned perror_v_rdpe : 1;
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unsigned perror_v_nds : 1;
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unsigned perror_v_rto : 1;
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unsigned perror_v_uecc : 1;
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unsigned perror_v_cre : 1;
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unsigned perror_v_rsvd1 : 4;
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unsigned perror_v_addrl : 32;
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unsigned perror_v_addrh : 3;
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unsigned perror_v_rsvd2 : 1;
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unsigned perror_v_cmd : 4;
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unsigned perror_v_syn : 8;
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} perror_r_bits;
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int perror_q_whole [2];
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};
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/*
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* TSUNAMI Pchip Window Space Base Address register.
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*/
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#define wsba_m_ena 0x1
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#define wsba_m_sg 0x2
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#define wsba_m_ptp 0x4
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#define wsba_m_addr 0xFFF00000
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#define wmask_k_sz1gb 0x3FF00000
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union TPchipWSBA {
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struct {
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unsigned wsba_v_ena : 1;
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unsigned wsba_v_sg : 1;
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unsigned wsba_v_ptp : 1;
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unsigned wsba_v_rsvd1 : 17;
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unsigned wsba_v_addr : 12;
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unsigned wsba_v_rsvd2 : 32;
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} wsba_r_bits;
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int wsba_q_whole [2];
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};
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/*
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* TSUNAMI Pchip Control Register
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*/
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#define pctl_m_fdsc 0x1
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#define pctl_m_fbtb 0x2
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#define pctl_m_thdis 0x4
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#define pctl_m_chaindis 0x8
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#define pctl_m_tgtlat 0x10
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#define pctl_m_hole 0x20
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#define pctl_m_mwin 0x40
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#define pctl_m_arbena 0x80
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#define pctl_m_prigrp 0x7F00
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#define pctl_m_ppri 0x8000
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#define pctl_m_rsvd1 0x30000
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#define pctl_m_eccen 0x40000
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#define pctl_m_padm 0x80000
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#define pctl_m_cdqmax 0xF00000
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#define pctl_m_rev 0xFF000000
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#define pctl_m_crqmax 0xF00000000UL
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#define pctl_m_ptpmax 0xF000000000UL
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#define pctl_m_pclkx 0x30000000000UL
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#define pctl_m_fdsdis 0x40000000000UL
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#define pctl_m_fdwdis 0x80000000000UL
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#define pctl_m_ptevrfy 0x100000000000UL
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#define pctl_m_rpp 0x200000000000UL
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#define pctl_m_pid 0xC00000000000UL
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#define pctl_m_rsvd2 0xFFFF000000000000UL
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union TPchipPCTL {
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struct {
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unsigned pctl_v_fdsc : 1;
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unsigned pctl_v_fbtb : 1;
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unsigned pctl_v_thdis : 1;
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unsigned pctl_v_chaindis : 1;
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unsigned pctl_v_tgtlat : 1;
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unsigned pctl_v_hole : 1;
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unsigned pctl_v_mwin : 1;
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unsigned pctl_v_arbena : 1;
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unsigned pctl_v_prigrp : 7;
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unsigned pctl_v_ppri : 1;
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unsigned pctl_v_rsvd1 : 2;
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unsigned pctl_v_eccen : 1;
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unsigned pctl_v_padm : 1;
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unsigned pctl_v_cdqmax : 4;
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unsigned pctl_v_rev : 8;
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unsigned pctl_v_crqmax : 4;
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unsigned pctl_v_ptpmax : 4;
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unsigned pctl_v_pclkx : 2;
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unsigned pctl_v_fdsdis : 1;
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unsigned pctl_v_fdwdis : 1;
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unsigned pctl_v_ptevrfy : 1;
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unsigned pctl_v_rpp : 1;
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unsigned pctl_v_pid : 2;
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unsigned pctl_v_rsvd2 : 16;
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} pctl_r_bits;
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int pctl_q_whole [2];
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};
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/*
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* TSUNAMI Pchip Error Mask Register.
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*/
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#define perrmask_m_lost 0x1
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#define perrmask_m_serr 0x2
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#define perrmask_m_perr 0x4
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#define perrmask_m_dcrto 0x8
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#define perrmask_m_sge 0x10
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#define perrmask_m_ape 0x20
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#define perrmask_m_ta 0x40
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#define perrmask_m_rdpe 0x80
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#define perrmask_m_nds 0x100
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#define perrmask_m_rto 0x200
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#define perrmask_m_uecc 0x400
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#define perrmask_m_cre 0x800
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#define perrmask_m_rsvd 0xFFFFFFFFFFFFF000UL
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union TPchipPERRMASK {
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struct {
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unsigned int perrmask_v_lost : 1;
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unsigned perrmask_v_serr : 1;
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unsigned perrmask_v_perr : 1;
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unsigned perrmask_v_dcrto : 1;
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unsigned perrmask_v_sge : 1;
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unsigned perrmask_v_ape : 1;
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unsigned perrmask_v_ta : 1;
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unsigned perrmask_v_rdpe : 1;
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unsigned perrmask_v_nds : 1;
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unsigned perrmask_v_rto : 1;
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unsigned perrmask_v_uecc : 1;
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unsigned perrmask_v_cre : 1;
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unsigned perrmask_v_rsvd1 : 20;
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unsigned perrmask_v_rsvd2 : 32;
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} perrmask_r_bits;
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int perrmask_q_whole [2];
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};
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/*
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* Memory spaces:
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*/
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#define TSUNAMI_HOSE(h) (((unsigned long)(h)) << 33)
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#define TSUNAMI_BASE (IDENT_ADDR + TS_BIAS)
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#define TSUNAMI_MEM(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x000000000UL)
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#define _TSUNAMI_IACK_SC(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1F8000000UL)
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#define TSUNAMI_IO(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1FC000000UL)
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#define TSUNAMI_CONF(h) (TSUNAMI_BASE+TSUNAMI_HOSE(h) + 0x1FE000000UL)
|
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#define TSUNAMI_IACK_SC _TSUNAMI_IACK_SC(0) /* hack! */
|
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/*
|
|
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|
* The canonical non-remaped I/O and MEM addresses have these values
|
|
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|
|
* subtracted out. This is arranged so that folks manipulating ISA
|
|
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|
|
* devices can use their familiar numbers and have them map to bus 0.
|
|
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|
|
*/
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#define TSUNAMI_IO_BIAS TSUNAMI_IO(0)
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#define TSUNAMI_MEM_BIAS TSUNAMI_MEM(0)
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/* The IO address space is larger than 0xffff */
|
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#define TSUNAMI_IO_SPACE (TSUNAMI_CONF(0) - TSUNAMI_IO(0))
|
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/* Offset between ram physical addresses and pci64 DAC bus addresses. */
|
|
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#define TSUNAMI_DAC_OFFSET (1UL << 40)
|
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|
|
/*
|
|
|
|
|
* Data structure for handling TSUNAMI machine checks:
|
|
|
|
|
*/
|
|
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|
|
struct el_TSUNAMI_sysdata_mcheck {
|
|
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|
|
};
|
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|
|
#ifdef __KERNEL__
|
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|
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|
|
#ifndef __EXTERN_INLINE
|
|
|
|
|
#define __EXTERN_INLINE extern inline
|
|
|
|
|
#define __IO_EXTERN_INLINE
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* I/O functions:
|
|
|
|
|
*
|
|
|
|
|
* TSUNAMI, the 21??? PCI/memory support chipset for the EV6 (21264)
|
|
|
|
|
* can only use linear accesses to get at PCI memory and I/O spaces.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Memory functions. all accesses are done through linear space.
|
|
|
|
|
*/
|
ALPHA: support graphics on non-zero PCI domains
This code replaces earlier and incomplete handling of graphics on non-zero PCI
domains (aka hoses or peer PCI buses).
An option (CONFIG_VGA_HOSE) is set TRUE if configuring a GENERIC kernel, or a
kernel for MARVEL, TITAN, or TSUNAMI machines, as these are the machines whose
SRM consoles are capable of configuring and handling graphics options on
non-zero hoses. All other machines have the option set FALSE.
A routine, "find_console_vga_hose()", is used to find the graphics device
which the machine's firmware believes is the console device, and it sets a
global (pci_vga_hose) for later use in managing access to the device. This is
called in "init_arch" on TITAN and TSUNAMI machines; MARVEL machines use a
custom version of this routine because of extra complexity.
A routine, "locate_and_init_vga()", is used to find the graphics device and
set a global (pci_vga_hose) for later use in managing access to the device, in
the case where "find_console_vga_hose" has failed.
Various adjustments are made to the ioremap and ioportmap routines for
detecting and translating "legacy" VGA register and memory references to the
real PCI domain.
[akpm@linux-foundation.org: don't statically init bss]
[akpm@linux-foundation.org: build fix]
Signed-off-by: Jay Estabrook <jay.estabrook@hp.com>
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-01 15:47:03 +08:00
|
|
|
extern void __iomem *tsunami_ioportmap(unsigned long addr);
|
|
|
|
|
extern void __iomem *tsunami_ioremap(unsigned long addr, unsigned long size);
|
2005-04-17 06:20:36 +08:00
|
|
|
__EXTERN_INLINE int tsunami_is_ioaddr(unsigned long addr)
|
|
|
|
|
{
|
|
|
|
|
return addr >= TSUNAMI_BASE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
__EXTERN_INLINE int tsunami_is_mmio(const volatile void __iomem *xaddr)
|
|
|
|
|
{
|
|
|
|
|
unsigned long addr = (unsigned long) xaddr;
|
|
|
|
|
return (addr & 0x100000000UL) == 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#undef __IO_PREFIX
|
|
|
|
|
#define __IO_PREFIX tsunami
|
|
|
|
|
#define tsunami_trivial_rw_bw 1
|
|
|
|
|
#define tsunami_trivial_rw_lq 1
|
|
|
|
|
#define tsunami_trivial_io_bw 1
|
|
|
|
|
#define tsunami_trivial_io_lq 1
|
|
|
|
|
#define tsunami_trivial_iounmap 1
|
|
|
|
|
#include <asm/io_trivial.h>
|
|
|
|
|
|
|
|
|
|
#ifdef __IO_EXTERN_INLINE
|
|
|
|
|
#undef __EXTERN_INLINE
|
|
|
|
|
#undef __IO_EXTERN_INLINE
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
|
|
|
|
|
|
#endif /* __ALPHA_TSUNAMI__H__ */
|