2008-06-13 06:21:55 +08:00
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/*
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* rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
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*
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* Copyright (C) 2008 Sergey Lapin
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* Based on ds1307 driver by James Chapman and David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2008-06-13 06:21:55 +08:00
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#define FM3130_RTC_CONTROL (0x0)
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#define FM3130_CAL_CONTROL (0x1)
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#define FM3130_RTC_SECONDS (0x2)
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#define FM3130_RTC_MINUTES (0x3)
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#define FM3130_RTC_HOURS (0x4)
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#define FM3130_RTC_DAY (0x5)
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#define FM3130_RTC_DATE (0x6)
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#define FM3130_RTC_MONTHS (0x7)
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#define FM3130_RTC_YEARS (0x8)
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#define FM3130_ALARM_SECONDS (0x9)
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#define FM3130_ALARM_MINUTES (0xa)
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#define FM3130_ALARM_HOURS (0xb)
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#define FM3130_ALARM_DATE (0xc)
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#define FM3130_ALARM_MONTHS (0xd)
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#define FM3130_ALARM_WP_CONTROL (0xe)
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#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
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#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
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#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
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#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
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#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
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#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
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#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
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#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
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#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
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#define FM3130_CLOCK_REGS 7
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#define FM3130_ALARM_REGS 5
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struct fm3130 {
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u8 reg_addr_time;
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u8 reg_addr_alarm;
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u8 regs[15];
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struct i2c_msg msg[4];
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struct i2c_client *client;
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struct rtc_device *rtc;
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2010-08-11 09:02:10 +08:00
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int alarm_valid;
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2008-06-13 06:21:55 +08:00
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int data_valid;
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};
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static const struct i2c_device_id fm3130_id[] = {
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2008-07-13 04:47:55 +08:00
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{ "fm3130", 0 },
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2008-06-13 06:21:55 +08:00
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, fm3130_id);
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#define FM3130_MODE_NORMAL 0
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#define FM3130_MODE_WRITE 1
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#define FM3130_MODE_READ 2
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static void fm3130_rtc_mode(struct device *dev, int mode)
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{
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struct fm3130 *fm3130 = dev_get_drvdata(dev);
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fm3130->regs[FM3130_RTC_CONTROL] =
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i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
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switch (mode) {
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case FM3130_MODE_NORMAL:
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fm3130->regs[FM3130_RTC_CONTROL] &=
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~(FM3130_RTC_CONTROL_BIT_WRITE |
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FM3130_RTC_CONTROL_BIT_READ);
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break;
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case FM3130_MODE_WRITE:
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fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
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break;
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case FM3130_MODE_READ:
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fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
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break;
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default:
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dev_dbg(dev, "invalid mode %d\n", mode);
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break;
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}
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2010-08-11 09:02:10 +08:00
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2008-06-13 06:21:55 +08:00
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i2c_smbus_write_byte_data(fm3130->client,
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FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
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}
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static int fm3130_get_time(struct device *dev, struct rtc_time *t)
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{
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struct fm3130 *fm3130 = dev_get_drvdata(dev);
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int tmp;
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if (!fm3130->data_valid) {
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/* We have invalid data in RTC, probably due
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to battery faults or other problems. Return EIO
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2010-06-11 18:16:56 +08:00
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for now, it will allow us to set data later instead
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2008-06-13 06:21:55 +08:00
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of error during probing which disables device */
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return -EIO;
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}
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fm3130_rtc_mode(dev, FM3130_MODE_READ);
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/* read the RTC date and time registers all at once */
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tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
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fm3130->msg, 2);
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if (tmp != 2) {
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dev_err(dev, "%s error %d\n", "read", tmp);
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return -EIO;
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}
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fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
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2013-02-22 08:44:22 +08:00
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dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
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2008-06-13 06:21:55 +08:00
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2008-10-19 11:28:41 +08:00
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t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
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t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
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2008-06-13 06:21:55 +08:00
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tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
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2008-10-19 11:28:41 +08:00
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t->tm_hour = bcd2bin(tmp);
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t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
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t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
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2008-06-13 06:21:55 +08:00
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tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
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2008-10-19 11:28:41 +08:00
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t->tm_mon = bcd2bin(tmp) - 1;
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2008-06-13 06:21:55 +08:00
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/* assume 20YY not 19YY, and ignore CF bit */
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2008-10-19 11:28:41 +08:00
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t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
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2008-06-13 06:21:55 +08:00
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dev_dbg(dev, "%s secs=%d, mins=%d, "
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"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
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"read", t->tm_sec, t->tm_min,
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t->tm_hour, t->tm_mday,
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t->tm_mon, t->tm_year, t->tm_wday);
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/* initial clock setting can be undefined */
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return rtc_valid_tm(t);
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}
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static int fm3130_set_time(struct device *dev, struct rtc_time *t)
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{
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struct fm3130 *fm3130 = dev_get_drvdata(dev);
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int tmp, i;
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u8 *buf = fm3130->regs;
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dev_dbg(dev, "%s secs=%d, mins=%d, "
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"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
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"write", t->tm_sec, t->tm_min,
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t->tm_hour, t->tm_mday,
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t->tm_mon, t->tm_year, t->tm_wday);
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/* first register addr */
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2008-10-19 11:28:41 +08:00
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buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
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buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
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buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
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buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
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buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
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buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
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2008-06-13 06:21:55 +08:00
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/* assume 20YY not 19YY */
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tmp = t->tm_year - 100;
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2008-10-19 11:28:41 +08:00
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buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
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2008-06-13 06:21:55 +08:00
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2013-02-22 08:44:22 +08:00
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dev_dbg(dev, "%s: %15ph\n", "write", buf);
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2008-06-13 06:21:55 +08:00
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fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
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/* Writing time registers, we don't support multibyte transfers */
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for (i = 0; i < FM3130_CLOCK_REGS; i++) {
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i2c_smbus_write_byte_data(fm3130->client,
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FM3130_RTC_SECONDS + i,
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fm3130->regs[FM3130_RTC_SECONDS + i]);
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}
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fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
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/* We assume here that data are valid once written */
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if (!fm3130->data_valid)
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fm3130->data_valid = 1;
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return 0;
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}
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static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct fm3130 *fm3130 = dev_get_drvdata(dev);
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int tmp;
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struct rtc_time *tm = &alrm->time;
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2010-08-11 09:02:10 +08:00
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if (!fm3130->alarm_valid) {
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/*
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* We have invalid alarm in RTC, probably due to battery faults
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* or other problems. Return EIO for now, it will allow us to
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* set alarm value later instead of error during probing which
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* disables device
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*/
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return -EIO;
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}
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2008-06-13 06:21:55 +08:00
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/* read the RTC alarm registers all at once */
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tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
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&fm3130->msg[2], 2);
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if (tmp != 2) {
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dev_err(dev, "%s error %d\n", "read", tmp);
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return -EIO;
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}
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dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
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fm3130->regs[FM3130_ALARM_SECONDS],
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fm3130->regs[FM3130_ALARM_MINUTES],
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fm3130->regs[FM3130_ALARM_HOURS],
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fm3130->regs[FM3130_ALARM_DATE],
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fm3130->regs[FM3130_ALARM_MONTHS]);
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2008-10-19 11:28:41 +08:00
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tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
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tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
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tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
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tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
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tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
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2010-08-11 09:02:10 +08:00
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2008-06-13 06:21:55 +08:00
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if (tm->tm_mon > 0)
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tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
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2010-08-11 09:02:10 +08:00
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2008-06-13 06:21:55 +08:00
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dev_dbg(dev, "%s secs=%d, mins=%d, "
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"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
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"read alarm", tm->tm_sec, tm->tm_min,
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tm->tm_hour, tm->tm_mday,
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tm->tm_mon, tm->tm_year, tm->tm_wday);
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2010-08-11 09:02:10 +08:00
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|
/* check if alarm enabled */
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] =
|
|
|
|
|
i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
|
|
|
|
|
|
|
|
|
|
if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
|
|
|
|
|
(~fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
FM3130_RTC_CONTROL_BIT_CAL)) {
|
|
|
|
|
alrm->enabled = 1;
|
|
|
|
|
}
|
|
|
|
|
|
2008-06-13 06:21:55 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
|
|
|
|
{
|
|
|
|
|
struct fm3130 *fm3130 = dev_get_drvdata(dev);
|
|
|
|
|
struct rtc_time *tm = &alrm->time;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
dev_dbg(dev, "%s secs=%d, mins=%d, "
|
|
|
|
|
"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
|
|
|
|
|
"write alarm", tm->tm_sec, tm->tm_min,
|
|
|
|
|
tm->tm_hour, tm->tm_mday,
|
|
|
|
|
tm->tm_mon, tm->tm_year, tm->tm_wday);
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->regs[FM3130_ALARM_SECONDS] =
|
|
|
|
|
(tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->regs[FM3130_ALARM_MINUTES] =
|
|
|
|
|
(tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->regs[FM3130_ALARM_HOURS] =
|
|
|
|
|
(tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->regs[FM3130_ALARM_DATE] =
|
|
|
|
|
(tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->regs[FM3130_ALARM_MONTHS] =
|
|
|
|
|
(tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
|
|
|
|
|
fm3130->regs[FM3130_ALARM_SECONDS],
|
|
|
|
|
fm3130->regs[FM3130_ALARM_MINUTES],
|
|
|
|
|
fm3130->regs[FM3130_ALARM_HOURS],
|
|
|
|
|
fm3130->regs[FM3130_ALARM_DATE],
|
|
|
|
|
fm3130->regs[FM3130_ALARM_MONTHS]);
|
|
|
|
|
/* Writing time registers, we don't support multibyte transfers */
|
|
|
|
|
for (i = 0; i < FM3130_ALARM_REGS; i++) {
|
|
|
|
|
i2c_smbus_write_byte_data(fm3130->client,
|
|
|
|
|
FM3130_ALARM_SECONDS + i,
|
|
|
|
|
fm3130->regs[FM3130_ALARM_SECONDS + i]);
|
|
|
|
|
}
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] =
|
|
|
|
|
i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
|
2010-08-11 09:02:10 +08:00
|
|
|
|
|
|
|
|
/* enable or disable alarm */
|
2008-06-13 06:21:55 +08:00
|
|
|
if (alrm->enabled) {
|
|
|
|
|
i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
|
|
|
|
|
(fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_CAL)) |
|
|
|
|
|
FM3130_RTC_CONTROL_BIT_AEN);
|
|
|
|
|
} else {
|
|
|
|
|
i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] &
|
2010-08-11 09:02:10 +08:00
|
|
|
~(FM3130_RTC_CONTROL_BIT_CAL) &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_AEN));
|
2008-06-13 06:21:55 +08:00
|
|
|
}
|
2010-08-11 09:02:10 +08:00
|
|
|
|
|
|
|
|
/* We assume here that data is valid once written */
|
|
|
|
|
if (!fm3130->alarm_valid)
|
|
|
|
|
fm3130->alarm_valid = 1;
|
|
|
|
|
|
2008-06-13 06:21:55 +08:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
|
|
|
|
{
|
|
|
|
|
struct fm3130 *fm3130 = dev_get_drvdata(dev);
|
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] =
|
|
|
|
|
i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
|
|
|
|
|
|
|
|
|
|
dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
|
|
|
|
|
enabled, fm3130->regs[FM3130_RTC_CONTROL]);
|
|
|
|
|
|
|
|
|
|
switch (enabled) {
|
|
|
|
|
case 0: /* alarm off */
|
|
|
|
|
ret = i2c_smbus_write_byte_data(fm3130->client,
|
|
|
|
|
FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_CAL) &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_AEN));
|
|
|
|
|
break;
|
|
|
|
|
case 1: /* alarm on */
|
|
|
|
|
ret = i2c_smbus_write_byte_data(fm3130->client,
|
|
|
|
|
FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_CAL)) |
|
|
|
|
|
FM3130_RTC_CONTROL_BIT_AEN);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
ret = -EINVAL;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
2008-06-13 06:21:55 +08:00
|
|
|
static const struct rtc_class_ops fm3130_rtc_ops = {
|
|
|
|
|
.read_time = fm3130_get_time,
|
|
|
|
|
.set_time = fm3130_set_time,
|
|
|
|
|
.read_alarm = fm3130_read_alarm,
|
|
|
|
|
.set_alarm = fm3130_set_alarm,
|
2010-08-11 09:02:10 +08:00
|
|
|
.alarm_irq_enable = fm3130_alarm_irq_enable,
|
2008-06-13 06:21:55 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct i2c_driver fm3130_driver;
|
|
|
|
|
|
2012-12-22 05:09:38 +08:00
|
|
|
static int fm3130_probe(struct i2c_client *client,
|
|
|
|
|
const struct i2c_device_id *id)
|
2008-06-13 06:21:55 +08:00
|
|
|
{
|
|
|
|
|
struct fm3130 *fm3130;
|
|
|
|
|
int err = -ENODEV;
|
|
|
|
|
int tmp;
|
|
|
|
|
struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
|
|
|
|
|
|
|
|
|
|
if (!i2c_check_functionality(adapter,
|
|
|
|
|
I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
|
|
|
|
|
return -EIO;
|
|
|
|
|
|
2013-04-30 07:20:41 +08:00
|
|
|
fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
if (!fm3130)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
fm3130->client = client;
|
|
|
|
|
i2c_set_clientdata(client, fm3130);
|
|
|
|
|
fm3130->reg_addr_time = FM3130_RTC_SECONDS;
|
|
|
|
|
fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
|
|
|
|
|
|
|
|
|
|
/* Messages to read time */
|
|
|
|
|
fm3130->msg[0].addr = client->addr;
|
|
|
|
|
fm3130->msg[0].flags = 0;
|
|
|
|
|
fm3130->msg[0].len = 1;
|
|
|
|
|
fm3130->msg[0].buf = &fm3130->reg_addr_time;
|
|
|
|
|
|
|
|
|
|
fm3130->msg[1].addr = client->addr;
|
|
|
|
|
fm3130->msg[1].flags = I2C_M_RD;
|
|
|
|
|
fm3130->msg[1].len = FM3130_CLOCK_REGS;
|
|
|
|
|
fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
|
|
|
|
|
|
|
|
|
|
/* Messages to read alarm */
|
|
|
|
|
fm3130->msg[2].addr = client->addr;
|
|
|
|
|
fm3130->msg[2].flags = 0;
|
|
|
|
|
fm3130->msg[2].len = 1;
|
|
|
|
|
fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
|
|
|
|
|
|
|
|
|
|
fm3130->msg[3].addr = client->addr;
|
|
|
|
|
fm3130->msg[3].flags = I2C_M_RD;
|
|
|
|
|
fm3130->msg[3].len = FM3130_ALARM_REGS;
|
|
|
|
|
fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->alarm_valid = 0;
|
2008-06-13 06:21:55 +08:00
|
|
|
fm3130->data_valid = 0;
|
|
|
|
|
|
|
|
|
|
tmp = i2c_transfer(adapter, fm3130->msg, 4);
|
|
|
|
|
if (tmp != 4) {
|
2013-04-30 07:19:29 +08:00
|
|
|
dev_dbg(&client->dev, "read error %d\n", tmp);
|
2008-06-13 06:21:55 +08:00
|
|
|
err = -EIO;
|
|
|
|
|
goto exit_free;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] =
|
|
|
|
|
i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
|
|
|
|
|
fm3130->regs[FM3130_CAL_CONTROL] =
|
|
|
|
|
i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
|
|
|
|
|
|
|
|
|
|
/* Disabling calibration mode */
|
2010-02-03 05:43:59 +08:00
|
|
|
if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
|
2008-06-13 06:21:55 +08:00
|
|
|
i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_CAL));
|
|
|
|
|
dev_warn(&client->dev, "Disabling calibration mode!\n");
|
2010-02-03 05:43:59 +08:00
|
|
|
}
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
/* Disabling read and write modes */
|
|
|
|
|
if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
|
2010-02-03 05:43:59 +08:00
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
|
2008-06-13 06:21:55 +08:00
|
|
|
i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_READ |
|
|
|
|
|
FM3130_RTC_CONTROL_BIT_WRITE));
|
|
|
|
|
dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
|
2010-02-03 05:43:59 +08:00
|
|
|
}
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
/* oscillator off? turn it on, so clock can tick. */
|
|
|
|
|
if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
|
|
|
|
|
i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_CAL_CONTROL] &
|
|
|
|
|
~(FM3130_CAL_CONTROL_BIT_nOSCEN));
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
/* low battery? clear flag, and warn */
|
|
|
|
|
if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
|
|
|
|
|
i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~(FM3130_RTC_CONTROL_BIT_LB));
|
2008-06-13 06:21:55 +08:00
|
|
|
dev_warn(&client->dev, "Low battery!\n");
|
2010-08-11 09:02:10 +08:00
|
|
|
}
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
/* check if Power On Reset bit is set */
|
2008-06-13 06:21:55 +08:00
|
|
|
if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
|
|
|
|
|
i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
|
|
|
|
|
fm3130->regs[FM3130_RTC_CONTROL] &
|
|
|
|
|
~FM3130_RTC_CONTROL_BIT_POR);
|
2010-08-11 09:02:10 +08:00
|
|
|
dev_dbg(&client->dev, "POR bit is set\n");
|
2008-06-13 06:21:55 +08:00
|
|
|
}
|
|
|
|
|
/* ACS is controlled by alarm */
|
|
|
|
|
i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
/* alarm registers sanity check */
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
|
|
|
|
|
if (tmp > 59)
|
|
|
|
|
goto bad_alarm;
|
|
|
|
|
|
2008-10-19 11:28:41 +08:00
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
|
2010-08-11 09:02:10 +08:00
|
|
|
if (tmp > 59)
|
|
|
|
|
goto bad_alarm;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
|
|
|
|
|
if (tmp > 23)
|
|
|
|
|
goto bad_alarm;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2008-10-19 11:28:41 +08:00
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
|
2008-06-13 06:21:55 +08:00
|
|
|
if (tmp == 0 || tmp > 31)
|
2010-08-11 09:02:10 +08:00
|
|
|
goto bad_alarm;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2008-10-19 11:28:41 +08:00
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
|
2008-06-13 06:21:55 +08:00
|
|
|
if (tmp == 0 || tmp > 12)
|
2010-08-11 09:02:10 +08:00
|
|
|
goto bad_alarm;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
fm3130->alarm_valid = 1;
|
|
|
|
|
|
|
|
|
|
bad_alarm:
|
|
|
|
|
|
|
|
|
|
/* clock registers sanity chek */
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
|
|
|
|
|
if (tmp > 59)
|
|
|
|
|
goto bad_clock;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
|
|
|
|
|
if (tmp > 59)
|
|
|
|
|
goto bad_clock;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
|
|
|
|
|
if (tmp > 23)
|
|
|
|
|
goto bad_clock;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
|
|
|
|
|
if (tmp == 0 || tmp > 7)
|
|
|
|
|
goto bad_clock;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
|
|
|
|
|
if (tmp == 0 || tmp > 31)
|
|
|
|
|
goto bad_clock;
|
|
|
|
|
|
|
|
|
|
tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
|
|
|
|
|
if (tmp == 0 || tmp > 12)
|
|
|
|
|
goto bad_clock;
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
fm3130->data_valid = 1;
|
|
|
|
|
|
2010-08-11 09:02:10 +08:00
|
|
|
bad_clock:
|
|
|
|
|
|
|
|
|
|
if (!fm3130->data_valid || !fm3130->alarm_valid)
|
2013-02-22 08:44:22 +08:00
|
|
|
dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
|
|
|
|
|
fm3130->regs);
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
/* We won't bail out here because we just got invalid data.
|
|
|
|
|
Time setting from u-boot doesn't work anyway */
|
2013-04-30 07:20:41 +08:00
|
|
|
fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
|
2008-06-13 06:21:55 +08:00
|
|
|
&fm3130_rtc_ops, THIS_MODULE);
|
|
|
|
|
if (IS_ERR(fm3130->rtc)) {
|
|
|
|
|
err = PTR_ERR(fm3130->rtc);
|
|
|
|
|
dev_err(&client->dev,
|
|
|
|
|
"unable to register the class device\n");
|
|
|
|
|
goto exit_free;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
exit_free:
|
|
|
|
|
return err;
|
|
|
|
|
}
|
|
|
|
|
|
2012-12-22 05:09:38 +08:00
|
|
|
static int fm3130_remove(struct i2c_client *client)
|
2008-06-13 06:21:55 +08:00
|
|
|
{
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct i2c_driver fm3130_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "rtc-fm3130",
|
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
|
},
|
|
|
|
|
.probe = fm3130_probe,
|
2012-12-22 05:09:38 +08:00
|
|
|
.remove = fm3130_remove,
|
2008-06-13 06:21:55 +08:00
|
|
|
.id_table = fm3130_id,
|
|
|
|
|
};
|
|
|
|
|
|
2012-03-24 06:02:31 +08:00
|
|
|
module_i2c_driver(fm3130_driver);
|
2008-06-13 06:21:55 +08:00
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("RTC driver for FM3130");
|
|
|
|
|
MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|