2009-05-29 01:56:16 +08:00
|
|
|
/*
|
|
|
|
* OMAP2/3 Power Management Routines
|
|
|
|
*
|
|
|
|
* Copyright (C) 2008 Nokia Corporation
|
|
|
|
* Jouni Hogander
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*/
|
|
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
|
|
|
|
#define __ARCH_ARM_MACH_OMAP2_PM_H
|
|
|
|
|
2010-05-30 00:32:23 +08:00
|
|
|
#include <linux/err.h>
|
|
|
|
|
2010-12-22 12:05:16 +08:00
|
|
|
#include "powerdomain.h"
|
2008-10-15 23:13:48 +08:00
|
|
|
|
2008-10-13 18:15:00 +08:00
|
|
|
extern void *omap3_secure_ram_storage;
|
2009-10-07 05:25:09 +08:00
|
|
|
extern void omap3_pm_off_mode_enable(int);
|
2008-10-08 20:00:58 +08:00
|
|
|
extern void omap_sram_idle(void);
|
2008-10-08 20:01:22 +08:00
|
|
|
extern int omap3_can_sleep(void);
|
2010-09-15 03:34:01 +08:00
|
|
|
extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
|
2008-09-26 16:04:20 +08:00
|
|
|
extern int omap3_idle_init(void);
|
2008-10-13 18:15:00 +08:00
|
|
|
|
2010-12-09 23:13:46 +08:00
|
|
|
#if defined(CONFIG_PM_OPP)
|
|
|
|
extern int omap3_opp_init(void);
|
2010-12-09 23:13:47 +08:00
|
|
|
extern int omap4_opp_init(void);
|
2010-12-09 23:13:46 +08:00
|
|
|
#else
|
|
|
|
static inline int omap3_opp_init(void)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2010-12-09 23:13:47 +08:00
|
|
|
static inline int omap4_opp_init(void)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2010-12-09 23:13:46 +08:00
|
|
|
#endif
|
|
|
|
|
2011-05-09 18:02:13 +08:00
|
|
|
/*
|
|
|
|
* cpuidle mach specific parameters
|
|
|
|
*
|
|
|
|
* The board code can override the default C-states definition using
|
|
|
|
* omap3_pm_init_cpuidle
|
|
|
|
*/
|
2009-12-16 08:37:18 +08:00
|
|
|
struct cpuidle_params {
|
2011-05-09 18:02:13 +08:00
|
|
|
u32 exit_latency; /* exit_latency = sleep + wake-up latencies */
|
|
|
|
u32 target_residency;
|
|
|
|
u8 valid; /* validates the C-state */
|
2009-12-16 08:37:18 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
|
|
|
|
extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
|
|
|
|
#else
|
|
|
|
static
|
|
|
|
inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-11-26 18:26:24 +08:00
|
|
|
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
|
|
|
|
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
|
|
|
|
|
2009-10-07 05:30:23 +08:00
|
|
|
extern u32 wakeup_timer_seconds;
|
2010-03-23 15:04:59 +08:00
|
|
|
extern u32 wakeup_timer_milliseconds;
|
2009-10-07 05:30:23 +08:00
|
|
|
extern struct omap_dm_timer *gptimer_wakeup;
|
|
|
|
|
2009-05-29 01:56:16 +08:00
|
|
|
#ifdef CONFIG_PM_DEBUG
|
|
|
|
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
2010-09-15 03:33:59 +08:00
|
|
|
extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
|
2009-05-29 01:56:16 +08:00
|
|
|
extern int omap2_pm_debug;
|
2010-09-28 05:04:20 +08:00
|
|
|
extern u32 enable_off_mode;
|
|
|
|
extern u32 sleep_while_idle;
|
2009-11-16 22:46:52 +08:00
|
|
|
#else
|
|
|
|
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
2010-09-15 03:33:59 +08:00
|
|
|
#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
|
2009-11-16 22:46:52 +08:00
|
|
|
#define omap2_pm_debug 0
|
2010-09-28 05:04:20 +08:00
|
|
|
#define enable_off_mode 0
|
|
|
|
#define sleep_while_idle 0
|
2009-11-16 22:46:52 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
2008-10-15 23:13:48 +08:00
|
|
|
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
2008-10-29 19:31:24 +08:00
|
|
|
extern int pm_dbg_regset_save(int reg_set);
|
|
|
|
extern int pm_dbg_regset_init(int reg_set);
|
2009-05-29 01:56:16 +08:00
|
|
|
#else
|
2008-10-15 23:13:48 +08:00
|
|
|
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
2008-10-29 19:31:24 +08:00
|
|
|
#define pm_dbg_regset_save(reg_set) do {} while (0);
|
|
|
|
#define pm_dbg_regset_init(reg_set) do {} while (0);
|
2009-05-29 01:56:16 +08:00
|
|
|
#endif /* CONFIG_PM_DEBUG */
|
|
|
|
|
|
|
|
extern void omap24xx_idle_loop_suspend(void);
|
|
|
|
|
|
|
|
extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
|
|
|
|
void __iomem *sdrc_power);
|
|
|
|
extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
|
2011-02-02 23:38:06 +08:00
|
|
|
extern int save_secure_ram_context(u32 *addr);
|
2008-10-13 18:15:00 +08:00
|
|
|
extern void omap3_save_scratchpad_contents(void);
|
2009-05-29 01:56:16 +08:00
|
|
|
|
|
|
|
extern unsigned int omap24xx_idle_loop_suspend_sz;
|
|
|
|
extern unsigned int save_secure_ram_context_sz;
|
|
|
|
extern unsigned int omap24xx_cpu_suspend_sz;
|
|
|
|
extern unsigned int omap34xx_cpu_suspend_sz;
|
|
|
|
|
2010-12-21 04:05:06 +08:00
|
|
|
#define PM_RTA_ERRATUM_i608 (1 << 0)
|
2010-12-21 04:05:09 +08:00
|
|
|
#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
|
2010-12-21 04:05:06 +08:00
|
|
|
|
2010-12-21 04:05:05 +08:00
|
|
|
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
|
|
|
|
extern u16 pm34xx_errata;
|
|
|
|
#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
|
2010-12-21 04:05:07 +08:00
|
|
|
extern void enable_omap3630_toggle_l2_on_restore(void);
|
2010-12-21 04:05:05 +08:00
|
|
|
#else
|
|
|
|
#define IS_PM34XX_ERRATUM(id) 0
|
2010-12-21 04:05:07 +08:00
|
|
|
static inline void enable_omap3630_toggle_l2_on_restore(void) { }
|
2010-12-21 04:05:05 +08:00
|
|
|
#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
|
|
|
|
|
2010-05-30 00:32:23 +08:00
|
|
|
#ifdef CONFIG_OMAP_SMARTREFLEX
|
|
|
|
extern int omap_devinit_smartreflex(void);
|
|
|
|
extern void omap_enable_smartreflex_on_init(void);
|
|
|
|
#else
|
|
|
|
static inline int omap_devinit_smartreflex(void)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void omap_enable_smartreflex_on_init(void) {}
|
|
|
|
#endif
|
|
|
|
|
2010-12-11 01:21:05 +08:00
|
|
|
#ifdef CONFIG_TWL4030_CORE
|
|
|
|
extern int omap3_twl_init(void);
|
2010-12-11 01:45:16 +08:00
|
|
|
extern int omap4_twl_init(void);
|
2011-02-15 15:58:58 +08:00
|
|
|
extern int omap3_twl_set_sr_bit(bool enable);
|
2010-12-11 01:21:05 +08:00
|
|
|
#else
|
|
|
|
static inline int omap3_twl_init(void)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2010-12-11 01:45:16 +08:00
|
|
|
static inline int omap4_twl_init(void)
|
|
|
|
{
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2010-12-11 01:21:05 +08:00
|
|
|
#endif
|
|
|
|
|
2009-05-29 01:56:16 +08:00
|
|
|
#endif
|