2015-04-30 18:45:38 +08:00
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/*
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* FPU signal frame handling routines.
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*/
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#include <linux/compat.h>
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#include <linux/cpu.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/signal.h>
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#include <asm/fpu/regset.h>
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2016-05-21 01:47:08 +08:00
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#include <asm/fpu/xstate.h>
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2015-04-30 18:45:38 +08:00
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#include <asm/sigframe.h>
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2016-06-02 01:42:20 +08:00
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#include <asm/trace/fpu.h>
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2015-04-30 18:45:38 +08:00
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static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
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/*
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* Check for the presence of extended state information in the
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* user fpstate pointer in the sigcontext.
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*/
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2015-04-30 23:15:32 +08:00
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static inline int check_for_xstate(struct fxregs_state __user *buf,
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2015-04-30 18:45:38 +08:00
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void __user *fpstate,
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struct _fpx_sw_bytes *fx_sw)
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{
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2015-04-30 23:15:32 +08:00
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int min_xstate_size = sizeof(struct fxregs_state) +
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2015-04-30 18:45:38 +08:00
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sizeof(struct xstate_header);
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unsigned int magic2;
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if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
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return -1;
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/* Check for the first magic field and other error scenarios. */
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if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
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fx_sw->xstate_size < min_xstate_size ||
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2016-05-21 01:47:05 +08:00
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fx_sw->xstate_size > fpu_user_xstate_size ||
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2015-04-30 18:45:38 +08:00
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fx_sw->xstate_size > fx_sw->extended_size)
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return -1;
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/*
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* Check for the presence of second magic word at the end of memory
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* layout. This detects the case where the user just copied the legacy
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* fpstate layout with out copying the extended state information
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* in the memory layout.
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*/
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if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
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|| magic2 != FP_XSTATE_MAGIC2)
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return -1;
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return 0;
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}
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/*
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* Signal frame handlers.
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*/
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static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
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{
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if (use_fxsr()) {
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2015-04-30 23:15:32 +08:00
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struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
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2015-04-30 18:45:38 +08:00
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struct user_i387_ia32_struct env;
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2015-09-05 15:32:36 +08:00
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struct _fpstate_32 __user *fp = buf;
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2015-04-30 18:45:38 +08:00
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convert_from_fxsr(&env, tsk);
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if (__copy_to_user(buf, &env, sizeof(env)) ||
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__put_user(xsave->i387.swd, &fp->status) ||
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__put_user(X86_FXSR_MAGIC, &fp->magic))
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return -1;
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} else {
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2015-04-30 23:15:32 +08:00
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struct fregs_state __user *fp = buf;
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2015-04-30 18:45:38 +08:00
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u32 swd;
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if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
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return -1;
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}
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return 0;
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}
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static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
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{
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2015-04-30 23:15:32 +08:00
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struct xregs_state __user *x = buf;
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2015-04-30 18:45:38 +08:00
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struct _fpx_sw_bytes *sw_bytes;
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u32 xfeatures;
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int err;
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/* Setup the bytes not touched by the [f]xsave and reserved for SW. */
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sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
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err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
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if (!use_xsave())
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return err;
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2016-05-21 01:47:05 +08:00
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err |= __put_user(FP_XSTATE_MAGIC2,
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(__u32 *)(buf + fpu_user_xstate_size));
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2015-04-30 18:45:38 +08:00
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/*
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* Read the xfeatures which we copied (directly from the cpu or
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* from the state in task struct) to the user buffers.
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*/
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err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures);
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/*
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* For legacy compatible, we always set FP/SSE bits in the bit
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* vector while saving the state to the user context. This will
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* enable us capturing any changes(during sigreturn) to
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* the FP/SSE bits by the legacy applications which don't touch
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* xfeatures in the xsave header.
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*
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* xsave aware apps can change the xfeatures in the xsave
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* header as well as change any contents in the memory layout.
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* xrestore as part of sigreturn will capture all the changes.
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*/
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2015-09-03 07:31:26 +08:00
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xfeatures |= XFEATURE_MASK_FPSSE;
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2015-04-30 18:45:38 +08:00
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err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures);
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return err;
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}
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2015-04-30 23:15:32 +08:00
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static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)
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2015-04-30 18:45:38 +08:00
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{
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int err;
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if (use_xsave())
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err = copy_xregs_to_user(buf);
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else if (use_fxsr())
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2015-04-30 23:15:32 +08:00
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err = copy_fxregs_to_user((struct fxregs_state __user *) buf);
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2015-04-30 18:45:38 +08:00
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else
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2015-04-30 23:15:32 +08:00
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err = copy_fregs_to_user((struct fregs_state __user *) buf);
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2015-04-30 18:45:38 +08:00
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2016-05-21 01:47:05 +08:00
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if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size))
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2015-04-30 18:45:38 +08:00
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err = -EFAULT;
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return err;
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}
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/*
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* Save the fpu, extended register state to the user signal frame.
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*
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* 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
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* state is copied.
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* 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
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*
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* buf == buf_fx for 64-bit frames and 32-bit fsave frame.
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* buf != buf_fx for 32-bit frames with fxstate.
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*
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* If the fpu, extended register state is live, save the state directly
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* to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,
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* copy the thread's fpu state to the user frame starting at 'buf_fx'.
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*
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* If this is a 32-bit frame with fxstate, put a fsave header before
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* the aligned state at 'buf_fx'.
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*
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* For [f]xsave state, update the SW reserved fields in the [f]xsave frame
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* indicating the absence/presence of the extended state to the user.
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*/
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int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
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{
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2015-04-30 23:15:32 +08:00
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struct xregs_state *xsave = ¤t->thread.fpu.state.xsave;
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2015-04-30 18:45:38 +08:00
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struct task_struct *tsk = current;
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int ia32_fxstate = (buf != buf_fx);
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ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
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config_enabled(CONFIG_IA32_EMULATION));
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if (!access_ok(VERIFY_WRITE, buf, size))
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return -EACCES;
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if (!static_cpu_has(X86_FEATURE_FPU))
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return fpregs_soft_get(current, NULL, 0,
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sizeof(struct user_i387_ia32_struct), NULL,
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2015-09-05 15:32:36 +08:00
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(struct _fpstate_32 __user *) buf) ? -1 : 1;
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2015-04-30 18:45:38 +08:00
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2016-05-21 01:47:08 +08:00
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if (fpregs_active() || using_compacted_format()) {
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2015-04-30 18:45:38 +08:00
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/* Save the live register state to the user directly. */
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if (copy_fpregs_to_sigframe(buf_fx))
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return -1;
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/* Update the thread's fxstate to save the fsave header. */
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if (ia32_fxstate)
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copy_fxregs_to_kernel(&tsk->thread.fpu);
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} else {
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2016-05-21 01:47:05 +08:00
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/*
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* It is a *bug* if kernel uses compacted-format for xsave
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* area and we copy it out directly to a signal frame. It
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* should have been handled above by saving the registers
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* directly.
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*/
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if (boot_cpu_has(X86_FEATURE_XSAVES)) {
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WARN_ONCE(1, "x86/fpu: saving compacted-format xsave area to a signal frame!\n");
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return -1;
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}
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2015-04-30 18:45:38 +08:00
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fpstate_sanitize_xstate(&tsk->thread.fpu);
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2016-05-21 01:47:05 +08:00
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if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size))
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2015-04-30 18:45:38 +08:00
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return -1;
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}
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/* Save the fsave header for the 32-bit frames. */
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if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
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return -1;
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if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
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return -1;
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return 0;
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}
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static inline void
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sanitize_restored_xstate(struct task_struct *tsk,
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struct user_i387_ia32_struct *ia32_env,
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u64 xfeatures, int fx_only)
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{
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2015-04-30 23:15:32 +08:00
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struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
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2015-04-30 18:45:38 +08:00
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struct xstate_header *header = &xsave->header;
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if (use_xsave()) {
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/* These bits must be zero. */
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memset(header->reserved, 0, 48);
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/*
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* Init the state that is not present in the memory
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* layout and not enabled by the OS.
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*/
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if (fx_only)
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2015-09-03 07:31:26 +08:00
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header->xfeatures = XFEATURE_MASK_FPSSE;
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2015-04-30 18:45:38 +08:00
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else
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header->xfeatures &= (xfeatures_mask & xfeatures);
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}
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if (use_fxsr()) {
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/*
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* mscsr reserved bits must be masked to zero for security
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* reasons.
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*/
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xsave->i387.mxcsr &= mxcsr_feature_mask;
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convert_to_fxsr(tsk, ia32_env);
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}
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}
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/*
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* Restore the extended state if present. Otherwise, restore the FP/SSE state.
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*/
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static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only)
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{
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if (use_xsave()) {
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if ((unsigned long)buf % 64 || fx_only) {
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2015-09-03 07:31:26 +08:00
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u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE;
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2015-04-30 18:45:38 +08:00
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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return copy_user_to_fxregs(buf);
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} else {
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u64 init_bv = xfeatures_mask & ~xbv;
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if (unlikely(init_bv))
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copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
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return copy_user_to_xregs(buf, xbv);
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}
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} else if (use_fxsr()) {
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return copy_user_to_fxregs(buf);
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} else
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return copy_user_to_fregs(buf);
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}
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static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
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{
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int ia32_fxstate = (buf != buf_fx);
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struct task_struct *tsk = current;
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struct fpu *fpu = &tsk->thread.fpu;
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2016-05-21 01:47:06 +08:00
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int state_size = fpu_kernel_xstate_size;
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2015-04-30 18:45:38 +08:00
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u64 xfeatures = 0;
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int fx_only = 0;
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ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
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config_enabled(CONFIG_IA32_EMULATION));
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if (!buf) {
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fpu__clear(fpu);
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return 0;
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}
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if (!access_ok(VERIFY_READ, buf, size))
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return -EACCES;
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fpu__activate_curr(fpu);
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if (!static_cpu_has(X86_FEATURE_FPU))
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return fpregs_soft_set(current, NULL,
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0, sizeof(struct user_i387_ia32_struct),
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NULL, buf) != 0;
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if (use_xsave()) {
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struct _fpx_sw_bytes fx_sw_user;
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if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
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/*
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* Couldn't find the extended state information in the
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* memory layout. Restore just the FP/SSE and init all
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* the other extended state.
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*/
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2015-04-30 23:15:32 +08:00
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state_size = sizeof(struct fxregs_state);
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2015-04-30 18:45:38 +08:00
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fx_only = 1;
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2016-06-02 01:42:20 +08:00
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trace_x86_fpu_xstate_check_failed(fpu);
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2015-04-30 18:45:38 +08:00
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} else {
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state_size = fx_sw_user.xstate_size;
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xfeatures = fx_sw_user.xfeatures;
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}
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}
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if (ia32_fxstate) {
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/*
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* For 32-bit frames with fxstate, copy the user state to the
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* thread's fpu state, reconstruct fxstate from the fsave
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* header. Sanitize the copied state etc.
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*/
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struct fpu *fpu = &tsk->thread.fpu;
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struct user_i387_ia32_struct env;
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int err = 0;
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/*
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* Drop the current fpu which clears fpu->fpstate_active. This ensures
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* that any context-switch during the copy of the new state,
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* avoids the intermediate state from getting restored/saved.
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* Thus avoiding the new restored state from getting corrupted.
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* We will be ready to restore/save the state only after
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* fpu->fpstate_active is again set.
|
|
|
|
*/
|
|
|
|
fpu__drop(fpu);
|
|
|
|
|
|
|
|
if (__copy_from_user(&fpu->state.xsave, buf_fx, state_size) ||
|
|
|
|
__copy_from_user(&env, buf, sizeof(env))) {
|
|
|
|
fpstate_init(&fpu->state);
|
2016-06-02 01:42:20 +08:00
|
|
|
trace_x86_fpu_init_state(fpu);
|
2015-04-30 18:45:38 +08:00
|
|
|
err = -1;
|
|
|
|
} else {
|
|
|
|
sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
|
|
|
|
}
|
|
|
|
|
|
|
|
fpu->fpstate_active = 1;
|
|
|
|
if (use_eager_fpu()) {
|
|
|
|
preempt_disable();
|
2015-05-04 17:49:58 +08:00
|
|
|
fpu__restore(fpu);
|
2015-04-30 18:45:38 +08:00
|
|
|
preempt_enable();
|
|
|
|
}
|
|
|
|
|
|
|
|
return err;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* For 64-bit frames and 32-bit fsave frames, restore the user
|
|
|
|
* state to the registers directly (with exceptions handled).
|
|
|
|
*/
|
|
|
|
user_fpu_begin();
|
|
|
|
if (copy_user_to_fpregs_zeroing(buf_fx, xfeatures, fx_only)) {
|
|
|
|
fpu__clear(fpu);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int xstate_sigframe_size(void)
|
|
|
|
{
|
2016-05-21 01:47:05 +08:00
|
|
|
return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE :
|
|
|
|
fpu_user_xstate_size;
|
2015-04-30 18:45:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore FPU state from a sigframe:
|
|
|
|
*/
|
|
|
|
int fpu__restore_sig(void __user *buf, int ia32_frame)
|
|
|
|
{
|
|
|
|
void __user *buf_fx = buf;
|
|
|
|
int size = xstate_sigframe_size();
|
|
|
|
|
|
|
|
if (ia32_frame && use_fxsr()) {
|
2015-04-30 23:15:32 +08:00
|
|
|
buf_fx = buf + sizeof(struct fregs_state);
|
|
|
|
size += sizeof(struct fregs_state);
|
2015-04-30 18:45:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return __fpu__restore_sig(buf, buf_fx, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned long
|
|
|
|
fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
|
|
|
|
unsigned long *buf_fx, unsigned long *size)
|
|
|
|
{
|
|
|
|
unsigned long frame_size = xstate_sigframe_size();
|
|
|
|
|
|
|
|
*buf_fx = sp = round_down(sp - frame_size, 64);
|
|
|
|
if (ia32_frame && use_fxsr()) {
|
2015-04-30 23:15:32 +08:00
|
|
|
frame_size += sizeof(struct fregs_state);
|
|
|
|
sp -= sizeof(struct fregs_state);
|
2015-04-30 18:45:38 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
*size = frame_size;
|
|
|
|
|
|
|
|
return sp;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Prepare the SW reserved portion of the fxsave memory layout, indicating
|
|
|
|
* the presence of the extended state information in the memory layout
|
|
|
|
* pointed by the fpstate pointer in the sigcontext.
|
|
|
|
* This will be saved when ever the FP and extended state context is
|
|
|
|
* saved on the user stack during the signal handler delivery to the user.
|
|
|
|
*/
|
|
|
|
void fpu__init_prepare_fx_sw_frame(void)
|
|
|
|
{
|
2016-05-21 01:47:05 +08:00
|
|
|
int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE;
|
2015-04-30 18:45:38 +08:00
|
|
|
|
|
|
|
fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
|
|
|
|
fx_sw_reserved.extended_size = size;
|
|
|
|
fx_sw_reserved.xfeatures = xfeatures_mask;
|
2016-05-21 01:47:05 +08:00
|
|
|
fx_sw_reserved.xstate_size = fpu_user_xstate_size;
|
2015-04-30 18:45:38 +08:00
|
|
|
|
2015-11-11 08:23:54 +08:00
|
|
|
if (config_enabled(CONFIG_IA32_EMULATION) ||
|
|
|
|
config_enabled(CONFIG_X86_32)) {
|
|
|
|
int fsave_header_size = sizeof(struct fregs_state);
|
|
|
|
|
2015-04-30 18:45:38 +08:00
|
|
|
fx_sw_reserved_ia32 = fx_sw_reserved;
|
2015-11-11 08:23:54 +08:00
|
|
|
fx_sw_reserved_ia32.extended_size = size + fsave_header_size;
|
2015-04-30 18:45:38 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|