2008-10-23 13:26:29 +08:00
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#ifndef _ASM_X86_PARAVIRT_H
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#define _ASM_X86_PARAVIRT_H
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2006-12-07 09:14:07 +08:00
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/* Various instructions on x86 need to be replaced for
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* para-virtualization: those hooks are defined here. */
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[PATCH] i386: PARAVIRT: Hooks to set up initial pagetable
This patch introduces paravirt_ops hooks to control how the kernel's
initial pagetable is set up.
In the case of a native boot, the very early bootstrap code creates a
simple non-PAE pagetable to map the kernel and physical memory. When
the VM subsystem is initialized, it creates a proper pagetable which
respects the PAE mode, large pages, etc.
When booting under a hypervisor, there are many possibilities for what
paging environment the hypervisor establishes for the guest kernel, so
the constructon of the kernel's pagetable depends on the hypervisor.
In the case of Xen, the hypervisor boots the kernel with a fully
constructed pagetable, which is already using PAE if necessary. Also,
Xen requires particular care when constructing pagetables to make sure
all pagetables are always mapped read-only.
In order to make this easier, kernel's initial pagetable construction
has been changed to only allocate and initialize a pagetable page if
there's no page already present in the pagetable. This allows the Xen
paravirt backend to make a copy of the hypervisor-provided pagetable,
allowing the kernel to establish any more mappings it needs while
keeping the existing ones.
A slightly subtle point which is worth highlighting here is that Xen
requires all kernel mappings to share the same pte_t pages between all
pagetables, so that updating a kernel page's mapping in one pagetable
is reflected in all other pagetables. This makes it possible to
allocate a page and attach it to a pagetable without having to
explicitly enumerate that page's mapping in all pagetables.
And:
+From: "Eric W. Biederman" <ebiederm@xmission.com>
If we don't set the leaf page table entries it is quite possible that
will inherit and incorrect page table entry from the initial boot
page table setup in head.S. So we need to redo the effort here,
so we pick up PSE, PGE and the like.
Hypervisors like Xen require that their page tables be read-only,
which is slightly incompatible with our low identity mappings, however
I discussed this with Jeremy he has modified the Xen early set_pte
function to avoid problems in this area.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: William Irwin <bill.irwin@oracle.com>
Cc: Ingo Molnar <mingo@elte.hu>
2007-05-03 01:27:13 +08:00
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#ifdef CONFIG_PARAVIRT
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2009-02-12 02:20:05 +08:00
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#include <asm/pgtable_types.h>
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2008-01-30 20:32:06 +08:00
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#include <asm/asm.h>
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2006-12-07 09:14:07 +08:00
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2009-04-15 05:29:44 +08:00
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#include <asm/paravirt_types.h>
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x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
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2006-12-07 09:14:07 +08:00
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#ifndef __ASSEMBLY__
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2011-11-24 09:12:59 +08:00
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#include <linux/bug.h>
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2007-05-03 01:27:13 +08:00
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#include <linux/types.h>
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2007-05-03 01:27:15 +08:00
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#include <linux/cpumask.h>
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2007-05-03 01:27:15 +08:00
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2007-05-03 01:27:14 +08:00
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static inline int paravirt_enabled(void)
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{
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2007-10-17 02:51:29 +08:00
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return pv_info.paravirt_enabled;
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2008-01-30 20:31:02 +08:00
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static inline void load_sp0(struct tss_struct *tss,
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2006-12-07 09:14:07 +08:00
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struct thread_struct *thread)
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{
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2008-01-30 20:31:02 +08:00
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PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
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2006-12-07 09:14:07 +08:00
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}
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/* The paravirtualized CPUID instruction. */
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static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
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2006-12-07 09:14:07 +08:00
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}
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/*
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* These special macros can be used to get or set a debugging register
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*/
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2007-05-03 01:27:14 +08:00
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static inline unsigned long paravirt_get_debugreg(int reg)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
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2007-05-03 01:27:14 +08:00
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}
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#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
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static inline void set_debugreg(unsigned long val, int reg)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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static inline void clts(void)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL0(pv_cpu_ops.clts);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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static inline unsigned long read_cr0(void)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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static inline void write_cr0(unsigned long x)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
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2007-05-03 01:27:14 +08:00
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}
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static inline unsigned long read_cr2(void)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
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2007-05-03 01:27:14 +08:00
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}
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static inline void write_cr2(unsigned long x)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
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2007-05-03 01:27:14 +08:00
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}
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static inline unsigned long read_cr3(void)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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static inline void write_cr3(unsigned long x)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2014-10-25 06:58:08 +08:00
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static inline unsigned long __read_cr4(void)
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2007-05-03 01:27:14 +08:00
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
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2007-05-03 01:27:14 +08:00
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}
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2014-10-25 06:58:08 +08:00
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static inline unsigned long __read_cr4_safe(void)
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2007-05-03 01:27:14 +08:00
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2014-10-25 06:58:08 +08:00
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static inline void __write_cr4(unsigned long x)
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2007-05-03 01:27:14 +08:00
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
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2007-05-03 01:27:14 +08:00
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}
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2007-05-03 01:27:13 +08:00
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2008-01-30 20:33:19 +08:00
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#ifdef CONFIG_X86_64
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2008-01-30 20:33:19 +08:00
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static inline unsigned long read_cr8(void)
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{
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
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}
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static inline void write_cr8(unsigned long x)
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{
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PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
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}
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2008-01-30 20:33:19 +08:00
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#endif
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2008-01-30 20:33:19 +08:00
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2010-10-07 21:08:55 +08:00
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static inline void arch_safe_halt(void)
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2006-12-07 09:14:07 +08:00
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL0(pv_irq_ops.safe_halt);
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2006-12-07 09:14:07 +08:00
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}
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static inline void halt(void)
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{
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2010-12-14 00:51:57 +08:00
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PVOP_VCALL0(pv_irq_ops.halt);
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2007-05-03 01:27:14 +08:00
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}
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static inline void wbinvd(void)
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{
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2007-10-17 02:51:29 +08:00
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PVOP_VCALL0(pv_cpu_ops.wbinvd);
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2006-12-07 09:14:07 +08:00
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}
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2007-10-17 02:51:29 +08:00
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#define get_kernel_rpl() (pv_info.kernel_rpl)
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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static inline u64 paravirt_read_msr(unsigned msr, int *err)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
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2007-05-03 01:27:14 +08:00
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}
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2009-08-31 15:50:09 +08:00
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2007-05-03 01:27:14 +08:00
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static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
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2007-05-03 01:27:14 +08:00
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}
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2007-05-03 01:27:10 +08:00
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/* These should all do BUG_ON(_err), but our headers are too tangled. */
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2008-03-23 16:03:00 +08:00
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#define rdmsr(msr, val1, val2) \
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do { \
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2007-05-03 01:27:14 +08:00
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int _err; \
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u64 _l = paravirt_read_msr(msr, &_err); \
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val1 = (u32)_l; \
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val2 = _l >> 32; \
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2008-03-23 16:03:00 +08:00
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} while (0)
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2006-12-07 09:14:07 +08:00
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2008-03-23 16:03:00 +08:00
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#define wrmsr(msr, val1, val2) \
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do { \
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2007-05-03 01:27:14 +08:00
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paravirt_write_msr(msr, val1, val2); \
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2008-03-23 16:03:00 +08:00
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} while (0)
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2006-12-07 09:14:07 +08:00
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2008-03-23 16:03:00 +08:00
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#define rdmsrl(msr, val) \
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do { \
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2007-05-03 01:27:14 +08:00
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int _err; \
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val = paravirt_read_msr(msr, &_err); \
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2008-03-23 16:03:00 +08:00
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} while (0)
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2006-12-07 09:14:07 +08:00
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2008-03-23 16:03:00 +08:00
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#define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
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#define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
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2006-12-07 09:14:07 +08:00
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/* rdmsr with exception handling */
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2008-03-23 16:03:00 +08:00
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#define rdmsr_safe(msr, a, b) \
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({ \
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2007-05-03 01:27:14 +08:00
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int _err; \
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u64 _l = paravirt_read_msr(msr, &_err); \
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(*a) = (u32)_l; \
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(*b) = _l >> 32; \
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2008-03-23 16:03:00 +08:00
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_err; \
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})
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2006-12-07 09:14:07 +08:00
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2008-03-22 17:59:28 +08:00
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static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
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{
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int err;
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*p = paravirt_read_msr(msr, &err);
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return err;
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}
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2009-08-31 15:50:10 +08:00
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2007-05-03 01:27:14 +08:00
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static inline u64 paravirt_read_tsc(void)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2008-03-23 16:03:00 +08:00
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#define rdtscl(low) \
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do { \
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2007-05-03 01:27:14 +08:00
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u64 _l = paravirt_read_tsc(); \
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low = (int)_l; \
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2008-03-23 16:03:00 +08:00
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} while (0)
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2006-12-07 09:14:07 +08:00
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2007-05-03 01:27:14 +08:00
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#define rdtscll(val) (val = paravirt_read_tsc())
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2006-12-07 09:14:07 +08:00
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2007-07-18 09:37:04 +08:00
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static inline unsigned long long paravirt_sched_clock(void)
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{
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2007-10-17 02:51:29 +08:00
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return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
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2007-07-18 09:37:04 +08:00
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}
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2007-03-05 16:30:35 +08:00
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2012-02-24 15:31:31 +08:00
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struct static_key;
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extern struct static_key paravirt_steal_enabled;
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extern struct static_key paravirt_steal_rq_enabled;
|
2011-07-12 03:28:15 +08:00
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static inline u64 paravirt_steal_clock(int cpu)
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{
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return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
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}
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2007-05-03 01:27:14 +08:00
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static inline unsigned long long paravirt_read_pmc(int counter)
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{
|
2007-10-17 02:51:29 +08:00
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return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
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2007-05-03 01:27:14 +08:00
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}
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2006-12-07 09:14:07 +08:00
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2008-03-23 16:03:00 +08:00
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#define rdpmc(counter, low, high) \
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do { \
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2007-05-03 01:27:14 +08:00
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u64 _l = paravirt_read_pmc(counter); \
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low = (u32)_l; \
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high = _l >> 32; \
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2008-03-23 16:03:00 +08:00
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} while (0)
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2007-05-03 01:27:13 +08:00
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2012-06-06 08:56:50 +08:00
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#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
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2008-01-30 20:32:05 +08:00
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static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
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{
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|
return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
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|
}
|
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|
#define rdtscp(low, high, aux) \
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do { \
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int __aux; \
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|
unsigned long __val = paravirt_rdtscp(&__aux); \
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(low) = (u32)__val; \
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(high) = (u32)(__val >> 32); \
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(aux) = __aux; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define rdtscpll(val, aux) \
|
|
|
|
do { \
|
|
|
|
unsigned long __aux; \
|
|
|
|
val = paravirt_rdtscp(&__aux); \
|
|
|
|
(aux) = __aux; \
|
|
|
|
} while (0)
|
|
|
|
|
2008-07-24 05:21:18 +08:00
|
|
|
static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
|
|
|
|
}
|
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void load_TR_desc(void)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:12 +08:00
|
|
|
static inline void load_gdt(const struct desc_ptr *dtr)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:12 +08:00
|
|
|
static inline void load_idt(const struct desc_ptr *dtr)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
static inline void set_ldt(const void *addr, unsigned entries)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:12 +08:00
|
|
|
static inline void store_idt(struct desc_ptr *dtr)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
static inline unsigned long paravirt_store_tr(void)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
#define store_tr(tr) ((tr) = paravirt_store_tr())
|
|
|
|
static inline void load_TLS(struct thread_struct *t, unsigned cpu)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:13 +08:00
|
|
|
|
2008-06-25 12:19:32 +08:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
static inline void load_gs_index(unsigned int gs)
|
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-01-30 20:31:13 +08:00
|
|
|
static inline void write_ldt_entry(struct desc_struct *dt, int entry,
|
|
|
|
const void *desc)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-01-30 20:31:13 +08:00
|
|
|
PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:13 +08:00
|
|
|
|
|
|
|
static inline void write_gdt_entry(struct desc_struct *dt, int entry,
|
|
|
|
void *desc, int type)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-01-30 20:31:13 +08:00
|
|
|
PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-01-30 20:31:13 +08:00
|
|
|
|
2008-01-30 20:31:12 +08:00
|
|
|
static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-01-30 20:31:12 +08:00
|
|
|
PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
static inline void set_iopl_mask(unsigned mask)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2007-05-03 01:27:13 +08:00
|
|
|
|
2006-12-07 09:14:07 +08:00
|
|
|
/* The paravirtualized I/O functions */
|
2008-03-23 16:03:00 +08:00
|
|
|
static inline void slow_down_io(void)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
pv_cpu_ops.io_delay();
|
2006-12-07 09:14:07 +08:00
|
|
|
#ifdef REALLY_SLOW_IO
|
2007-10-17 02:51:29 +08:00
|
|
|
pv_cpu_ops.io_delay();
|
|
|
|
pv_cpu_ops.io_delay();
|
|
|
|
pv_cpu_ops.io_delay();
|
2006-12-07 09:14:07 +08:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2007-02-13 20:26:21 +08:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
|
|
|
|
unsigned long start_esp)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
|
|
|
|
phys_apicid, start_eip, start_esp);
|
2007-02-13 20:26:21 +08:00
|
|
|
}
|
|
|
|
#endif
|
2006-12-07 09:14:08 +08:00
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void paravirt_activate_mm(struct mm_struct *prev,
|
|
|
|
struct mm_struct *next)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2014-11-19 02:23:49 +08:00
|
|
|
static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
|
|
|
|
struct mm_struct *mm)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2014-11-19 02:23:49 +08:00
|
|
|
static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void __flush_tlb(void)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
static inline void __flush_tlb_global(void)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
static inline void __flush_tlb_single(unsigned long addr)
|
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2006-12-07 09:14:08 +08:00
|
|
|
|
2009-01-11 13:58:09 +08:00
|
|
|
static inline void flush_tlb_others(const struct cpumask *cpumask,
|
|
|
|
struct mm_struct *mm,
|
x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
x86 has no flush_tlb_range support in instruction level. Currently the
flush_tlb_range just implemented by flushing all page table. That is not
the best solution for all scenarios. In fact, if we just use 'invlpg' to
flush few lines from TLB, we can get the performance gain from later
remain TLB lines accessing.
But the 'invlpg' instruction costs much of time. Its execution time can
compete with cr3 rewriting, and even a bit more on SNB CPU.
So, on a 512 4KB TLB entries CPU, the balance points is at:
(512 - X) * 100ns(assumed TLB refill cost) =
X(TLB flush entries) * 100ns(assumed invlpg cost)
Here, X is 256, that is 1/2 of 512 entries.
But with the mysterious CPU pre-fetcher and page miss handler Unit, the
assumed TLB refill cost is far lower then 100ns in sequential access. And
2 HT siblings in one core makes the memory access more faster if they are
accessing the same memory. So, in the patch, I just do the change when
the target entries is less than 1/16 of whole active tlb entries.
Actually, I have no data support for the percentage '1/16', so any
suggestions are welcomed.
As to hugetlb, guess due to smaller page table, and smaller active TLB
entries, I didn't see benefit via my benchmark, so no optimizing now.
My micro benchmark show in ideal scenarios, the performance improves 70
percent in reading. And in worst scenario, the reading/writing
performance is similar with unpatched 3.4-rc4 kernel.
Here is the reading data on my 2P * 4cores *HT NHM EP machine, with THP
'always':
multi thread testing, '-t' paramter is thread number:
with patch unpatched 3.4-rc4
./mprotect -t 1 14ns 24ns
./mprotect -t 2 13ns 22ns
./mprotect -t 4 12ns 19ns
./mprotect -t 8 14ns 16ns
./mprotect -t 16 28ns 26ns
./mprotect -t 32 54ns 51ns
./mprotect -t 128 200ns 199ns
Single process with sequencial flushing and memory accessing:
with patch unpatched 3.4-rc4
./mprotect 7ns 11ns
./mprotect -p 4096 -l 8 -n 10240
21ns 21ns
[ hpa: http://lkml.kernel.org/r/1B4B44D9196EFF41AE41FDA404FC0A100BFF94@SHSMSX101.ccr.corp.intel.com
has additional performance numbers. ]
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-3-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:17 +08:00
|
|
|
unsigned long start,
|
|
|
|
unsigned long end)
|
2007-05-03 01:27:15 +08:00
|
|
|
{
|
x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range
x86 has no flush_tlb_range support in instruction level. Currently the
flush_tlb_range just implemented by flushing all page table. That is not
the best solution for all scenarios. In fact, if we just use 'invlpg' to
flush few lines from TLB, we can get the performance gain from later
remain TLB lines accessing.
But the 'invlpg' instruction costs much of time. Its execution time can
compete with cr3 rewriting, and even a bit more on SNB CPU.
So, on a 512 4KB TLB entries CPU, the balance points is at:
(512 - X) * 100ns(assumed TLB refill cost) =
X(TLB flush entries) * 100ns(assumed invlpg cost)
Here, X is 256, that is 1/2 of 512 entries.
But with the mysterious CPU pre-fetcher and page miss handler Unit, the
assumed TLB refill cost is far lower then 100ns in sequential access. And
2 HT siblings in one core makes the memory access more faster if they are
accessing the same memory. So, in the patch, I just do the change when
the target entries is less than 1/16 of whole active tlb entries.
Actually, I have no data support for the percentage '1/16', so any
suggestions are welcomed.
As to hugetlb, guess due to smaller page table, and smaller active TLB
entries, I didn't see benefit via my benchmark, so no optimizing now.
My micro benchmark show in ideal scenarios, the performance improves 70
percent in reading. And in worst scenario, the reading/writing
performance is similar with unpatched 3.4-rc4 kernel.
Here is the reading data on my 2P * 4cores *HT NHM EP machine, with THP
'always':
multi thread testing, '-t' paramter is thread number:
with patch unpatched 3.4-rc4
./mprotect -t 1 14ns 24ns
./mprotect -t 2 13ns 22ns
./mprotect -t 4 12ns 19ns
./mprotect -t 8 14ns 16ns
./mprotect -t 16 28ns 26ns
./mprotect -t 32 54ns 51ns
./mprotect -t 128 200ns 199ns
Single process with sequencial flushing and memory accessing:
with patch unpatched 3.4-rc4
./mprotect 7ns 11ns
./mprotect -p 4096 -l 8 -n 10240
21ns 21ns
[ hpa: http://lkml.kernel.org/r/1B4B44D9196EFF41AE41FDA404FC0A100BFF94@SHSMSX101.ccr.corp.intel.com
has additional performance numbers. ]
Signed-off-by: Alex Shi <alex.shi@intel.com>
Link: http://lkml.kernel.org/r/1340845344-27557-3-git-send-email-alex.shi@intel.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2012-06-28 09:02:17 +08:00
|
|
|
PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
|
2007-05-03 01:27:15 +08:00
|
|
|
}
|
|
|
|
|
2008-06-25 12:19:12 +08:00
|
|
|
static inline int paravirt_pgd_alloc(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
|
|
|
|
}
|
|
|
|
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-03-18 07:37:01 +08:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_release_pte(unsigned long pfn)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-03-18 07:37:01 +08:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2007-02-13 20:26:21 +08:00
|
|
|
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2008-03-18 07:37:01 +08:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
2007-02-13 20:26:21 +08:00
|
|
|
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_release_pmd(unsigned long pfn)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2008-03-18 07:37:01 +08:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
|
2008-03-18 07:37:02 +08:00
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
|
|
|
|
}
|
2008-07-31 05:32:27 +08:00
|
|
|
static inline void paravirt_release_pud(unsigned long pfn)
|
2008-03-18 07:37:02 +08:00
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
|
|
|
|
}
|
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void pte_update(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
2011-01-14 07:46:36 +08:00
|
|
|
static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
|
|
|
|
}
|
2006-12-07 09:14:08 +08:00
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
2011-01-14 07:46:36 +08:00
|
|
|
static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
|
|
|
|
}
|
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
static inline pte_t __pte(pteval_t val)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2008-01-30 20:33:15 +08:00
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pteval_t,
|
|
|
|
pv_mmu_ops.make_pte,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 20:33:15 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pteval_t,
|
|
|
|
pv_mmu_ops.make_pte,
|
|
|
|
val);
|
2008-01-30 20:33:15 +08:00
|
|
|
|
2008-01-30 20:32:57 +08:00
|
|
|
return (pte_t) { .pte = ret };
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
static inline pteval_t pte_val(pte_t pte)
|
|
|
|
{
|
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
|
|
|
|
pte.pte, (u64)pte.pte >> 32);
|
2008-01-30 20:33:15 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
|
|
|
|
pte.pte);
|
2008-01-30 20:33:15 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
static inline pgd_t __pgd(pgdval_t val)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2008-01-30 20:33:15 +08:00
|
|
|
pgdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 20:33:15 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
|
|
|
|
val);
|
2008-01-30 20:33:15 +08:00
|
|
|
|
|
|
|
return (pgd_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pgdval_t pgd_val(pgd_t pgd)
|
|
|
|
{
|
|
|
|
pgdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
|
|
|
|
pgd.pgd, (u64)pgd.pgd >> 32);
|
2008-01-30 20:33:15 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
|
|
|
|
pgd.pgd);
|
2008-01-30 20:33:15 +08:00
|
|
|
|
|
|
|
return ret;
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2008-06-16 19:30:01 +08:00
|
|
|
#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
|
|
|
|
static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
|
|
|
|
mm, addr, ptep);
|
|
|
|
|
|
|
|
return (pte_t) { .pte = ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
/* 5 arg words */
|
|
|
|
pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
|
|
|
|
else
|
|
|
|
PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
|
|
|
|
mm, addr, ptep, pte.pte);
|
|
|
|
}
|
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
static inline void set_pte(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
|
|
|
|
pte.pte, (u64)pte.pte >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
|
|
|
|
pte.pte);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
/* 5 arg words */
|
|
|
|
pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
|
|
|
|
else
|
|
|
|
PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
|
|
|
|
}
|
|
|
|
|
2011-01-14 07:46:36 +08:00
|
|
|
static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pmd_t *pmdp, pmd_t pmd)
|
|
|
|
{
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
|
|
|
/* 5 arg words */
|
|
|
|
pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
|
|
|
|
else
|
2011-01-26 07:07:09 +08:00
|
|
|
PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
|
|
|
|
native_pmd_val(pmd));
|
2011-01-14 07:46:36 +08:00
|
|
|
}
|
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
|
|
|
|
{
|
|
|
|
pmdval_t val = native_pmd_val(pmd);
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
|
|
|
|
}
|
|
|
|
|
2015-04-15 06:46:14 +08:00
|
|
|
#if CONFIG_PGTABLE_LEVELS >= 3
|
2008-01-30 20:33:19 +08:00
|
|
|
static inline pmd_t __pmd(pmdval_t val)
|
|
|
|
{
|
|
|
|
pmdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 20:33:19 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
|
|
|
|
val);
|
2008-01-30 20:33:19 +08:00
|
|
|
|
|
|
|
return (pmd_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmdval_t pmd_val(pmd_t pmd)
|
|
|
|
{
|
|
|
|
pmdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
|
|
|
|
pmd.pmd, (u64)pmd.pmd >> 32);
|
2008-01-30 20:33:19 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
|
|
|
|
pmd.pmd);
|
2008-01-30 20:33:19 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pud(pud_t *pudp, pud_t pud)
|
|
|
|
{
|
|
|
|
pudval_t val = native_pud_val(pud);
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
|
|
|
|
val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
|
|
|
|
val);
|
|
|
|
}
|
2015-04-15 06:46:14 +08:00
|
|
|
#if CONFIG_PGTABLE_LEVELS == 4
|
2008-01-30 20:33:20 +08:00
|
|
|
static inline pud_t __pud(pudval_t val)
|
|
|
|
{
|
|
|
|
pudval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 20:33:20 +08:00
|
|
|
else
|
2009-01-29 06:35:07 +08:00
|
|
|
ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
|
|
|
|
val);
|
2008-01-30 20:33:20 +08:00
|
|
|
|
|
|
|
return (pud_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pudval_t pud_val(pud_t pud)
|
|
|
|
{
|
|
|
|
pudval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
2009-01-29 17:51:34 +08:00
|
|
|
ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
|
|
|
|
pud.pud, (u64)pud.pud >> 32);
|
2008-01-30 20:33:20 +08:00
|
|
|
else
|
2009-01-29 17:51:34 +08:00
|
|
|
ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
|
|
|
|
pud.pud);
|
2008-01-30 20:33:20 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
|
|
|
|
{
|
|
|
|
pgdval_t val = native_pgd_val(pgd);
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
|
|
|
|
val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
|
|
|
|
val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pgd_clear(pgd_t *pgdp)
|
|
|
|
{
|
|
|
|
set_pgd(pgdp, __pgd(0));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pud_clear(pud_t *pudp)
|
|
|
|
{
|
|
|
|
set_pud(pudp, __pud(0));
|
|
|
|
}
|
|
|
|
|
2015-04-15 06:46:14 +08:00
|
|
|
#endif /* CONFIG_PGTABLE_LEVELS == 4 */
|
2008-01-30 20:33:20 +08:00
|
|
|
|
2015-04-15 06:46:14 +08:00
|
|
|
#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
|
2008-01-30 20:33:19 +08:00
|
|
|
|
2008-01-30 20:33:15 +08:00
|
|
|
#ifdef CONFIG_X86_PAE
|
|
|
|
/* Special-case pte-setting operations for PAE, which can't update a
|
|
|
|
64-bit pte atomically */
|
|
|
|
static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
|
|
|
|
pte.pte, pte.pte >> 32);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
|
|
|
|
}
|
2008-01-30 20:33:15 +08:00
|
|
|
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
|
|
|
|
}
|
2008-01-30 20:33:15 +08:00
|
|
|
#else /* !CONFIG_X86_PAE */
|
|
|
|
static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
set_pte(ptep, pte);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
set_pte_at(mm, addr, ptep, __pte(0));
|
|
|
|
}
|
2008-01-30 20:33:15 +08:00
|
|
|
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
set_pmd(pmdp, __pmd(0));
|
|
|
|
}
|
2008-01-30 20:33:15 +08:00
|
|
|
#endif /* CONFIG_X86_PAE */
|
|
|
|
|
2009-02-18 15:24:03 +08:00
|
|
|
#define __HAVE_ARCH_START_CONTEXT_SWITCH
|
2009-02-19 03:18:57 +08:00
|
|
|
static inline void arch_start_context_switch(struct task_struct *prev)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2009-02-19 03:18:57 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2009-02-19 03:18:57 +08:00
|
|
|
static inline void arch_end_context_switch(struct task_struct *next)
|
2007-05-03 01:27:14 +08:00
|
|
|
{
|
2009-02-19 03:18:57 +08:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2007-02-13 20:26:21 +08:00
|
|
|
#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
|
2007-05-03 01:27:14 +08:00
|
|
|
static inline void arch_enter_lazy_mmu_mode(void)
|
|
|
|
{
|
paravirt: clean up lazy mode handling
Currently, the set_lazy_mode pv_op is overloaded with 5 functions:
1. enter lazy cpu mode
2. leave lazy cpu mode
3. enter lazy mmu mode
4. leave lazy mmu mode
5. flush pending batched operations
This complicates each paravirt backend, since it needs to deal with
all the possible state transitions, handling flushing, etc. In
particular, flushing is quite distinct from the other 4 functions, and
seems to just cause complication.
This patch removes the set_lazy_mode operation, and adds "enter" and
"leave" lazy mode operations on mmu_ops and cpu_ops. All the logic
associated with enter and leaving lazy states is now in common code
(basically BUG_ONs to make sure that no mode is current when entering
a lazy mode, and make sure that the mode is current when leaving).
Also, flush is handled in a common way, by simply leaving and
re-entering the lazy mode.
The result is that the Xen, lguest and VMI lazy mode implementations
are much simpler.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Zach Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Avi Kivity <avi@qumranet.com>
Cc: Anthony Liguory <aliguori@us.ibm.com>
Cc: "Glauber de Oliveira Costa" <glommer@gmail.com>
Cc: Jun Nakajima <jun.nakajima@intel.com>
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void arch_leave_lazy_mmu_mode(void)
|
|
|
|
{
|
paravirt: clean up lazy mode handling
Currently, the set_lazy_mode pv_op is overloaded with 5 functions:
1. enter lazy cpu mode
2. leave lazy cpu mode
3. enter lazy mmu mode
4. leave lazy mmu mode
5. flush pending batched operations
This complicates each paravirt backend, since it needs to deal with
all the possible state transitions, handling flushing, etc. In
particular, flushing is quite distinct from the other 4 functions, and
seems to just cause complication.
This patch removes the set_lazy_mode operation, and adds "enter" and
"leave" lazy mode operations on mmu_ops and cpu_ops. All the logic
associated with enter and leaving lazy states is now in common code
(basically BUG_ONs to make sure that no mode is current when entering
a lazy mode, and make sure that the mode is current when leaving).
Also, flush is handled in a common way, by simply leaving and
re-entering the lazy mode.
The result is that the Xen, lguest and VMI lazy mode implementations
are much simpler.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Zach Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Avi Kivity <avi@qumranet.com>
Cc: Anthony Liguory <aliguori@us.ibm.com>
Cc: "Glauber de Oliveira Costa" <glommer@gmail.com>
Cc: Jun Nakajima <jun.nakajima@intel.com>
2007-10-17 02:51:29 +08:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
|
2007-05-03 01:27:14 +08:00
|
|
|
}
|
|
|
|
|
2013-03-23 21:36:36 +08:00
|
|
|
static inline void arch_flush_lazy_mmu_mode(void)
|
|
|
|
{
|
|
|
|
PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
|
|
|
|
}
|
2007-02-13 20:26:21 +08:00
|
|
|
|
2008-06-18 02:42:01 +08:00
|
|
|
static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
|
2009-04-10 01:55:33 +08:00
|
|
|
phys_addr_t phys, pgprot_t flags)
|
2008-06-18 02:42:01 +08:00
|
|
|
{
|
|
|
|
pv_mmu_ops.set_fixmap(idx, phys, flags);
|
|
|
|
}
|
|
|
|
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-14 08:16:55 +08:00
|
|
|
#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
|
2008-07-09 20:33:33 +08:00
|
|
|
|
x86, spinlock: Replace pv spinlocks with pv ticketlocks
Rather than outright replacing the entire spinlock implementation in
order to paravirtualize it, keep the ticket lock implementation but add
a couple of pvops hooks on the slow patch (long spin on lock, unlocking
a contended lock).
Ticket locks have a number of nice properties, but they also have some
surprising behaviours in virtual environments. They enforce a strict
FIFO ordering on cpus trying to take a lock; however, if the hypervisor
scheduler does not schedule the cpus in the correct order, the system can
waste a huge amount of time spinning until the next cpu can take the lock.
(See Thomas Friebel's talk "Prevent Guests from Spinning Around"
http://www.xen.org/files/xensummitboston08/LHP.pdf for more details.)
To address this, we add two hooks:
- __ticket_spin_lock which is called after the cpu has been
spinning on the lock for a significant number of iterations but has
failed to take the lock (presumably because the cpu holding the lock
has been descheduled). The lock_spinning pvop is expected to block
the cpu until it has been kicked by the current lock holder.
- __ticket_spin_unlock, which on releasing a contended lock
(there are more cpus with tail tickets), it looks to see if the next
cpu is blocked and wakes it if so.
When compiled with CONFIG_PARAVIRT_SPINLOCKS disabled, a set of stub
functions causes all the extra code to go away.
Results:
=======
setup: 32 core machine with 32 vcpu KVM guest (HT off) with 8GB RAM
base = 3.11-rc
patched = base + pvspinlock V12
+-----------------+----------------+--------+
dbench (Throughput in MB/sec. Higher is better)
+-----------------+----------------+--------+
| base (stdev %)|patched(stdev%) | %gain |
+-----------------+----------------+--------+
| 15035.3 (0.3) |15150.0 (0.6) | 0.8 |
| 1470.0 (2.2) | 1713.7 (1.9) | 16.6 |
| 848.6 (4.3) | 967.8 (4.3) | 14.0 |
| 652.9 (3.5) | 685.3 (3.7) | 5.0 |
+-----------------+----------------+--------+
pvspinlock shows benefits for overcommit ratio > 1 for PLE enabled cases,
and undercommits results are flat
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/1376058122-8248-2-git-send-email-raghavendra.kt@linux.vnet.ibm.com
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-by: Attilio Rao <attilio.rao@citrix.com>
[ Raghavendra: Changed SPIN_THRESHOLD, fixed redefinition of arch_spinlock_t]
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-09 22:21:49 +08:00
|
|
|
static __always_inline void __ticket_lock_spinning(struct arch_spinlock *lock,
|
|
|
|
__ticket_t ticket)
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 03:07:50 +08:00
|
|
|
{
|
2013-08-09 22:21:55 +08:00
|
|
|
PVOP_VCALLEE2(pv_lock_ops.lock_spinning, lock, ticket);
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 03:07:50 +08:00
|
|
|
}
|
|
|
|
|
x86, ticketlock: Add slowpath logic
Maintain a flag in the LSB of the ticket lock tail which indicates
whether anyone is in the lock slowpath and may need kicking when
the current holder unlocks. The flags are set when the first locker
enters the slowpath, and cleared when unlocking to an empty queue (ie,
no contention).
In the specific implementation of lock_spinning(), make sure to set
the slowpath flags on the lock just before blocking. We must do
this before the last-chance pickup test to prevent a deadlock
with the unlocker:
Unlocker Locker
test for lock pickup
-> fail
unlock
test slowpath
-> false
set slowpath flags
block
Whereas this works in any ordering:
Unlocker Locker
set slowpath flags
test for lock pickup
-> fail
block
unlock
test slowpath
-> true, kick
If the unlocker finds that the lock has the slowpath flag set but it is
actually uncontended (ie, head == tail, so nobody is waiting), then it
clears the slowpath flag.
The unlock code uses a locked add to update the head counter. This also
acts as a full memory barrier so that its safe to subsequently
read back the slowflag state, knowing that the updated lock is visible
to the other CPUs. If it were an unlocked add, then the flag read may
just be forwarded from the store buffer before it was visible to the other
CPUs, which could result in a deadlock.
Unfortunately this means we need to do a locked instruction when
unlocking with PV ticketlocks. However, if PV ticketlocks are not
enabled, then the old non-locked "add" is the only unlocking code.
Note: this code relies on gcc making sure that unlikely() code is out of
line of the fastpath, which only happens when OPTIMIZE_SIZE=n. If it
doesn't the generated code isn't too bad, but its definitely suboptimal.
Thanks to Srivatsa Vaddagiri for providing a bugfix to the original
version of this change, which has been folded in.
Thanks to Stephan Diestelhorst for commenting on some code which relied
on an inaccurate reading of the x86 memory ordering rules.
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/1376058122-8248-11-git-send-email-raghavendra.kt@linux.vnet.ibm.com
Signed-off-by: Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Stephan Diestelhorst <stephan.diestelhorst@amd.com>
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-09 22:21:58 +08:00
|
|
|
static __always_inline void __ticket_unlock_kick(struct arch_spinlock *lock,
|
x86, spinlock: Replace pv spinlocks with pv ticketlocks
Rather than outright replacing the entire spinlock implementation in
order to paravirtualize it, keep the ticket lock implementation but add
a couple of pvops hooks on the slow patch (long spin on lock, unlocking
a contended lock).
Ticket locks have a number of nice properties, but they also have some
surprising behaviours in virtual environments. They enforce a strict
FIFO ordering on cpus trying to take a lock; however, if the hypervisor
scheduler does not schedule the cpus in the correct order, the system can
waste a huge amount of time spinning until the next cpu can take the lock.
(See Thomas Friebel's talk "Prevent Guests from Spinning Around"
http://www.xen.org/files/xensummitboston08/LHP.pdf for more details.)
To address this, we add two hooks:
- __ticket_spin_lock which is called after the cpu has been
spinning on the lock for a significant number of iterations but has
failed to take the lock (presumably because the cpu holding the lock
has been descheduled). The lock_spinning pvop is expected to block
the cpu until it has been kicked by the current lock holder.
- __ticket_spin_unlock, which on releasing a contended lock
(there are more cpus with tail tickets), it looks to see if the next
cpu is blocked and wakes it if so.
When compiled with CONFIG_PARAVIRT_SPINLOCKS disabled, a set of stub
functions causes all the extra code to go away.
Results:
=======
setup: 32 core machine with 32 vcpu KVM guest (HT off) with 8GB RAM
base = 3.11-rc
patched = base + pvspinlock V12
+-----------------+----------------+--------+
dbench (Throughput in MB/sec. Higher is better)
+-----------------+----------------+--------+
| base (stdev %)|patched(stdev%) | %gain |
+-----------------+----------------+--------+
| 15035.3 (0.3) |15150.0 (0.6) | 0.8 |
| 1470.0 (2.2) | 1713.7 (1.9) | 16.6 |
| 848.6 (4.3) | 967.8 (4.3) | 14.0 |
| 652.9 (3.5) | 685.3 (3.7) | 5.0 |
+-----------------+----------------+--------+
pvspinlock shows benefits for overcommit ratio > 1 for PLE enabled cases,
and undercommits results are flat
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/1376058122-8248-2-git-send-email-raghavendra.kt@linux.vnet.ibm.com
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-by: Attilio Rao <attilio.rao@citrix.com>
[ Raghavendra: Changed SPIN_THRESHOLD, fixed redefinition of arch_spinlock_t]
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-09 22:21:49 +08:00
|
|
|
__ticket_t ticket)
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 03:07:50 +08:00
|
|
|
{
|
x86, spinlock: Replace pv spinlocks with pv ticketlocks
Rather than outright replacing the entire spinlock implementation in
order to paravirtualize it, keep the ticket lock implementation but add
a couple of pvops hooks on the slow patch (long spin on lock, unlocking
a contended lock).
Ticket locks have a number of nice properties, but they also have some
surprising behaviours in virtual environments. They enforce a strict
FIFO ordering on cpus trying to take a lock; however, if the hypervisor
scheduler does not schedule the cpus in the correct order, the system can
waste a huge amount of time spinning until the next cpu can take the lock.
(See Thomas Friebel's talk "Prevent Guests from Spinning Around"
http://www.xen.org/files/xensummitboston08/LHP.pdf for more details.)
To address this, we add two hooks:
- __ticket_spin_lock which is called after the cpu has been
spinning on the lock for a significant number of iterations but has
failed to take the lock (presumably because the cpu holding the lock
has been descheduled). The lock_spinning pvop is expected to block
the cpu until it has been kicked by the current lock holder.
- __ticket_spin_unlock, which on releasing a contended lock
(there are more cpus with tail tickets), it looks to see if the next
cpu is blocked and wakes it if so.
When compiled with CONFIG_PARAVIRT_SPINLOCKS disabled, a set of stub
functions causes all the extra code to go away.
Results:
=======
setup: 32 core machine with 32 vcpu KVM guest (HT off) with 8GB RAM
base = 3.11-rc
patched = base + pvspinlock V12
+-----------------+----------------+--------+
dbench (Throughput in MB/sec. Higher is better)
+-----------------+----------------+--------+
| base (stdev %)|patched(stdev%) | %gain |
+-----------------+----------------+--------+
| 15035.3 (0.3) |15150.0 (0.6) | 0.8 |
| 1470.0 (2.2) | 1713.7 (1.9) | 16.6 |
| 848.6 (4.3) | 967.8 (4.3) | 14.0 |
| 652.9 (3.5) | 685.3 (3.7) | 5.0 |
+-----------------+----------------+--------+
pvspinlock shows benefits for overcommit ratio > 1 for PLE enabled cases,
and undercommits results are flat
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/1376058122-8248-2-git-send-email-raghavendra.kt@linux.vnet.ibm.com
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-by: Attilio Rao <attilio.rao@citrix.com>
[ Raghavendra: Changed SPIN_THRESHOLD, fixed redefinition of arch_spinlock_t]
Signed-off-by: Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-09 22:21:49 +08:00
|
|
|
PVOP_VCALL2(pv_lock_ops.unlock_kick, lock, ticket);
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 03:07:50 +08:00
|
|
|
}
|
|
|
|
|
2008-07-09 20:33:33 +08:00
|
|
|
#endif
|
|
|
|
|
2008-01-30 20:32:07 +08:00
|
|
|
#ifdef CONFIG_X86_32
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
|
|
|
|
#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
|
|
|
|
|
|
|
|
/* save and restore all caller-save registers, except return value */
|
2009-01-31 15:17:23 +08:00
|
|
|
#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
|
|
|
|
#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
|
2008-01-30 20:32:07 +08:00
|
|
|
#define PV_FLAGS_ARG "0"
|
|
|
|
#define PV_EXTRA_CLOBBERS
|
|
|
|
#define PV_VEXTRA_CLOBBERS
|
|
|
|
#else
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
/* save and restore all caller-save registers, except return value */
|
|
|
|
#define PV_SAVE_ALL_CALLER_REGS \
|
|
|
|
"push %rcx;" \
|
|
|
|
"push %rdx;" \
|
|
|
|
"push %rsi;" \
|
|
|
|
"push %rdi;" \
|
|
|
|
"push %r8;" \
|
|
|
|
"push %r9;" \
|
|
|
|
"push %r10;" \
|
|
|
|
"push %r11;"
|
|
|
|
#define PV_RESTORE_ALL_CALLER_REGS \
|
|
|
|
"pop %r11;" \
|
|
|
|
"pop %r10;" \
|
|
|
|
"pop %r9;" \
|
|
|
|
"pop %r8;" \
|
|
|
|
"pop %rdi;" \
|
|
|
|
"pop %rsi;" \
|
|
|
|
"pop %rdx;" \
|
|
|
|
"pop %rcx;"
|
|
|
|
|
2008-01-30 20:32:07 +08:00
|
|
|
/* We save some registers, but all of them, that's too much. We clobber all
|
|
|
|
* caller saved registers but the argument parameter */
|
|
|
|
#define PV_SAVE_REGS "pushq %%rdi;"
|
|
|
|
#define PV_RESTORE_REGS "popq %%rdi;"
|
2008-07-09 06:07:12 +08:00
|
|
|
#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
|
|
|
|
#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
|
2008-01-30 20:32:07 +08:00
|
|
|
#define PV_FLAGS_ARG "D"
|
|
|
|
#endif
|
|
|
|
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
/*
|
|
|
|
* Generate a thunk around a function which saves all caller-save
|
|
|
|
* registers except for the return value. This allows C functions to
|
|
|
|
* be called from assembler code where fewer than normal registers are
|
|
|
|
* available. It may also help code generation around calls from C
|
|
|
|
* code if the common case doesn't use many registers.
|
|
|
|
*
|
|
|
|
* When a callee is wrapped in a thunk, the caller can assume that all
|
|
|
|
* arg regs and all scratch registers are preserved across the
|
|
|
|
* call. The return value in rax/eax will not be saved, even for void
|
|
|
|
* functions.
|
|
|
|
*/
|
|
|
|
#define PV_CALLEE_SAVE_REGS_THUNK(func) \
|
|
|
|
extern typeof(func) __raw_callee_save_##func; \
|
|
|
|
\
|
|
|
|
asm(".pushsection .text;" \
|
2013-10-23 00:07:56 +08:00
|
|
|
".globl __raw_callee_save_" #func " ; " \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
"__raw_callee_save_" #func ": " \
|
|
|
|
PV_SAVE_ALL_CALLER_REGS \
|
|
|
|
"call " #func ";" \
|
|
|
|
PV_RESTORE_ALL_CALLER_REGS \
|
|
|
|
"ret;" \
|
|
|
|
".popsection")
|
|
|
|
|
|
|
|
/* Get a reference to a callee-save function */
|
|
|
|
#define PV_CALLEE_SAVE(func) \
|
|
|
|
((struct paravirt_callee_save) { __raw_callee_save_##func })
|
|
|
|
|
|
|
|
/* Promise that "func" already uses the right calling convention */
|
|
|
|
#define __PV_IS_CALLEE_SAVE(func) \
|
|
|
|
((struct paravirt_callee_save) { func })
|
|
|
|
|
tracing: Force arch_local_irq_* notrace for paravirt
When running ktest.pl randconfig tests, I would sometimes trigger
a lockdep annotation bug (possible reason: unannotated irqs-on).
This triggering happened right after function tracer self test was
executed. After doing a config bisect I found that this was caused with
having function tracer, paravirt guest, prove locking, and rcu torture
all enabled.
The rcu torture just enhanced the likelyhood of triggering the bug.
Prove locking was needed, since it was the thing that was bugging.
Function tracer would trace and disable interrupts in all sorts
of funny places.
paravirt guest would turn arch_local_irq_* into functions that would
be traced.
Besides the fact that tracing arch_local_irq_* is just a bad idea,
this is what is happening.
The bug happened simply in the local_irq_restore() code:
if (raw_irqs_disabled_flags(flags)) { \
raw_local_irq_restore(flags); \
trace_hardirqs_off(); \
} else { \
trace_hardirqs_on(); \
raw_local_irq_restore(flags); \
} \
The raw_local_irq_restore() was defined as arch_local_irq_restore().
Now imagine, we are about to enable interrupts. We go into the else
case and call trace_hardirqs_on() which tells lockdep that we are enabling
interrupts, so it sets the current->hardirqs_enabled = 1.
Then we call raw_local_irq_restore() which calls arch_local_irq_restore()
which gets traced!
Now in the function tracer we disable interrupts with local_irq_save().
This is fine, but flags is stored that we have interrupts disabled.
When the function tracer calls local_irq_restore() it does it, but this
time with flags set as disabled, so we go into the if () path.
This keeps interrupts disabled and calls trace_hardirqs_off() which
sets current->hardirqs_enabled = 0.
When the tracer is finished and proceeds with the original code,
we enable interrupts but leave current->hardirqs_enabled as 0. Which
now breaks lockdeps internal processing.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-11-11 11:29:49 +08:00
|
|
|
static inline notrace unsigned long arch_local_save_flags(void)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2009-10-13 07:32:43 +08:00
|
|
|
return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
tracing: Force arch_local_irq_* notrace for paravirt
When running ktest.pl randconfig tests, I would sometimes trigger
a lockdep annotation bug (possible reason: unannotated irqs-on).
This triggering happened right after function tracer self test was
executed. After doing a config bisect I found that this was caused with
having function tracer, paravirt guest, prove locking, and rcu torture
all enabled.
The rcu torture just enhanced the likelyhood of triggering the bug.
Prove locking was needed, since it was the thing that was bugging.
Function tracer would trace and disable interrupts in all sorts
of funny places.
paravirt guest would turn arch_local_irq_* into functions that would
be traced.
Besides the fact that tracing arch_local_irq_* is just a bad idea,
this is what is happening.
The bug happened simply in the local_irq_restore() code:
if (raw_irqs_disabled_flags(flags)) { \
raw_local_irq_restore(flags); \
trace_hardirqs_off(); \
} else { \
trace_hardirqs_on(); \
raw_local_irq_restore(flags); \
} \
The raw_local_irq_restore() was defined as arch_local_irq_restore().
Now imagine, we are about to enable interrupts. We go into the else
case and call trace_hardirqs_on() which tells lockdep that we are enabling
interrupts, so it sets the current->hardirqs_enabled = 1.
Then we call raw_local_irq_restore() which calls arch_local_irq_restore()
which gets traced!
Now in the function tracer we disable interrupts with local_irq_save().
This is fine, but flags is stored that we have interrupts disabled.
When the function tracer calls local_irq_restore() it does it, but this
time with flags set as disabled, so we go into the if () path.
This keeps interrupts disabled and calls trace_hardirqs_off() which
sets current->hardirqs_enabled = 0.
When the tracer is finished and proceeds with the original code,
we enable interrupts but leave current->hardirqs_enabled as 0. Which
now breaks lockdeps internal processing.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-11-11 11:29:49 +08:00
|
|
|
static inline notrace void arch_local_irq_restore(unsigned long f)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2009-10-13 07:32:43 +08:00
|
|
|
PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
tracing: Force arch_local_irq_* notrace for paravirt
When running ktest.pl randconfig tests, I would sometimes trigger
a lockdep annotation bug (possible reason: unannotated irqs-on).
This triggering happened right after function tracer self test was
executed. After doing a config bisect I found that this was caused with
having function tracer, paravirt guest, prove locking, and rcu torture
all enabled.
The rcu torture just enhanced the likelyhood of triggering the bug.
Prove locking was needed, since it was the thing that was bugging.
Function tracer would trace and disable interrupts in all sorts
of funny places.
paravirt guest would turn arch_local_irq_* into functions that would
be traced.
Besides the fact that tracing arch_local_irq_* is just a bad idea,
this is what is happening.
The bug happened simply in the local_irq_restore() code:
if (raw_irqs_disabled_flags(flags)) { \
raw_local_irq_restore(flags); \
trace_hardirqs_off(); \
} else { \
trace_hardirqs_on(); \
raw_local_irq_restore(flags); \
} \
The raw_local_irq_restore() was defined as arch_local_irq_restore().
Now imagine, we are about to enable interrupts. We go into the else
case and call trace_hardirqs_on() which tells lockdep that we are enabling
interrupts, so it sets the current->hardirqs_enabled = 1.
Then we call raw_local_irq_restore() which calls arch_local_irq_restore()
which gets traced!
Now in the function tracer we disable interrupts with local_irq_save().
This is fine, but flags is stored that we have interrupts disabled.
When the function tracer calls local_irq_restore() it does it, but this
time with flags set as disabled, so we go into the if () path.
This keeps interrupts disabled and calls trace_hardirqs_off() which
sets current->hardirqs_enabled = 0.
When the tracer is finished and proceeds with the original code,
we enable interrupts but leave current->hardirqs_enabled as 0. Which
now breaks lockdeps internal processing.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-11-11 11:29:49 +08:00
|
|
|
static inline notrace void arch_local_irq_disable(void)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2009-10-13 07:32:43 +08:00
|
|
|
PVOP_VCALLEE0(pv_irq_ops.irq_disable);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
tracing: Force arch_local_irq_* notrace for paravirt
When running ktest.pl randconfig tests, I would sometimes trigger
a lockdep annotation bug (possible reason: unannotated irqs-on).
This triggering happened right after function tracer self test was
executed. After doing a config bisect I found that this was caused with
having function tracer, paravirt guest, prove locking, and rcu torture
all enabled.
The rcu torture just enhanced the likelyhood of triggering the bug.
Prove locking was needed, since it was the thing that was bugging.
Function tracer would trace and disable interrupts in all sorts
of funny places.
paravirt guest would turn arch_local_irq_* into functions that would
be traced.
Besides the fact that tracing arch_local_irq_* is just a bad idea,
this is what is happening.
The bug happened simply in the local_irq_restore() code:
if (raw_irqs_disabled_flags(flags)) { \
raw_local_irq_restore(flags); \
trace_hardirqs_off(); \
} else { \
trace_hardirqs_on(); \
raw_local_irq_restore(flags); \
} \
The raw_local_irq_restore() was defined as arch_local_irq_restore().
Now imagine, we are about to enable interrupts. We go into the else
case and call trace_hardirqs_on() which tells lockdep that we are enabling
interrupts, so it sets the current->hardirqs_enabled = 1.
Then we call raw_local_irq_restore() which calls arch_local_irq_restore()
which gets traced!
Now in the function tracer we disable interrupts with local_irq_save().
This is fine, but flags is stored that we have interrupts disabled.
When the function tracer calls local_irq_restore() it does it, but this
time with flags set as disabled, so we go into the if () path.
This keeps interrupts disabled and calls trace_hardirqs_off() which
sets current->hardirqs_enabled = 0.
When the tracer is finished and proceeds with the original code,
we enable interrupts but leave current->hardirqs_enabled as 0. Which
now breaks lockdeps internal processing.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-11-11 11:29:49 +08:00
|
|
|
static inline notrace void arch_local_irq_enable(void)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
2009-10-13 07:32:43 +08:00
|
|
|
PVOP_VCALLEE0(pv_irq_ops.irq_enable);
|
2006-12-07 09:14:08 +08:00
|
|
|
}
|
|
|
|
|
tracing: Force arch_local_irq_* notrace for paravirt
When running ktest.pl randconfig tests, I would sometimes trigger
a lockdep annotation bug (possible reason: unannotated irqs-on).
This triggering happened right after function tracer self test was
executed. After doing a config bisect I found that this was caused with
having function tracer, paravirt guest, prove locking, and rcu torture
all enabled.
The rcu torture just enhanced the likelyhood of triggering the bug.
Prove locking was needed, since it was the thing that was bugging.
Function tracer would trace and disable interrupts in all sorts
of funny places.
paravirt guest would turn arch_local_irq_* into functions that would
be traced.
Besides the fact that tracing arch_local_irq_* is just a bad idea,
this is what is happening.
The bug happened simply in the local_irq_restore() code:
if (raw_irqs_disabled_flags(flags)) { \
raw_local_irq_restore(flags); \
trace_hardirqs_off(); \
} else { \
trace_hardirqs_on(); \
raw_local_irq_restore(flags); \
} \
The raw_local_irq_restore() was defined as arch_local_irq_restore().
Now imagine, we are about to enable interrupts. We go into the else
case and call trace_hardirqs_on() which tells lockdep that we are enabling
interrupts, so it sets the current->hardirqs_enabled = 1.
Then we call raw_local_irq_restore() which calls arch_local_irq_restore()
which gets traced!
Now in the function tracer we disable interrupts with local_irq_save().
This is fine, but flags is stored that we have interrupts disabled.
When the function tracer calls local_irq_restore() it does it, but this
time with flags set as disabled, so we go into the if () path.
This keeps interrupts disabled and calls trace_hardirqs_off() which
sets current->hardirqs_enabled = 0.
When the tracer is finished and proceeds with the original code,
we enable interrupts but leave current->hardirqs_enabled as 0. Which
now breaks lockdeps internal processing.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2010-11-11 11:29:49 +08:00
|
|
|
static inline notrace unsigned long arch_local_irq_save(void)
|
2006-12-07 09:14:08 +08:00
|
|
|
{
|
|
|
|
unsigned long f;
|
|
|
|
|
2010-10-07 21:08:55 +08:00
|
|
|
f = arch_local_save_flags();
|
|
|
|
arch_local_irq_disable();
|
2006-12-07 09:14:08 +08:00
|
|
|
return f;
|
|
|
|
}
|
|
|
|
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 03:07:50 +08:00
|
|
|
|
2007-05-03 01:27:14 +08:00
|
|
|
/* Make sure as little as possible of this mess escapes. */
|
2007-05-03 01:27:14 +08:00
|
|
|
#undef PARAVIRT_CALL
|
2007-05-03 01:27:15 +08:00
|
|
|
#undef __PVOP_CALL
|
|
|
|
#undef __PVOP_VCALL
|
2007-05-03 01:27:14 +08:00
|
|
|
#undef PVOP_VCALL0
|
|
|
|
#undef PVOP_CALL0
|
|
|
|
#undef PVOP_VCALL1
|
|
|
|
#undef PVOP_CALL1
|
|
|
|
#undef PVOP_VCALL2
|
|
|
|
#undef PVOP_CALL2
|
|
|
|
#undef PVOP_VCALL3
|
|
|
|
#undef PVOP_CALL3
|
|
|
|
#undef PVOP_VCALL4
|
|
|
|
#undef PVOP_CALL4
|
2006-12-07 09:14:08 +08:00
|
|
|
|
2009-08-20 19:19:57 +08:00
|
|
|
extern void default_banner(void);
|
|
|
|
|
2006-12-07 09:14:07 +08:00
|
|
|
#else /* __ASSEMBLY__ */
|
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
#define _PVSITE(ptype, clobbers, ops, word, algn) \
|
2006-12-07 09:14:08 +08:00
|
|
|
771:; \
|
|
|
|
ops; \
|
|
|
|
772:; \
|
|
|
|
.pushsection .parainstructions,"a"; \
|
2008-01-30 20:32:06 +08:00
|
|
|
.align algn; \
|
|
|
|
word 771b; \
|
2006-12-07 09:14:08 +08:00
|
|
|
.byte ptype; \
|
|
|
|
.byte 772b-771b; \
|
|
|
|
.short clobbers; \
|
|
|
|
.popsection
|
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
|
2009-01-29 06:35:04 +08:00
|
|
|
#define COND_PUSH(set, mask, reg) \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
.if ((~(set)) & mask); push %reg; .endif
|
2009-01-29 06:35:04 +08:00
|
|
|
#define COND_POP(set, mask, reg) \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
.if ((~(set)) & mask); pop %reg; .endif
|
2009-01-29 06:35:04 +08:00
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
#ifdef CONFIG_X86_64
|
2009-01-29 06:35:04 +08:00
|
|
|
|
|
|
|
#define PV_SAVE_REGS(set) \
|
|
|
|
COND_PUSH(set, CLBR_RAX, rax); \
|
|
|
|
COND_PUSH(set, CLBR_RCX, rcx); \
|
|
|
|
COND_PUSH(set, CLBR_RDX, rdx); \
|
|
|
|
COND_PUSH(set, CLBR_RSI, rsi); \
|
|
|
|
COND_PUSH(set, CLBR_RDI, rdi); \
|
|
|
|
COND_PUSH(set, CLBR_R8, r8); \
|
|
|
|
COND_PUSH(set, CLBR_R9, r9); \
|
|
|
|
COND_PUSH(set, CLBR_R10, r10); \
|
|
|
|
COND_PUSH(set, CLBR_R11, r11)
|
|
|
|
#define PV_RESTORE_REGS(set) \
|
|
|
|
COND_POP(set, CLBR_R11, r11); \
|
|
|
|
COND_POP(set, CLBR_R10, r10); \
|
|
|
|
COND_POP(set, CLBR_R9, r9); \
|
|
|
|
COND_POP(set, CLBR_R8, r8); \
|
|
|
|
COND_POP(set, CLBR_RDI, rdi); \
|
|
|
|
COND_POP(set, CLBR_RSI, rsi); \
|
|
|
|
COND_POP(set, CLBR_RDX, rdx); \
|
|
|
|
COND_POP(set, CLBR_RCX, rcx); \
|
|
|
|
COND_POP(set, CLBR_RAX, rax)
|
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
|
2008-01-30 20:32:06 +08:00
|
|
|
#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
|
2008-06-25 12:19:15 +08:00
|
|
|
#define PARA_INDIRECT(addr) *addr(%rip)
|
2008-01-30 20:32:06 +08:00
|
|
|
#else
|
2009-01-29 06:35:04 +08:00
|
|
|
#define PV_SAVE_REGS(set) \
|
|
|
|
COND_PUSH(set, CLBR_EAX, eax); \
|
|
|
|
COND_PUSH(set, CLBR_EDI, edi); \
|
|
|
|
COND_PUSH(set, CLBR_ECX, ecx); \
|
|
|
|
COND_PUSH(set, CLBR_EDX, edx)
|
|
|
|
#define PV_RESTORE_REGS(set) \
|
|
|
|
COND_POP(set, CLBR_EDX, edx); \
|
|
|
|
COND_POP(set, CLBR_ECX, ecx); \
|
|
|
|
COND_POP(set, CLBR_EDI, edi); \
|
|
|
|
COND_POP(set, CLBR_EAX, eax)
|
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
|
2008-01-30 20:32:06 +08:00
|
|
|
#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
|
2008-06-25 12:19:15 +08:00
|
|
|
#define PARA_INDIRECT(addr) *%cs:addr
|
2008-01-30 20:32:06 +08:00
|
|
|
#endif
|
|
|
|
|
2007-10-17 02:51:29 +08:00
|
|
|
#define INTERRUPT_RETURN \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
|
2008-06-25 12:19:15 +08:00
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
|
2007-05-03 01:27:14 +08:00
|
|
|
|
|
|
|
#define DISABLE_INTERRUPTS(clobbers) \
|
2007-10-17 02:51:29 +08:00
|
|
|
PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
|
2008-06-25 12:19:15 +08:00
|
|
|
call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
|
2007-05-03 01:27:14 +08:00
|
|
|
|
|
|
|
#define ENABLE_INTERRUPTS(clobbers) \
|
2007-10-17 02:51:29 +08:00
|
|
|
PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
|
2008-06-25 12:19:15 +08:00
|
|
|
call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-29 06:35:05 +08:00
|
|
|
PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
|
2007-05-03 01:27:14 +08:00
|
|
|
|
2008-06-25 12:19:28 +08:00
|
|
|
#define USERGS_SYSRET32 \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
|
2008-01-30 20:30:33 +08:00
|
|
|
CLBR_NONE, \
|
2008-06-25 12:19:28 +08:00
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
|
2008-01-30 20:32:07 +08:00
|
|
|
|
2008-01-30 20:32:06 +08:00
|
|
|
#ifdef CONFIG_X86_32
|
2008-06-25 12:19:15 +08:00
|
|
|
#define GET_CR0_INTO_EAX \
|
|
|
|
push %ecx; push %edx; \
|
|
|
|
call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
|
2007-05-03 01:27:14 +08:00
|
|
|
pop %edx; pop %ecx
|
2008-06-25 12:19:28 +08:00
|
|
|
|
|
|
|
#define ENABLE_INTERRUPTS_SYSEXIT \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
|
|
|
|
CLBR_NONE, \
|
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
|
|
|
|
|
|
|
|
|
|
|
|
#else /* !CONFIG_X86_32 */
|
2008-06-25 12:19:30 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If swapgs is used while the userspace stack is still current,
|
|
|
|
* there's no way to call a pvop. The PV replacement *must* be
|
|
|
|
* inlined, or the swapgs instruction must be trapped and emulated.
|
|
|
|
*/
|
|
|
|
#define SWAPGS_UNSAFE_STACK \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
|
|
|
|
swapgs)
|
|
|
|
|
2009-01-29 06:35:04 +08:00
|
|
|
/*
|
|
|
|
* Note: swapgs is very special, and in practise is either going to be
|
|
|
|
* implemented with a single "swapgs" instruction or something very
|
|
|
|
* special. Either way, we don't need to save any registers for
|
|
|
|
* it.
|
|
|
|
*/
|
2008-01-30 20:32:08 +08:00
|
|
|
#define SWAPGS \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
|
2009-01-29 06:35:04 +08:00
|
|
|
call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
|
2008-01-30 20:32:08 +08:00
|
|
|
)
|
|
|
|
|
2012-04-19 08:16:48 +08:00
|
|
|
#define GET_CR2_INTO_RAX \
|
|
|
|
call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
|
2008-01-30 20:32:07 +08:00
|
|
|
|
2008-06-25 12:19:31 +08:00
|
|
|
#define PARAVIRT_ADJUST_EXCEPTION_FRAME \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
|
|
|
|
CLBR_NONE, \
|
|
|
|
call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
|
|
|
|
|
2008-06-25 12:19:28 +08:00
|
|
|
#define USERGS_SYSRET64 \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
|
2008-06-25 12:19:26 +08:00
|
|
|
CLBR_NONE, \
|
2008-06-25 12:19:28 +08:00
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
|
|
|
|
#endif /* CONFIG_X86_32 */
|
2006-12-07 09:14:08 +08:00
|
|
|
|
2006-12-07 09:14:07 +08:00
|
|
|
#endif /* __ASSEMBLY__ */
|
2009-08-20 19:19:57 +08:00
|
|
|
#else /* CONFIG_PARAVIRT */
|
|
|
|
# define default_banner x86_init_noop
|
2014-11-19 02:23:49 +08:00
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
|
|
|
|
struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif /* __ASSEMBLY__ */
|
2009-08-20 19:19:57 +08:00
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#endif /* !CONFIG_PARAVIRT */
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2008-10-23 13:26:29 +08:00
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#endif /* _ASM_X86_PARAVIRT_H */
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