2015-07-22 02:23:56 +08:00
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/*
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* skl-message.c - HDA DSP interface for FW registration, Pipe and Module
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* configurations
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*
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* Copyright (C) 2015 Intel Corp
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* Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
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* Jeeja KP <jeeja.kp@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include "skl-sst-dsp.h"
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#include "skl-sst-ipc.h"
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#include "skl.h"
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#include "../common/sst-dsp.h"
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#include "../common/sst-dsp-priv.h"
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2015-08-01 22:10:41 +08:00
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#include "skl-topology.h"
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#include "skl-tplg-interface.h"
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2015-07-22 02:23:56 +08:00
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static int skl_alloc_dma_buf(struct device *dev,
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struct snd_dma_buffer *dmab, size_t size)
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{
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struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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if (!bus)
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return -ENODEV;
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return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
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}
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static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
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{
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struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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if (!bus)
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return -ENODEV;
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bus->io_ops->dma_free_pages(bus, dmab);
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return 0;
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}
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int skl_init_dsp(struct skl *skl)
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{
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void __iomem *mmio_base;
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struct hdac_ext_bus *ebus = &skl->ebus;
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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int irq = bus->irq;
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struct skl_dsp_loader_ops loader_ops;
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int ret;
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loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
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loader_ops.free_dma_buf = skl_free_dma_buf;
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/* enable ppcap interrupt */
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snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
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snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
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/* read the BAR of the ADSP MMIO */
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mmio_base = pci_ioremap_bar(skl->pci, 4);
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if (mmio_base == NULL) {
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dev_err(bus->dev, "ioremap error\n");
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return -ENXIO;
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}
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ret = skl_sst_dsp_init(bus->dev, mmio_base, irq,
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loader_ops, &skl->skl_sst);
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dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
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return ret;
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}
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void skl_free_dsp(struct skl *skl)
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{
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struct hdac_ext_bus *ebus = &skl->ebus;
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struct hdac_bus *bus = ebus_to_hbus(ebus);
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struct skl_sst *ctx = skl->skl_sst;
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/* disable ppcap interrupt */
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snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
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skl_sst_dsp_cleanup(bus->dev, ctx);
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if (ctx->dsp->addr.lpe)
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iounmap(ctx->dsp->addr.lpe);
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}
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int skl_suspend_dsp(struct skl *skl)
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{
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struct skl_sst *ctx = skl->skl_sst;
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int ret;
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/* if ppcap is not supported return 0 */
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if (!skl->ebus.ppcap)
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return 0;
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ret = skl_dsp_sleep(ctx->dsp);
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if (ret < 0)
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return ret;
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/* disable ppcap interrupt */
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snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
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snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
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return 0;
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}
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int skl_resume_dsp(struct skl *skl)
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{
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struct skl_sst *ctx = skl->skl_sst;
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/* if ppcap is not supported return 0 */
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if (!skl->ebus.ppcap)
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return 0;
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/* enable ppcap interrupt */
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snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
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snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
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return skl_dsp_wake(ctx->dsp);
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}
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2015-08-01 22:10:41 +08:00
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enum skl_bitdepth skl_get_bit_depth(int params)
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{
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switch (params) {
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case 8:
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return SKL_DEPTH_8BIT;
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case 16:
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return SKL_DEPTH_16BIT;
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case 24:
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return SKL_DEPTH_24BIT;
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case 32:
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return SKL_DEPTH_32BIT;
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default:
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return SKL_DEPTH_INVALID;
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}
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}
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static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg)
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{
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u32 config;
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switch (ch_cfg) {
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case SKL_CH_CFG_MONO:
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config = (0xFFFFFFF0 | SKL_CHANNEL_LEFT);
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break;
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case SKL_CH_CFG_STEREO:
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config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_RIGHT << 4));
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break;
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case SKL_CH_CFG_2_1:
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config = (0xFFFFF000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_RIGHT << 4)
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| (SKL_CHANNEL_LFE << 8));
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break;
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case SKL_CH_CFG_3_0:
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config = (0xFFFFF000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_CENTER << 4)
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| (SKL_CHANNEL_RIGHT << 8));
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break;
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case SKL_CH_CFG_3_1:
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config = (0xFFFF0000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_CENTER << 4)
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| (SKL_CHANNEL_RIGHT << 8)
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| (SKL_CHANNEL_LFE << 12));
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break;
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case SKL_CH_CFG_QUATRO:
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config = (0xFFFF0000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_RIGHT << 4)
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| (SKL_CHANNEL_LEFT_SURROUND << 8)
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| (SKL_CHANNEL_RIGHT_SURROUND << 12));
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break;
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case SKL_CH_CFG_4_0:
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config = (0xFFFF0000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_CENTER << 4)
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| (SKL_CHANNEL_RIGHT << 8)
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| (SKL_CHANNEL_CENTER_SURROUND << 12));
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break;
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case SKL_CH_CFG_5_0:
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config = (0xFFF00000 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_CENTER << 4)
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| (SKL_CHANNEL_RIGHT << 8)
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| (SKL_CHANNEL_LEFT_SURROUND << 12)
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| (SKL_CHANNEL_RIGHT_SURROUND << 16));
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break;
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case SKL_CH_CFG_5_1:
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config = (0xFF000000 | SKL_CHANNEL_CENTER
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| (SKL_CHANNEL_LEFT << 4)
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| (SKL_CHANNEL_RIGHT << 8)
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| (SKL_CHANNEL_LEFT_SURROUND << 12)
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| (SKL_CHANNEL_RIGHT_SURROUND << 16)
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| (SKL_CHANNEL_LFE << 20));
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break;
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case SKL_CH_CFG_DUAL_MONO:
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config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_LEFT << 4));
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break;
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case SKL_CH_CFG_I2S_DUAL_STEREO_0:
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config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
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| (SKL_CHANNEL_RIGHT << 4));
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break;
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case SKL_CH_CFG_I2S_DUAL_STEREO_1:
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config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8)
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| (SKL_CHANNEL_RIGHT << 12));
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break;
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default:
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config = 0xFFFFFFFF;
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break;
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}
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return config;
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}
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/*
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* Each module in DSP expects a base module configuration, which consists of
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* PCM format information, which we calculate in driver and resource values
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* which are read from widget information passed through topology binary
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* This is send when we create a module with INIT_INSTANCE IPC msg
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*/
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static void skl_set_base_module_format(struct skl_sst *ctx,
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struct skl_module_cfg *mconfig,
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struct skl_base_cfg *base_cfg)
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{
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struct skl_module_fmt *format = &mconfig->in_fmt;
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base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
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base_cfg->audio_fmt.s_freq = format->s_freq;
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base_cfg->audio_fmt.bit_depth = format->bit_depth;
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base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
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base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
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dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
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format->bit_depth, format->valid_bit_depth,
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format->ch_cfg);
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base_cfg->audio_fmt.channel_map = skl_create_channel_map(
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base_cfg->audio_fmt.ch_cfg);
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base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL;
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base_cfg->cps = mconfig->mcps;
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base_cfg->ibs = mconfig->ibs;
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base_cfg->obs = mconfig->obs;
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}
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/*
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* Copies copier capabilities into copier module and updates copier module
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* config size.
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*/
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static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
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struct skl_cpr_cfg *cpr_mconfig)
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{
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if (mconfig->formats_config.caps_size == 0)
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return;
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memcpy(cpr_mconfig->gtw_cfg.config_data,
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mconfig->formats_config.caps,
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mconfig->formats_config.caps_size);
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cpr_mconfig->gtw_cfg.config_length =
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(mconfig->formats_config.caps_size) / 4;
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}
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/*
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* Calculate the gatewat settings required for copier module, type of
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* gateway and index of gateway to use
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*/
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static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
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struct skl_module_cfg *mconfig,
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struct skl_cpr_cfg *cpr_mconfig)
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{
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union skl_connector_node_id node_id = {0};
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struct skl_pipe_params *params = mconfig->pipe->p_params;
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switch (mconfig->dev_type) {
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case SKL_DEVICE_BT:
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node_id.node.dma_type =
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(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
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SKL_DMA_I2S_LINK_OUTPUT_CLASS :
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SKL_DMA_I2S_LINK_INPUT_CLASS;
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node_id.node.vindex = params->host_dma_id +
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(mconfig->vbus_id << 3);
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break;
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case SKL_DEVICE_I2S:
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node_id.node.dma_type =
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(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
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SKL_DMA_I2S_LINK_OUTPUT_CLASS :
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SKL_DMA_I2S_LINK_INPUT_CLASS;
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node_id.node.vindex = params->host_dma_id +
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(mconfig->time_slot << 1) +
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(mconfig->vbus_id << 3);
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break;
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case SKL_DEVICE_DMIC:
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node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
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node_id.node.vindex = mconfig->vbus_id +
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(mconfig->time_slot);
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break;
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case SKL_DEVICE_HDALINK:
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node_id.node.dma_type =
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(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
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SKL_DMA_HDA_LINK_OUTPUT_CLASS :
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SKL_DMA_HDA_LINK_INPUT_CLASS;
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node_id.node.vindex = params->link_dma_id;
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break;
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default:
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node_id.node.dma_type =
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(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
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SKL_DMA_HDA_HOST_OUTPUT_CLASS :
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SKL_DMA_HDA_HOST_INPUT_CLASS;
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node_id.node.vindex = params->host_dma_id;
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break;
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}
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cpr_mconfig->gtw_cfg.node_id = node_id.val;
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if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
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cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
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else
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cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
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cpr_mconfig->cpr_feature_mask = 0;
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|
cpr_mconfig->gtw_cfg.config_length = 0;
|
|
|
|
|
|
|
|
skl_copy_copier_caps(mconfig, cpr_mconfig);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void skl_setup_out_format(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *mconfig,
|
|
|
|
struct skl_audio_data_format *out_fmt)
|
|
|
|
{
|
|
|
|
struct skl_module_fmt *format = &mconfig->out_fmt;
|
|
|
|
|
|
|
|
out_fmt->number_of_channels = (u8)format->channels;
|
|
|
|
out_fmt->s_freq = format->s_freq;
|
|
|
|
out_fmt->bit_depth = format->bit_depth;
|
|
|
|
out_fmt->valid_bit_depth = format->valid_bit_depth;
|
|
|
|
out_fmt->ch_cfg = format->ch_cfg;
|
|
|
|
|
|
|
|
out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg);
|
|
|
|
out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL;
|
|
|
|
|
|
|
|
dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
|
|
|
|
out_fmt->number_of_channels, format->s_freq, format->bit_depth);
|
|
|
|
}
|
|
|
|
|
2015-08-01 22:10:42 +08:00
|
|
|
/*
|
|
|
|
* DSP needs SRC module for frequency conversion, SRC takes base module
|
|
|
|
* configuration and the target frequency as extra parameter passed as src
|
|
|
|
* config
|
|
|
|
*/
|
|
|
|
static void skl_set_src_format(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *mconfig,
|
|
|
|
struct skl_src_module_cfg *src_mconfig)
|
|
|
|
{
|
|
|
|
struct skl_module_fmt *fmt = &mconfig->out_fmt;
|
|
|
|
|
|
|
|
skl_set_base_module_format(ctx, mconfig,
|
|
|
|
(struct skl_base_cfg *)src_mconfig);
|
|
|
|
|
|
|
|
src_mconfig->src_cfg = fmt->s_freq;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* DSP needs updown module to do channel conversion. updown module take base
|
|
|
|
* module configuration and channel configuration
|
|
|
|
* It also take coefficients and now we have defaults applied here
|
|
|
|
*/
|
|
|
|
static void skl_set_updown_mixer_format(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *mconfig,
|
|
|
|
struct skl_up_down_mixer_cfg *mixer_mconfig)
|
|
|
|
{
|
|
|
|
struct skl_module_fmt *fmt = &mconfig->out_fmt;
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
skl_set_base_module_format(ctx, mconfig,
|
|
|
|
(struct skl_base_cfg *)mixer_mconfig);
|
|
|
|
mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
|
|
|
|
|
|
|
|
/* Select F/W default coefficient */
|
|
|
|
mixer_mconfig->coeff_sel = 0x0;
|
|
|
|
|
|
|
|
/* User coeff, don't care since we are selecting F/W defaults */
|
|
|
|
for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
|
|
|
|
mixer_mconfig->coeff[i] = 0xDEADBEEF;
|
|
|
|
}
|
|
|
|
|
2015-08-01 22:10:41 +08:00
|
|
|
/*
|
|
|
|
* 'copier' is DSP internal module which copies data from Host DMA (HDA host
|
|
|
|
* dma) or link (hda link, SSP, PDM)
|
|
|
|
* Here we calculate the copier module parameters, like PCM format, output
|
|
|
|
* format, gateway settings
|
|
|
|
* copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
|
|
|
|
*/
|
|
|
|
static void skl_set_copier_format(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *mconfig,
|
|
|
|
struct skl_cpr_cfg *cpr_mconfig)
|
|
|
|
{
|
|
|
|
struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
|
|
|
|
struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
|
|
|
|
|
|
|
|
skl_set_base_module_format(ctx, mconfig, base_cfg);
|
|
|
|
|
|
|
|
skl_setup_out_format(ctx, mconfig, out_fmt);
|
|
|
|
skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
|
|
|
|
}
|
|
|
|
|
|
|
|
static u16 skl_get_module_param_size(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *mconfig)
|
|
|
|
{
|
|
|
|
u16 param_size;
|
|
|
|
|
|
|
|
switch (mconfig->m_type) {
|
|
|
|
case SKL_MODULE_TYPE_COPIER:
|
|
|
|
param_size = sizeof(struct skl_cpr_cfg);
|
|
|
|
param_size += mconfig->formats_config.caps_size;
|
|
|
|
return param_size;
|
|
|
|
|
2015-08-01 22:10:42 +08:00
|
|
|
case SKL_MODULE_TYPE_SRCINT:
|
|
|
|
return sizeof(struct skl_src_module_cfg);
|
|
|
|
|
|
|
|
case SKL_MODULE_TYPE_UPDWMIX:
|
|
|
|
return sizeof(struct skl_up_down_mixer_cfg);
|
|
|
|
|
2015-08-01 22:10:41 +08:00
|
|
|
default:
|
|
|
|
/*
|
|
|
|
* return only base cfg when no specific module type is
|
|
|
|
* specified
|
|
|
|
*/
|
|
|
|
return sizeof(struct skl_base_cfg);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2015-08-01 22:10:42 +08:00
|
|
|
* DSP firmware supports various modules like copier, SRC, updown etc.
|
|
|
|
* These modules required various parameters to be calculated and sent for
|
|
|
|
* the module initialization to DSP. By default a generic module needs only
|
|
|
|
* base module format configuration
|
2015-08-01 22:10:41 +08:00
|
|
|
*/
|
2015-08-01 22:10:42 +08:00
|
|
|
|
2015-08-01 22:10:41 +08:00
|
|
|
static int skl_set_module_format(struct skl_sst *ctx,
|
|
|
|
struct skl_module_cfg *module_config,
|
|
|
|
u16 *module_config_size,
|
|
|
|
void **param_data)
|
|
|
|
{
|
|
|
|
u16 param_size;
|
|
|
|
|
|
|
|
param_size = skl_get_module_param_size(ctx, module_config);
|
|
|
|
|
|
|
|
*param_data = kzalloc(param_size, GFP_KERNEL);
|
|
|
|
if (NULL == *param_data)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
*module_config_size = param_size;
|
|
|
|
|
|
|
|
switch (module_config->m_type) {
|
|
|
|
case SKL_MODULE_TYPE_COPIER:
|
|
|
|
skl_set_copier_format(ctx, module_config, *param_data);
|
|
|
|
break;
|
|
|
|
|
2015-08-01 22:10:42 +08:00
|
|
|
case SKL_MODULE_TYPE_SRCINT:
|
|
|
|
skl_set_src_format(ctx, module_config, *param_data);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SKL_MODULE_TYPE_UPDWMIX:
|
|
|
|
skl_set_updown_mixer_format(ctx, module_config, *param_data);
|
|
|
|
break;
|
|
|
|
|
2015-08-01 22:10:41 +08:00
|
|
|
default:
|
|
|
|
skl_set_base_module_format(ctx, module_config, *param_data);
|
|
|
|
break;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
|
|
|
|
module_config->id.module_id, param_size);
|
|
|
|
print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4,
|
|
|
|
*param_data, param_size, false);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int skl_get_queue_index(struct skl_module_pin *mpin,
|
|
|
|
struct skl_module_inst_id id, int max)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < max; i++) {
|
|
|
|
if (mpin[i].id.module_id == id.module_id &&
|
|
|
|
mpin[i].id.instance_id == id.instance_id)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Allocates queue for each module.
|
|
|
|
* if dynamic, the pin_index is allocated 0 to max_pin.
|
|
|
|
* In static, the pin_index is fixed based on module_id and instance id
|
|
|
|
*/
|
|
|
|
static int skl_alloc_queue(struct skl_module_pin *mpin,
|
|
|
|
struct skl_module_inst_id id, int max)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* if pin in dynamic, find first free pin
|
|
|
|
* otherwise find match module and instance id pin as topology will
|
|
|
|
* ensure a unique pin is assigned to this so no need to
|
|
|
|
* allocate/free
|
|
|
|
*/
|
|
|
|
for (i = 0; i < max; i++) {
|
|
|
|
if (mpin[i].is_dynamic) {
|
|
|
|
if (!mpin[i].in_use) {
|
|
|
|
mpin[i].in_use = true;
|
|
|
|
mpin[i].id.module_id = id.module_id;
|
|
|
|
mpin[i].id.instance_id = id.instance_id;
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (mpin[i].id.module_id == id.module_id &&
|
|
|
|
mpin[i].id.instance_id == id.instance_id)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
|
|
|
|
{
|
|
|
|
if (mpin[q_index].is_dynamic) {
|
|
|
|
mpin[q_index].in_use = false;
|
|
|
|
mpin[q_index].id.module_id = 0;
|
|
|
|
mpin[q_index].id.instance_id = 0;
|
|
|
|
}
|
|
|
|
}
|