2009-01-16 22:17:16 +08:00
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/*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/slab.h>
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2009-01-16 22:17:16 +08:00
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#include <linux/err.h>
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#include <linux/clk.h>
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2014-05-28 18:50:13 +08:00
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#include <linux/delay.h>
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2009-01-16 22:17:16 +08:00
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#include <linux/io.h>
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#include <linux/pwm.h>
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2013-09-27 19:23:23 +08:00
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#include <linux/of.h>
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2012-06-25 22:16:25 +08:00
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#include <linux/of_device.h>
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2009-04-14 18:50:20 +08:00
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/* i.MX1 and i.MX21 share the same PWM function block: */
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2014-05-28 18:50:12 +08:00
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#define MX1_PWMC 0x00 /* PWM Control Register */
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#define MX1_PWMS 0x04 /* PWM Sample Register */
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#define MX1_PWMP 0x08 /* PWM Period Register */
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2009-04-14 18:50:20 +08:00
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2014-05-28 18:50:12 +08:00
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#define MX1_PWMC_EN (1 << 4)
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2009-04-14 18:50:20 +08:00
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/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
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2014-05-28 18:50:12 +08:00
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#define MX3_PWMCR 0x00 /* PWM Control Register */
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2014-05-28 18:50:13 +08:00
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#define MX3_PWMSR 0x04 /* PWM Status Register */
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2014-05-28 18:50:12 +08:00
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#define MX3_PWMSAR 0x0C /* PWM Sample Register */
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#define MX3_PWMPR 0x10 /* PWM Period Register */
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#define MX3_PWMCR_PRESCALER(x) ((((x) - 1) & 0xFFF) << 4)
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#define MX3_PWMCR_DOZEEN (1 << 24)
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#define MX3_PWMCR_WAITEN (1 << 23)
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2011-11-30 11:34:27 +08:00
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#define MX3_PWMCR_DBGEN (1 << 22)
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2014-05-28 18:50:12 +08:00
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#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
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#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
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2014-05-28 18:50:13 +08:00
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#define MX3_PWMCR_SWR (1 << 3)
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2014-05-28 18:50:12 +08:00
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#define MX3_PWMCR_EN (1 << 0)
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2014-05-28 18:50:13 +08:00
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#define MX3_PWMSR_FIFOAV_4WORDS 0x4
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#define MX3_PWMSR_FIFOAV_MASK 0x7
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#define MX3_PWM_SWR_LOOP 5
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2009-04-14 18:50:20 +08:00
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2012-03-15 17:04:35 +08:00
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struct imx_chip {
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2012-06-25 22:15:20 +08:00
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struct clk *clk_per;
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2009-01-16 22:17:16 +08:00
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void __iomem *mmio_base;
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2012-03-15 17:04:35 +08:00
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struct pwm_chip chip;
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2012-07-03 23:28:14 +08:00
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int (*config)(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns);
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2012-08-28 17:39:25 +08:00
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void (*set_enable)(struct pwm_chip *chip, bool enable);
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2009-01-16 22:17:16 +08:00
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};
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2012-03-15 17:04:35 +08:00
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#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
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2012-07-03 23:28:14 +08:00
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static int imx_pwm_config_v1(struct pwm_chip *chip,
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2012-03-15 17:04:35 +08:00
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struct pwm_device *pwm, int duty_ns, int period_ns)
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2009-01-16 22:17:16 +08:00
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{
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2012-03-15 17:04:35 +08:00
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struct imx_chip *imx = to_imx_chip(chip);
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2009-01-16 22:17:16 +08:00
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2012-07-03 23:28:14 +08:00
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/*
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* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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* thus cannot provide the program the PWM controller
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* exactly. Instead, I'm relying on the fact that the
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* Bootloader (u-boot or WinCE+haret) has programmed the PWM
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* function group already. So I'll just modify the PWM sample
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* register to follow the ratio of duty_ns vs. period_ns
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* accordingly.
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*
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* This is good enough for programming the brightness of
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* the LCD backlight.
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*
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* The real implementation would divide PERCLK[0] first by
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* both the prescaler (/1 .. /128) and then by CLKSEL
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* (/2 .. /16).
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*/
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u32 max = readl(imx->mmio_base + MX1_PWMP);
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u32 p = max * duty_ns / period_ns;
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writel(max - p, imx->mmio_base + MX1_PWMS);
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return 0;
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}
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2012-08-28 17:39:25 +08:00
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static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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u32 val;
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val = readl(imx->mmio_base + MX1_PWMC);
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if (enable)
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val |= MX1_PWMC_EN;
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else
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val &= ~MX1_PWMC_EN;
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writel(val, imx->mmio_base + MX1_PWMC);
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}
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2012-07-03 23:28:14 +08:00
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static int imx_pwm_config_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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2014-05-28 18:50:13 +08:00
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struct device *dev = chip->dev;
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2012-07-03 23:28:14 +08:00
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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2014-05-28 18:50:13 +08:00
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unsigned int period_ms;
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2015-07-01 16:21:47 +08:00
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bool enable = pwm_is_enabled(pwm);
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2014-05-28 18:50:13 +08:00
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int wait_count = 0, fifoav;
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u32 cr, sr;
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/*
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* i.MX PWMv2 has a 4-word sample FIFO.
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* In order to avoid FIFO overflow issue, we do software reset
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* to clear all sample FIFO if the controller is disabled or
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* wait for a full PWM cycle to get a relinquished FIFO slot
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* when the controller is enabled and the FIFO is fully loaded.
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*/
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if (enable) {
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sr = readl(imx->mmio_base + MX3_PWMSR);
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fifoav = sr & MX3_PWMSR_FIFOAV_MASK;
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if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) {
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2015-07-01 16:21:50 +08:00
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period_ms = DIV_ROUND_UP(pwm_get_period(pwm),
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NSEC_PER_MSEC);
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2014-05-28 18:50:13 +08:00
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msleep(period_ms);
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sr = readl(imx->mmio_base + MX3_PWMSR);
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if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK))
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dev_warn(dev, "there is no free FIFO slot\n");
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}
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} else {
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writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
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do {
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usleep_range(200, 1000);
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cr = readl(imx->mmio_base + MX3_PWMCR);
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} while ((cr & MX3_PWMCR_SWR) &&
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(wait_count++ < MX3_PWM_SWR_LOOP));
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if (cr & MX3_PWMCR_SWR)
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dev_warn(dev, "software reset timeout\n");
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}
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2012-07-03 23:28:14 +08:00
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2012-06-25 22:15:20 +08:00
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c = clk_get_rate(imx->clk_per);
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2012-07-03 23:28:14 +08:00
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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prescale = period_cycles / 0x10000 + 1;
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period_cycles /= prescale;
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c = (unsigned long long)period_cycles * duty_ns;
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do_div(c, period_ns);
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duty_cycles = c;
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/*
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* according to imx pwm RM, the real period value should be
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* PERIOD value in PWMPR plus 2.
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*/
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if (period_cycles > 2)
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period_cycles -= 2;
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else
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period_cycles = 0;
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writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
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writel(period_cycles, imx->mmio_base + MX3_PWMPR);
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cr = MX3_PWMCR_PRESCALER(prescale) |
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MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
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2012-08-28 18:03:29 +08:00
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MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
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2012-08-28 17:39:25 +08:00
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2014-05-28 18:50:13 +08:00
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if (enable)
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2012-08-28 17:39:25 +08:00
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cr |= MX3_PWMCR_EN;
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2012-07-03 23:28:14 +08:00
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writel(cr, imx->mmio_base + MX3_PWMCR);
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2009-01-16 22:17:16 +08:00
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return 0;
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}
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2012-08-28 17:39:25 +08:00
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static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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u32 val;
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val = readl(imx->mmio_base + MX3_PWMCR);
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if (enable)
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val |= MX3_PWMCR_EN;
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else
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val &= ~MX3_PWMCR_EN;
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writel(val, imx->mmio_base + MX3_PWMCR);
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}
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2012-07-03 23:28:14 +08:00
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static int imx_pwm_config(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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2012-06-25 22:15:20 +08:00
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int ret;
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2017-01-30 05:54:06 +08:00
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ret = clk_prepare_enable(imx->clk_per);
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2012-06-25 22:15:20 +08:00
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if (ret)
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return ret;
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2012-07-03 23:28:14 +08:00
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2012-06-25 22:15:20 +08:00
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ret = imx->config(chip, pwm, duty_ns, period_ns);
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2017-01-30 05:54:06 +08:00
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clk_disable_unprepare(imx->clk_per);
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2012-06-25 22:15:20 +08:00
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return ret;
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2012-07-03 23:28:14 +08:00
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}
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2012-03-15 17:04:35 +08:00
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static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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2009-01-16 22:17:16 +08:00
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{
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2012-03-15 17:04:35 +08:00
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struct imx_chip *imx = to_imx_chip(chip);
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2012-08-28 15:12:01 +08:00
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int ret;
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2009-01-16 22:17:16 +08:00
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2012-06-25 22:15:20 +08:00
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ret = clk_prepare_enable(imx->clk_per);
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2012-08-28 15:12:01 +08:00
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if (ret)
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return ret;
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2012-08-28 17:39:25 +08:00
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imx->set_enable(chip, true);
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2012-08-28 15:12:01 +08:00
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return 0;
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2009-01-16 22:17:16 +08:00
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}
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2012-03-15 17:04:35 +08:00
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static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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2009-01-16 22:17:16 +08:00
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{
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2012-03-15 17:04:35 +08:00
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struct imx_chip *imx = to_imx_chip(chip);
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2009-01-16 22:17:16 +08:00
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2012-08-28 17:39:25 +08:00
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imx->set_enable(chip, false);
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2009-01-16 22:17:16 +08:00
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2012-06-25 22:15:20 +08:00
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clk_disable_unprepare(imx->clk_per);
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2009-01-16 22:17:16 +08:00
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}
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2017-01-11 02:12:06 +08:00
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static const struct pwm_ops imx_pwm_ops = {
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2012-03-15 17:04:35 +08:00
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.enable = imx_pwm_enable,
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.disable = imx_pwm_disable,
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.config = imx_pwm_config,
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.owner = THIS_MODULE,
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};
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2009-01-16 22:17:16 +08:00
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2012-06-25 22:16:25 +08:00
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struct imx_pwm_data {
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int (*config)(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns);
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void (*set_enable)(struct pwm_chip *chip, bool enable);
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};
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static struct imx_pwm_data imx_pwm_data_v1 = {
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.config = imx_pwm_config_v1,
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.set_enable = imx_pwm_set_enable_v1,
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};
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static struct imx_pwm_data imx_pwm_data_v2 = {
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.config = imx_pwm_config_v2,
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.set_enable = imx_pwm_set_enable_v2,
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};
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static const struct of_device_id imx_pwm_dt_ids[] = {
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{ .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
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{ .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);
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2012-11-20 02:23:14 +08:00
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static int imx_pwm_probe(struct platform_device *pdev)
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2009-01-16 22:17:16 +08:00
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{
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2012-06-25 22:16:25 +08:00
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const struct of_device_id *of_id =
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of_match_device(imx_pwm_dt_ids, &pdev->dev);
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2012-12-05 23:34:41 +08:00
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const struct imx_pwm_data *data;
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2012-03-15 17:04:35 +08:00
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struct imx_chip *imx;
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2009-01-16 22:17:16 +08:00
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struct resource *r;
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int ret = 0;
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2012-06-25 22:16:25 +08:00
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|
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if (!of_id)
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return -ENODEV;
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2012-07-01 08:27:23 +08:00
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imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
|
2014-04-23 17:39:49 +08:00
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if (imx == NULL)
|
2009-01-16 22:17:16 +08:00
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return -ENOMEM;
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|
2012-06-25 22:15:20 +08:00
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imx->clk_per = devm_clk_get(&pdev->dev, "per");
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|
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if (IS_ERR(imx->clk_per)) {
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dev_err(&pdev->dev, "getting per clock failed with %ld\n",
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|
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PTR_ERR(imx->clk_per));
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|
return PTR_ERR(imx->clk_per);
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|
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}
|
2009-01-16 22:17:16 +08:00
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|
2012-03-15 17:04:35 +08:00
|
|
|
imx->chip.ops = &imx_pwm_ops;
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|
|
imx->chip.dev = &pdev->dev;
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|
|
imx->chip.base = -1;
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|
|
imx->chip.npwm = 1;
|
2014-05-23 16:41:28 +08:00
|
|
|
imx->chip.can_sleep = true;
|
2009-01-16 22:17:16 +08:00
|
|
|
|
|
|
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
2013-01-21 18:09:16 +08:00
|
|
|
imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
|
|
|
|
if (IS_ERR(imx->mmio_base))
|
|
|
|
return PTR_ERR(imx->mmio_base);
|
2009-01-16 22:17:16 +08:00
|
|
|
|
2012-06-25 22:16:25 +08:00
|
|
|
data = of_id->data;
|
|
|
|
imx->config = data->config;
|
|
|
|
imx->set_enable = data->set_enable;
|
2012-07-03 23:28:14 +08:00
|
|
|
|
2012-03-15 17:04:35 +08:00
|
|
|
ret = pwmchip_add(&imx->chip);
|
|
|
|
if (ret < 0)
|
2012-07-01 08:27:23 +08:00
|
|
|
return ret;
|
2009-01-16 22:17:16 +08:00
|
|
|
|
2012-03-15 17:04:35 +08:00
|
|
|
platform_set_drvdata(pdev, imx);
|
2009-01-16 22:17:16 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-11-20 02:26:09 +08:00
|
|
|
static int imx_pwm_remove(struct platform_device *pdev)
|
2009-01-16 22:17:16 +08:00
|
|
|
{
|
2012-03-15 17:04:35 +08:00
|
|
|
struct imx_chip *imx;
|
2009-01-16 22:17:16 +08:00
|
|
|
|
2012-03-15 17:04:35 +08:00
|
|
|
imx = platform_get_drvdata(pdev);
|
|
|
|
if (imx == NULL)
|
2009-01-16 22:17:16 +08:00
|
|
|
return -ENODEV;
|
|
|
|
|
2012-07-01 08:27:23 +08:00
|
|
|
return pwmchip_remove(&imx->chip);
|
2009-01-16 22:17:16 +08:00
|
|
|
}
|
|
|
|
|
2012-03-15 17:04:35 +08:00
|
|
|
static struct platform_driver imx_pwm_driver = {
|
2009-01-16 22:17:16 +08:00
|
|
|
.driver = {
|
2012-06-25 22:16:25 +08:00
|
|
|
.name = "imx-pwm",
|
2013-09-30 11:26:41 +08:00
|
|
|
.of_match_table = imx_pwm_dt_ids,
|
2009-01-16 22:17:16 +08:00
|
|
|
},
|
2012-03-15 17:04:35 +08:00
|
|
|
.probe = imx_pwm_probe,
|
2012-11-20 02:21:28 +08:00
|
|
|
.remove = imx_pwm_remove,
|
2009-01-16 22:17:16 +08:00
|
|
|
};
|
|
|
|
|
2012-08-28 14:27:40 +08:00
|
|
|
module_platform_driver(imx_pwm_driver);
|
2009-01-16 22:17:16 +08:00
|
|
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|