2016-02-23 01:20:49 +08:00
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/*
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* Copyright (c) 2015-2016 MediaTek Inc.
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* Author: Yong Wu <yong.wu@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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2017-08-21 19:00:21 +08:00
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#include <linux/module.h>
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2016-02-23 01:20:49 +08:00
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <soc/mediatek/smi.h>
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2016-06-08 17:50:59 +08:00
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#include <dt-bindings/memory/mt2701-larb-port.h>
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2016-02-23 01:20:49 +08:00
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2017-08-21 19:00:16 +08:00
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/* mt8173 */
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2016-02-23 01:20:49 +08:00
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#define SMI_LARB_MMU_EN 0xf00
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2017-08-21 19:00:16 +08:00
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/* mt2701 */
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2016-06-08 17:50:59 +08:00
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#define REG_SMI_SECUR_CON_BASE 0x5c0
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/* every register control 8 port, register offset 0x4 */
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#define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
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#define REG_SMI_SECUR_CON_ADDR(id) \
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(REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
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/*
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* every port have 4 bit to control, bit[port + 3] control virtual or physical,
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* bit[port + 2 : port + 1] control the domain, bit[port] control the security
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* or non-security.
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*/
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#define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
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#define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
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/* mt2701 domain should be set to 3 */
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#define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
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2017-08-21 19:00:16 +08:00
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/* mt2712 */
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#define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))
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#define F_MMU_EN BIT(0)
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2016-06-08 17:50:59 +08:00
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struct mtk_smi_larb_gen {
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2017-08-04 09:32:26 +08:00
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bool need_larbid;
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2016-06-08 17:50:59 +08:00
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int port_in_larb[MTK_LARB_NR_MAX + 1];
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void (*config_port)(struct device *);
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};
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2016-02-23 01:20:49 +08:00
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struct mtk_smi {
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2016-06-08 17:50:59 +08:00
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struct device *dev;
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struct clk *clk_apb, *clk_smi;
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struct clk *clk_async; /*only needed by mt2701*/
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void __iomem *smi_ao_base;
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2016-02-23 01:20:49 +08:00
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};
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struct mtk_smi_larb { /* larb: local arbiter */
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2016-06-08 17:50:59 +08:00
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struct mtk_smi smi;
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void __iomem *base;
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struct device *smi_common_dev;
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const struct mtk_smi_larb_gen *larb_gen;
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int larbid;
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u32 *mmu;
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};
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enum mtk_smi_gen {
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MTK_SMI_GEN1,
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MTK_SMI_GEN2
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2016-02-23 01:20:49 +08:00
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};
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static int mtk_smi_enable(const struct mtk_smi *smi)
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{
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int ret;
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ret = pm_runtime_get_sync(smi->dev);
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if (ret < 0)
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return ret;
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ret = clk_prepare_enable(smi->clk_apb);
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if (ret)
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goto err_put_pm;
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ret = clk_prepare_enable(smi->clk_smi);
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if (ret)
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goto err_disable_apb;
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return 0;
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err_disable_apb:
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clk_disable_unprepare(smi->clk_apb);
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err_put_pm:
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pm_runtime_put_sync(smi->dev);
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return ret;
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}
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static void mtk_smi_disable(const struct mtk_smi *smi)
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{
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clk_disable_unprepare(smi->clk_smi);
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clk_disable_unprepare(smi->clk_apb);
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pm_runtime_put_sync(smi->dev);
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}
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int mtk_smi_larb_get(struct device *larbdev)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
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2016-06-08 17:50:59 +08:00
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const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
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2016-02-23 01:20:49 +08:00
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struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
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int ret;
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/* Enable the smi-common's power and clocks */
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ret = mtk_smi_enable(common);
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if (ret)
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return ret;
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/* Enable the larb's power and clocks */
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ret = mtk_smi_enable(&larb->smi);
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if (ret) {
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mtk_smi_disable(common);
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return ret;
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}
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/* Configure the iommu info for this larb */
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2016-06-08 17:50:59 +08:00
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larb_gen->config_port(larbdev);
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2016-02-23 01:20:49 +08:00
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return 0;
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}
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2016-04-27 16:48:00 +08:00
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EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
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2016-02-23 01:20:49 +08:00
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void mtk_smi_larb_put(struct device *larbdev)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
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struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
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/*
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* Don't de-configure the iommu info for this larb since there may be
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* several modules in this larb.
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* The iommu info will be reset after power off.
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*/
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mtk_smi_disable(&larb->smi);
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mtk_smi_disable(common);
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}
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2016-04-27 16:48:00 +08:00
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EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
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2016-02-23 01:20:49 +08:00
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static int
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mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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struct mtk_smi_iommu *smi_iommu = data;
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unsigned int i;
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2017-08-21 19:00:16 +08:00
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if (larb->larb_gen->need_larbid) {
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larb->mmu = &smi_iommu->larb_imu[larb->larbid].mmu;
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return 0;
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}
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/*
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* If there is no larbid property, Loop to find the corresponding
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* iommu information.
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*/
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2016-02-23 01:20:49 +08:00
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for (i = 0; i < smi_iommu->larb_nr; i++) {
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if (dev == smi_iommu->larb_imu[i].dev) {
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/* The 'mmu' may be updated in iommu-attach/detach. */
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larb->mmu = &smi_iommu->larb_imu[i].mmu;
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return 0;
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}
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}
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return -ENODEV;
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}
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2017-08-21 19:00:16 +08:00
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static void mtk_smi_larb_config_port_mt2712(struct device *dev)
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2016-06-08 17:50:59 +08:00
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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2017-08-21 19:00:16 +08:00
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u32 reg;
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int i;
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2016-06-08 17:50:59 +08:00
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2017-08-21 19:00:16 +08:00
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/*
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* larb 8/9 is the bdpsys larb, the iommu_en is enabled defaultly.
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* Don't need to set it again.
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*/
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if (larb->larbid == 8 || larb->larbid == 9)
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return;
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for_each_set_bit(i, (unsigned long *)larb->mmu, 32) {
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reg = readl_relaxed(larb->base + SMI_LARB_NONSEC_CON(i));
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reg |= F_MMU_EN;
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writel(reg, larb->base + SMI_LARB_NONSEC_CON(i));
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}
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2016-06-08 17:50:59 +08:00
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}
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2017-08-21 19:00:16 +08:00
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static void mtk_smi_larb_config_port_mt8173(struct device *dev)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
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}
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2016-06-08 17:50:59 +08:00
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static void mtk_smi_larb_config_port_gen1(struct device *dev)
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{
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struct mtk_smi_larb *larb = dev_get_drvdata(dev);
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const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
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struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
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int i, m4u_port_id, larb_port_num;
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u32 sec_con_val, reg_val;
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m4u_port_id = larb_gen->port_in_larb[larb->larbid];
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larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
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- larb_gen->port_in_larb[larb->larbid];
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for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
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if (*larb->mmu & BIT(i)) {
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/* bit[port + 3] controls the virtual or physical */
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sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
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} else {
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/* do not need to enable m4u for this port */
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continue;
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}
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reg_val = readl(common->smi_ao_base
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+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
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reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
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reg_val |= sec_con_val;
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reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
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writel(reg_val,
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common->smi_ao_base
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+ REG_SMI_SECUR_CON_ADDR(m4u_port_id));
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}
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}
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2016-02-23 01:20:49 +08:00
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static void
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mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
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{
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/* Do nothing as the iommu is always enabled. */
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}
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static const struct component_ops mtk_smi_larb_component_ops = {
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.bind = mtk_smi_larb_bind,
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.unbind = mtk_smi_larb_unbind,
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};
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2016-06-08 17:50:59 +08:00
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static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
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/* mt8173 do not need the port in larb */
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2017-08-21 19:00:16 +08:00
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.config_port = mtk_smi_larb_config_port_mt8173,
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2016-06-08 17:50:59 +08:00
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};
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static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
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2017-08-04 09:32:26 +08:00
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.need_larbid = true,
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2016-06-08 17:50:59 +08:00
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.port_in_larb = {
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LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
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LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
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},
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.config_port = mtk_smi_larb_config_port_gen1,
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};
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2017-08-21 19:00:16 +08:00
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static const struct mtk_smi_larb_gen mtk_smi_larb_mt2712 = {
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.need_larbid = true,
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.config_port = mtk_smi_larb_config_port_mt2712,
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};
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2016-06-08 17:50:59 +08:00
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static const struct of_device_id mtk_smi_larb_of_ids[] = {
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{
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.compatible = "mediatek,mt8173-smi-larb",
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.data = &mtk_smi_larb_mt8173
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},
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{
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.compatible = "mediatek,mt2701-smi-larb",
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.data = &mtk_smi_larb_mt2701
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},
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2017-08-21 19:00:16 +08:00
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{
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.compatible = "mediatek,mt2712-smi-larb",
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.data = &mtk_smi_larb_mt2712
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},
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2016-06-08 17:50:59 +08:00
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{}
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};
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2016-02-23 01:20:49 +08:00
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static int mtk_smi_larb_probe(struct platform_device *pdev)
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{
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struct mtk_smi_larb *larb;
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struct resource *res;
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struct device *dev = &pdev->dev;
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struct device_node *smi_node;
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struct platform_device *smi_pdev;
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2017-08-04 09:32:26 +08:00
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int err;
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2016-02-23 01:20:49 +08:00
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larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
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if (!larb)
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return -ENOMEM;
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2017-08-04 09:32:25 +08:00
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larb->larb_gen = of_device_get_match_data(dev);
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2016-02-23 01:20:49 +08:00
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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larb->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(larb->base))
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return PTR_ERR(larb->base);
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larb->smi.clk_apb = devm_clk_get(dev, "apb");
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if (IS_ERR(larb->smi.clk_apb))
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return PTR_ERR(larb->smi.clk_apb);
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larb->smi.clk_smi = devm_clk_get(dev, "smi");
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if (IS_ERR(larb->smi.clk_smi))
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return PTR_ERR(larb->smi.clk_smi);
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larb->smi.dev = dev;
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2017-08-04 09:32:26 +08:00
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if (larb->larb_gen->need_larbid) {
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|
|
|
err = of_property_read_u32(dev->of_node, "mediatek,larb-id",
|
|
|
|
&larb->larbid);
|
|
|
|
if (err) {
|
|
|
|
dev_err(dev, "missing larbid property\n");
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-02-23 01:20:49 +08:00
|
|
|
smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
|
|
|
|
if (!smi_node)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
smi_pdev = of_find_device_by_node(smi_node);
|
|
|
|
of_node_put(smi_node);
|
|
|
|
if (smi_pdev) {
|
2017-08-21 19:00:21 +08:00
|
|
|
if (!platform_get_drvdata(smi_pdev))
|
|
|
|
return -EPROBE_DEFER;
|
2016-02-23 01:20:49 +08:00
|
|
|
larb->smi_common_dev = &smi_pdev->dev;
|
|
|
|
} else {
|
|
|
|
dev_err(dev, "Failed to get the smi_common device\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pm_runtime_enable(dev);
|
|
|
|
platform_set_drvdata(pdev, larb);
|
|
|
|
return component_add(dev, &mtk_smi_larb_component_ops);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mtk_smi_larb_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
component_del(&pdev->dev, &mtk_smi_larb_component_ops);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver mtk_smi_larb_driver = {
|
|
|
|
.probe = mtk_smi_larb_probe,
|
2016-06-08 17:50:59 +08:00
|
|
|
.remove = mtk_smi_larb_remove,
|
2016-02-23 01:20:49 +08:00
|
|
|
.driver = {
|
|
|
|
.name = "mtk-smi-larb",
|
|
|
|
.of_match_table = mtk_smi_larb_of_ids,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2016-06-08 17:50:59 +08:00
|
|
|
static const struct of_device_id mtk_smi_common_of_ids[] = {
|
|
|
|
{
|
|
|
|
.compatible = "mediatek,mt8173-smi-common",
|
|
|
|
.data = (void *)MTK_SMI_GEN2
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "mediatek,mt2701-smi-common",
|
|
|
|
.data = (void *)MTK_SMI_GEN1
|
|
|
|
},
|
2017-08-21 19:00:16 +08:00
|
|
|
{
|
|
|
|
.compatible = "mediatek,mt2712-smi-common",
|
|
|
|
.data = (void *)MTK_SMI_GEN2
|
|
|
|
},
|
2016-06-08 17:50:59 +08:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2016-02-23 01:20:49 +08:00
|
|
|
static int mtk_smi_common_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct mtk_smi *common;
|
2016-06-08 17:50:59 +08:00
|
|
|
struct resource *res;
|
|
|
|
enum mtk_smi_gen smi_gen;
|
2017-08-10 13:17:32 +08:00
|
|
|
int ret;
|
2016-02-23 01:20:49 +08:00
|
|
|
|
|
|
|
common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
|
|
|
|
if (!common)
|
|
|
|
return -ENOMEM;
|
|
|
|
common->dev = dev;
|
|
|
|
|
|
|
|
common->clk_apb = devm_clk_get(dev, "apb");
|
|
|
|
if (IS_ERR(common->clk_apb))
|
|
|
|
return PTR_ERR(common->clk_apb);
|
|
|
|
|
|
|
|
common->clk_smi = devm_clk_get(dev, "smi");
|
|
|
|
if (IS_ERR(common->clk_smi))
|
|
|
|
return PTR_ERR(common->clk_smi);
|
|
|
|
|
2016-06-08 17:50:59 +08:00
|
|
|
/*
|
|
|
|
* for mtk smi gen 1, we need to get the ao(always on) base to config
|
|
|
|
* m4u port, and we need to enable the aync clock for transform the smi
|
|
|
|
* clock into emi clock domain, but for mtk smi gen2, there's no smi ao
|
|
|
|
* base.
|
|
|
|
*/
|
2017-08-04 09:32:25 +08:00
|
|
|
smi_gen = (enum mtk_smi_gen)of_device_get_match_data(dev);
|
2016-06-08 17:50:59 +08:00
|
|
|
if (smi_gen == MTK_SMI_GEN1) {
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
common->smi_ao_base = devm_ioremap_resource(dev, res);
|
|
|
|
if (IS_ERR(common->smi_ao_base))
|
|
|
|
return PTR_ERR(common->smi_ao_base);
|
|
|
|
|
|
|
|
common->clk_async = devm_clk_get(dev, "async");
|
|
|
|
if (IS_ERR(common->clk_async))
|
|
|
|
return PTR_ERR(common->clk_async);
|
|
|
|
|
2017-08-10 13:17:32 +08:00
|
|
|
ret = clk_prepare_enable(common->clk_async);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2016-06-08 17:50:59 +08:00
|
|
|
}
|
2016-02-23 01:20:49 +08:00
|
|
|
pm_runtime_enable(dev);
|
|
|
|
platform_set_drvdata(pdev, common);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mtk_smi_common_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver mtk_smi_common_driver = {
|
|
|
|
.probe = mtk_smi_common_probe,
|
|
|
|
.remove = mtk_smi_common_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "mtk-smi-common",
|
|
|
|
.of_match_table = mtk_smi_common_of_ids,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init mtk_smi_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = platform_driver_register(&mtk_smi_common_driver);
|
|
|
|
if (ret != 0) {
|
|
|
|
pr_err("Failed to register SMI driver\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = platform_driver_register(&mtk_smi_larb_driver);
|
|
|
|
if (ret != 0) {
|
|
|
|
pr_err("Failed to register SMI-LARB driver\n");
|
|
|
|
goto err_unreg_smi;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
err_unreg_smi:
|
|
|
|
platform_driver_unregister(&mtk_smi_common_driver);
|
|
|
|
return ret;
|
|
|
|
}
|
2016-06-08 17:50:59 +08:00
|
|
|
|
2017-08-21 19:00:21 +08:00
|
|
|
module_init(mtk_smi_init);
|